141d9d44dSDave Gerlach // SPDX-License-Identifier: GPL-2.0
241d9d44dSDave Gerlach /*
341d9d44dSDave Gerlach * TI AM33XX and AM43XX PM Assembly Offsets
441d9d44dSDave Gerlach *
541d9d44dSDave Gerlach * Copyright (C) 2017-2018 Texas Instruments Inc.
641d9d44dSDave Gerlach */
741d9d44dSDave Gerlach
841d9d44dSDave Gerlach #include <linux/kbuild.h>
941d9d44dSDave Gerlach #include <linux/platform_data/pm33xx.h>
105692fceeSDave Gerlach #include <linux/ti-emif-sram.h>
1141d9d44dSDave Gerlach
main(void)1241d9d44dSDave Gerlach int main(void)
1341d9d44dSDave Gerlach {
145692fceeSDave Gerlach ti_emif_asm_offsets();
155692fceeSDave Gerlach
1641d9d44dSDave Gerlach DEFINE(AMX3_PM_WFI_FLAGS_OFFSET,
1741d9d44dSDave Gerlach offsetof(struct am33xx_pm_sram_data, wfi_flags));
1841d9d44dSDave Gerlach DEFINE(AMX3_PM_L2_AUX_CTRL_VAL_OFFSET,
1941d9d44dSDave Gerlach offsetof(struct am33xx_pm_sram_data, l2_aux_ctrl_val));
2041d9d44dSDave Gerlach DEFINE(AMX3_PM_L2_PREFETCH_CTRL_VAL_OFFSET,
2141d9d44dSDave Gerlach offsetof(struct am33xx_pm_sram_data, l2_prefetch_ctrl_val));
2241d9d44dSDave Gerlach DEFINE(AMX3_PM_SRAM_DATA_SIZE, sizeof(struct am33xx_pm_sram_data));
2341d9d44dSDave Gerlach
2441d9d44dSDave Gerlach BLANK();
2541d9d44dSDave Gerlach
2641d9d44dSDave Gerlach DEFINE(AMX3_PM_RO_SRAM_DATA_VIRT_OFFSET,
2741d9d44dSDave Gerlach offsetof(struct am33xx_pm_ro_sram_data, amx3_pm_sram_data_virt));
2841d9d44dSDave Gerlach DEFINE(AMX3_PM_RO_SRAM_DATA_PHYS_OFFSET,
2941d9d44dSDave Gerlach offsetof(struct am33xx_pm_ro_sram_data, amx3_pm_sram_data_phys));
30*8c5a916fSKeerthy DEFINE(AMX3_PM_RTC_BASE_VIRT_OFFSET,
31*8c5a916fSKeerthy offsetof(struct am33xx_pm_ro_sram_data, rtc_base_virt));
3241d9d44dSDave Gerlach DEFINE(AMX3_PM_RO_SRAM_DATA_SIZE,
3341d9d44dSDave Gerlach sizeof(struct am33xx_pm_ro_sram_data));
3441d9d44dSDave Gerlach
3541d9d44dSDave Gerlach return 0;
3641d9d44dSDave Gerlach }
37