1*d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2c49f34bcSTony Lindgren /*: 3c49f34bcSTony Lindgren * Address mappings and base address for OMAP4 interconnects 4c49f34bcSTony Lindgren * and peripherals. 5c49f34bcSTony Lindgren * 6c49f34bcSTony Lindgren * Copyright (C) 2009 Texas Instruments 7c49f34bcSTony Lindgren * 8c49f34bcSTony Lindgren * Author: Santosh Shilimkar <santosh.shilimkar@ti.com> 9c49f34bcSTony Lindgren */ 10c49f34bcSTony Lindgren #ifndef __ASM_ARCH_OMAP44XX_H 11c49f34bcSTony Lindgren #define __ASM_ARCH_OMAP44XX_H 12c49f34bcSTony Lindgren 13c49f34bcSTony Lindgren /* 14c49f34bcSTony Lindgren * Please place only base defines here and put the rest in device 15c49f34bcSTony Lindgren * specific headers. 16c49f34bcSTony Lindgren */ 17c49f34bcSTony Lindgren #define L4_44XX_BASE 0x4a000000 18c49f34bcSTony Lindgren #define L4_WK_44XX_BASE 0x4a300000 19c49f34bcSTony Lindgren #define L4_PER_44XX_BASE 0x48000000 20c49f34bcSTony Lindgren #define L4_EMU_44XX_BASE 0x54000000 21c49f34bcSTony Lindgren #define L3_44XX_BASE 0x44000000 22c49f34bcSTony Lindgren #define OMAP44XX_EMIF1_BASE 0x4c000000 23c49f34bcSTony Lindgren #define OMAP44XX_EMIF2_BASE 0x4d000000 24c49f34bcSTony Lindgren #define OMAP44XX_DMM_BASE 0x4e000000 25c49f34bcSTony Lindgren #define OMAP4430_32KSYNCT_BASE 0x4a304000 26c49f34bcSTony Lindgren #define OMAP4430_CM1_BASE 0x4a004000 27c49f34bcSTony Lindgren #define OMAP4430_CM_BASE OMAP4430_CM1_BASE 28c49f34bcSTony Lindgren #define OMAP4430_CM2_BASE 0x4a008000 29c49f34bcSTony Lindgren #define OMAP4430_PRM_BASE 0x4a306000 30c49f34bcSTony Lindgren #define OMAP4430_PRCM_MPU_BASE 0x48243000 31c49f34bcSTony Lindgren #define OMAP44XX_GPMC_BASE 0x50000000 32c49f34bcSTony Lindgren #define OMAP443X_SCM_BASE 0x4a002000 33c49f34bcSTony Lindgren #define OMAP443X_CTRL_BASE 0x4a100000 34c49f34bcSTony Lindgren #define OMAP44XX_IC_BASE 0x48200000 35c49f34bcSTony Lindgren #define OMAP44XX_IVA_INTC_BASE 0x40000000 36c49f34bcSTony Lindgren #define IRQ_SIR_IRQ 0x0040 37c49f34bcSTony Lindgren #define OMAP44XX_GIC_DIST_BASE 0x48241000 38c49f34bcSTony Lindgren #define OMAP44XX_GIC_CPU_BASE 0x48240100 39c49f34bcSTony Lindgren #define OMAP44XX_IRQ_GIC_START 32 40c49f34bcSTony Lindgren #define OMAP44XX_LOCAL_TWD_BASE 0x48240600 41c49f34bcSTony Lindgren #define OMAP44XX_L2CACHE_BASE 0x48242000 42c49f34bcSTony Lindgren #define OMAP44XX_WKUPGEN_BASE 0x48281000 43c49f34bcSTony Lindgren #define OMAP44XX_MCPDM_BASE 0x40132000 44c49f34bcSTony Lindgren #define OMAP44XX_SAR_RAM_BASE 0x4a326000 45c49f34bcSTony Lindgren 46c49f34bcSTony Lindgren #define OMAP44XX_MAILBOX_BASE (L4_44XX_BASE + 0xF4000) 47c49f34bcSTony Lindgren #define OMAP44XX_HSUSB_OTG_BASE (L4_44XX_BASE + 0xAB000) 48c49f34bcSTony Lindgren 49c49f34bcSTony Lindgren #define OMAP4_MMU1_BASE 0x55082000 50c49f34bcSTony Lindgren #define OMAP4_MMU2_BASE 0x4A066000 51c49f34bcSTony Lindgren 52c49f34bcSTony Lindgren #define OMAP44XX_USBTLL_BASE (L4_44XX_BASE + 0x62000) 53c49f34bcSTony Lindgren #define OMAP44XX_UHH_CONFIG_BASE (L4_44XX_BASE + 0x64000) 54c49f34bcSTony Lindgren #define OMAP44XX_HSUSB_OHCI_BASE (L4_44XX_BASE + 0x64800) 55c49f34bcSTony Lindgren #define OMAP44XX_HSUSB_EHCI_BASE (L4_44XX_BASE + 0x64C00) 56c49f34bcSTony Lindgren 57c49f34bcSTony Lindgren #endif /* __ASM_ARCH_OMAP44XX_H */ 58c49f34bcSTony Lindgren 59