1 /* 2 * linux/arch/arm/mach-omap2/id.c 3 * 4 * OMAP2 CPU identification code 5 * 6 * Copyright (C) 2005 Nokia Corporation 7 * Written by Tony Lindgren <tony@atomide.com> 8 * 9 * Copyright (C) 2009 Texas Instruments 10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License version 2 as 14 * published by the Free Software Foundation. 15 */ 16 17 #include <linux/module.h> 18 #include <linux/kernel.h> 19 #include <linux/init.h> 20 #include <linux/io.h> 21 22 #include <asm/cputype.h> 23 24 #include <plat/common.h> 25 #include <plat/cpu.h> 26 27 #include <mach/id.h> 28 29 #include "control.h" 30 31 static struct omap_chip_id omap_chip; 32 static unsigned int omap_revision; 33 34 u32 omap3_features; 35 36 unsigned int omap_rev(void) 37 { 38 return omap_revision; 39 } 40 EXPORT_SYMBOL(omap_rev); 41 42 /** 43 * omap_chip_is - test whether currently running OMAP matches a chip type 44 * @oc: omap_chip_t to test against 45 * 46 * Test whether the currently-running OMAP chip matches the supplied 47 * chip type 'oc'. Returns 1 upon a match; 0 upon failure. 48 */ 49 int omap_chip_is(struct omap_chip_id oci) 50 { 51 return (oci.oc & omap_chip.oc) ? 1 : 0; 52 } 53 EXPORT_SYMBOL(omap_chip_is); 54 55 int omap_type(void) 56 { 57 u32 val = 0; 58 59 if (cpu_is_omap24xx()) { 60 val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS); 61 } else if (cpu_is_omap34xx()) { 62 val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS); 63 } else if (cpu_is_omap44xx()) { 64 val = omap_ctrl_readl(OMAP4_CTRL_MODULE_CORE_STATUS); 65 } else { 66 pr_err("Cannot detect omap type!\n"); 67 goto out; 68 } 69 70 val &= OMAP2_DEVICETYPE_MASK; 71 val >>= 8; 72 73 out: 74 return val; 75 } 76 EXPORT_SYMBOL(omap_type); 77 78 79 /*----------------------------------------------------------------------------*/ 80 81 #define OMAP_TAP_IDCODE 0x0204 82 #define OMAP_TAP_DIE_ID_0 0x0218 83 #define OMAP_TAP_DIE_ID_1 0x021C 84 #define OMAP_TAP_DIE_ID_2 0x0220 85 #define OMAP_TAP_DIE_ID_3 0x0224 86 87 #define read_tap_reg(reg) __raw_readl(tap_base + (reg)) 88 89 struct omap_id { 90 u16 hawkeye; /* Silicon type (Hawkeye id) */ 91 u8 dev; /* Device type from production_id reg */ 92 u32 type; /* Combined type id copied to omap_revision */ 93 }; 94 95 /* Register values to detect the OMAP version */ 96 static struct omap_id omap_ids[] __initdata = { 97 { .hawkeye = 0xb5d9, .dev = 0x0, .type = 0x24200024 }, 98 { .hawkeye = 0xb5d9, .dev = 0x1, .type = 0x24201024 }, 99 { .hawkeye = 0xb5d9, .dev = 0x2, .type = 0x24202024 }, 100 { .hawkeye = 0xb5d9, .dev = 0x4, .type = 0x24220024 }, 101 { .hawkeye = 0xb5d9, .dev = 0x8, .type = 0x24230024 }, 102 { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300024 }, 103 }; 104 105 static void __iomem *tap_base; 106 static u16 tap_prod_id; 107 108 void omap_get_die_id(struct omap_die_id *odi) 109 { 110 odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_0); 111 odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_1); 112 odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_2); 113 odi->id_3 = read_tap_reg(OMAP_TAP_DIE_ID_3); 114 } 115 116 static void __init omap24xx_check_revision(void) 117 { 118 int i, j; 119 u32 idcode, prod_id; 120 u16 hawkeye; 121 u8 dev_type, rev; 122 struct omap_die_id odi; 123 124 idcode = read_tap_reg(OMAP_TAP_IDCODE); 125 prod_id = read_tap_reg(tap_prod_id); 126 hawkeye = (idcode >> 12) & 0xffff; 127 rev = (idcode >> 28) & 0x0f; 128 dev_type = (prod_id >> 16) & 0x0f; 129 omap_get_die_id(&odi); 130 131 pr_debug("OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n", 132 idcode, rev, hawkeye, (idcode >> 1) & 0x7ff); 133 pr_debug("OMAP_TAP_DIE_ID_0: 0x%08x\n", odi.id_0); 134 pr_debug("OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n", 135 odi.id_1, (odi.id_1 >> 28) & 0xf); 136 pr_debug("OMAP_TAP_DIE_ID_2: 0x%08x\n", odi.id_2); 137 pr_debug("OMAP_TAP_DIE_ID_3: 0x%08x\n", odi.id_3); 138 pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n", 139 prod_id, dev_type); 140 141 /* Check hawkeye ids */ 142 for (i = 0; i < ARRAY_SIZE(omap_ids); i++) { 143 if (hawkeye == omap_ids[i].hawkeye) 144 break; 145 } 146 147 if (i == ARRAY_SIZE(omap_ids)) { 148 printk(KERN_ERR "Unknown OMAP CPU id\n"); 149 return; 150 } 151 152 for (j = i; j < ARRAY_SIZE(omap_ids); j++) { 153 if (dev_type == omap_ids[j].dev) 154 break; 155 } 156 157 if (j == ARRAY_SIZE(omap_ids)) { 158 printk(KERN_ERR "Unknown OMAP device type. " 159 "Handling it as OMAP%04x\n", 160 omap_ids[i].type >> 16); 161 j = i; 162 } 163 164 pr_info("OMAP%04x", omap_rev() >> 16); 165 if ((omap_rev() >> 8) & 0x0f) 166 pr_info("ES%x", (omap_rev() >> 12) & 0xf); 167 pr_info("\n"); 168 } 169 170 #define OMAP3_CHECK_FEATURE(status,feat) \ 171 if (((status & OMAP3_ ##feat## _MASK) \ 172 >> OMAP3_ ##feat## _SHIFT) != FEAT_ ##feat## _NONE) { \ 173 omap3_features |= OMAP3_HAS_ ##feat; \ 174 } 175 176 static void __init omap3_check_features(void) 177 { 178 u32 status; 179 180 omap3_features = 0; 181 182 status = omap_ctrl_readl(OMAP3_CONTROL_OMAP_STATUS); 183 184 OMAP3_CHECK_FEATURE(status, L2CACHE); 185 OMAP3_CHECK_FEATURE(status, IVA); 186 OMAP3_CHECK_FEATURE(status, SGX); 187 OMAP3_CHECK_FEATURE(status, NEON); 188 OMAP3_CHECK_FEATURE(status, ISP); 189 if (cpu_is_omap3630()) 190 omap3_features |= OMAP3_HAS_192MHZ_CLK; 191 if (!cpu_is_omap3505() && !cpu_is_omap3517()) 192 omap3_features |= OMAP3_HAS_IO_WAKEUP; 193 194 omap3_features |= OMAP3_HAS_SDRC; 195 196 /* 197 * TODO: Get additional info (where applicable) 198 * e.g. Size of L2 cache. 199 */ 200 } 201 202 static void __init ti816x_check_features(void) 203 { 204 omap3_features = OMAP3_HAS_NEON; 205 } 206 207 static void __init omap3_check_revision(void) 208 { 209 u32 cpuid, idcode; 210 u16 hawkeye; 211 u8 rev; 212 213 omap_chip.oc = CHIP_IS_OMAP3430; 214 215 /* 216 * We cannot access revision registers on ES1.0. 217 * If the processor type is Cortex-A8 and the revision is 0x0 218 * it means its Cortex r0p0 which is 3430 ES1.0. 219 */ 220 cpuid = read_cpuid(CPUID_ID); 221 if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { 222 omap_revision = OMAP3430_REV_ES1_0; 223 omap_chip.oc |= CHIP_IS_OMAP3430ES1; 224 return; 225 } 226 227 /* 228 * Detection for 34xx ES2.0 and above can be done with just 229 * hawkeye and rev. See TRM 1.5.2 Device Identification. 230 * Note that rev does not map directly to our defined processor 231 * revision numbers as ES1.0 uses value 0. 232 */ 233 idcode = read_tap_reg(OMAP_TAP_IDCODE); 234 hawkeye = (idcode >> 12) & 0xffff; 235 rev = (idcode >> 28) & 0xff; 236 237 switch (hawkeye) { 238 case 0xb7ae: 239 /* Handle 34xx/35xx devices */ 240 switch (rev) { 241 case 0: /* Take care of early samples */ 242 case 1: 243 omap_revision = OMAP3430_REV_ES2_0; 244 omap_chip.oc |= CHIP_IS_OMAP3430ES2; 245 break; 246 case 2: 247 omap_revision = OMAP3430_REV_ES2_1; 248 omap_chip.oc |= CHIP_IS_OMAP3430ES2; 249 break; 250 case 3: 251 omap_revision = OMAP3430_REV_ES3_0; 252 omap_chip.oc |= CHIP_IS_OMAP3430ES3_0; 253 break; 254 case 4: 255 omap_revision = OMAP3430_REV_ES3_1; 256 omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; 257 break; 258 case 7: 259 /* FALLTHROUGH */ 260 default: 261 /* Use the latest known revision as default */ 262 omap_revision = OMAP3430_REV_ES3_1_2; 263 264 /* REVISIT: Add CHIP_IS_OMAP3430ES3_1_2? */ 265 omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; 266 } 267 break; 268 case 0xb868: 269 /* Handle OMAP35xx/AM35xx devices 270 * 271 * Set the device to be OMAP3505 here. Actual device 272 * is identified later based on the features. 273 * 274 * REVISIT: AM3505/AM3517 should have their own CHIP_IS 275 */ 276 omap_revision = OMAP3505_REV(rev); 277 omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; 278 break; 279 case 0xb891: 280 /* Handle 36xx devices */ 281 omap_chip.oc |= CHIP_IS_OMAP3630ES1; 282 283 switch(rev) { 284 case 0: /* Take care of early samples */ 285 omap_revision = OMAP3630_REV_ES1_0; 286 break; 287 case 1: 288 omap_revision = OMAP3630_REV_ES1_1; 289 omap_chip.oc |= CHIP_IS_OMAP3630ES1_1; 290 break; 291 case 2: 292 default: 293 omap_revision = OMAP3630_REV_ES1_2; 294 omap_chip.oc |= CHIP_IS_OMAP3630ES1_2; 295 } 296 break; 297 case 0xb81e: 298 omap_chip.oc = CHIP_IS_TI816X; 299 300 switch (rev) { 301 case 0: 302 omap_revision = TI8168_REV_ES1_0; 303 break; 304 case 1: 305 omap_revision = TI8168_REV_ES1_1; 306 break; 307 default: 308 omap_revision = TI8168_REV_ES1_1; 309 } 310 break; 311 default: 312 /* Unknown default to latest silicon rev as default*/ 313 omap_revision = OMAP3630_REV_ES1_2; 314 omap_chip.oc |= CHIP_IS_OMAP3630ES1_2; 315 } 316 } 317 318 static void __init omap4_check_revision(void) 319 { 320 u32 idcode; 321 u16 hawkeye; 322 u8 rev; 323 324 /* 325 * The IC rev detection is done with hawkeye and rev. 326 * Note that rev does not map directly to defined processor 327 * revision numbers as ES1.0 uses value 0. 328 */ 329 idcode = read_tap_reg(OMAP_TAP_IDCODE); 330 hawkeye = (idcode >> 12) & 0xffff; 331 rev = (idcode >> 28) & 0xff; 332 333 /* 334 * Few initial ES2.0 samples IDCODE is same as ES1.0 335 * Use ARM register to detect the correct ES version 336 */ 337 if (!rev) { 338 idcode = read_cpuid(CPUID_ID); 339 rev = (idcode & 0xf) - 1; 340 } 341 342 switch (hawkeye) { 343 case 0xb852: 344 switch (rev) { 345 case 0: 346 omap_revision = OMAP4430_REV_ES1_0; 347 omap_chip.oc |= CHIP_IS_OMAP4430ES1; 348 break; 349 case 1: 350 omap_revision = OMAP4430_REV_ES2_0; 351 omap_chip.oc |= CHIP_IS_OMAP4430ES2; 352 break; 353 default: 354 omap_revision = OMAP4430_REV_ES2_0; 355 omap_chip.oc |= CHIP_IS_OMAP4430ES2; 356 } 357 break; 358 default: 359 /* Unknown default to latest silicon rev as default*/ 360 omap_revision = OMAP4430_REV_ES2_0; 361 omap_chip.oc |= CHIP_IS_OMAP4430ES2; 362 } 363 364 pr_info("OMAP%04x ES%d.0\n", 365 omap_rev() >> 16, ((omap_rev() >> 12) & 0xf) + 1); 366 } 367 368 #define OMAP3_SHOW_FEATURE(feat) \ 369 if (omap3_has_ ##feat()) \ 370 printk(#feat" "); 371 372 static void __init omap3_cpuinfo(void) 373 { 374 u8 rev = GET_OMAP_REVISION(); 375 char cpu_name[16], cpu_rev[16]; 376 377 /* OMAP3430 and OMAP3530 are assumed to be same. 378 * 379 * OMAP3525, OMAP3515 and OMAP3503 can be detected only based 380 * on available features. Upon detection, update the CPU id 381 * and CPU class bits. 382 */ 383 if (cpu_is_omap3630()) { 384 strcpy(cpu_name, "OMAP3630"); 385 } else if (cpu_is_omap3505()) { 386 /* 387 * AM35xx devices 388 */ 389 if (omap3_has_sgx()) { 390 omap_revision = OMAP3517_REV(rev); 391 strcpy(cpu_name, "AM3517"); 392 } else { 393 /* Already set in omap3_check_revision() */ 394 strcpy(cpu_name, "AM3505"); 395 } 396 } else if (cpu_is_ti816x()) { 397 strcpy(cpu_name, "TI816X"); 398 } else if (omap3_has_iva() && omap3_has_sgx()) { 399 /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */ 400 strcpy(cpu_name, "OMAP3430/3530"); 401 } else if (omap3_has_iva()) { 402 omap_revision = OMAP3525_REV(rev); 403 strcpy(cpu_name, "OMAP3525"); 404 } else if (omap3_has_sgx()) { 405 omap_revision = OMAP3515_REV(rev); 406 strcpy(cpu_name, "OMAP3515"); 407 } else { 408 omap_revision = OMAP3503_REV(rev); 409 strcpy(cpu_name, "OMAP3503"); 410 } 411 412 if (cpu_is_omap3630() || cpu_is_ti816x()) { 413 switch (rev) { 414 case OMAP_REVBITS_00: 415 strcpy(cpu_rev, "1.0"); 416 break; 417 case OMAP_REVBITS_01: 418 strcpy(cpu_rev, "1.1"); 419 break; 420 case OMAP_REVBITS_02: 421 /* FALLTHROUGH */ 422 default: 423 /* Use the latest known revision as default */ 424 strcpy(cpu_rev, "1.2"); 425 } 426 } else if (cpu_is_omap3505() || cpu_is_omap3517()) { 427 switch (rev) { 428 case OMAP_REVBITS_00: 429 strcpy(cpu_rev, "1.0"); 430 break; 431 case OMAP_REVBITS_01: 432 /* FALLTHROUGH */ 433 default: 434 /* Use the latest known revision as default */ 435 strcpy(cpu_rev, "1.1"); 436 } 437 } else { 438 switch (rev) { 439 case OMAP_REVBITS_00: 440 strcpy(cpu_rev, "1.0"); 441 break; 442 case OMAP_REVBITS_01: 443 strcpy(cpu_rev, "2.0"); 444 break; 445 case OMAP_REVBITS_02: 446 strcpy(cpu_rev, "2.1"); 447 break; 448 case OMAP_REVBITS_03: 449 strcpy(cpu_rev, "3.0"); 450 break; 451 case OMAP_REVBITS_04: 452 strcpy(cpu_rev, "3.1"); 453 break; 454 case OMAP_REVBITS_05: 455 /* FALLTHROUGH */ 456 default: 457 /* Use the latest known revision as default */ 458 strcpy(cpu_rev, "3.1.2"); 459 } 460 } 461 462 /* Print verbose information */ 463 pr_info("%s ES%s (", cpu_name, cpu_rev); 464 465 OMAP3_SHOW_FEATURE(l2cache); 466 OMAP3_SHOW_FEATURE(iva); 467 OMAP3_SHOW_FEATURE(sgx); 468 OMAP3_SHOW_FEATURE(neon); 469 OMAP3_SHOW_FEATURE(isp); 470 OMAP3_SHOW_FEATURE(192mhz_clk); 471 472 printk(")\n"); 473 } 474 475 /* 476 * Try to detect the exact revision of the omap we're running on 477 */ 478 void __init omap2_check_revision(void) 479 { 480 /* 481 * At this point we have an idea about the processor revision set 482 * earlier with omap2_set_globals_tap(). 483 */ 484 if (cpu_is_omap24xx()) { 485 omap24xx_check_revision(); 486 } else if (cpu_is_omap34xx()) { 487 omap3_check_revision(); 488 489 /* TI816X doesn't have feature register */ 490 if (!cpu_is_ti816x()) 491 omap3_check_features(); 492 else 493 ti816x_check_features(); 494 495 omap3_cpuinfo(); 496 return; 497 } else if (cpu_is_omap44xx()) { 498 omap4_check_revision(); 499 return; 500 } else { 501 pr_err("OMAP revision unknown, please fix!\n"); 502 } 503 504 /* 505 * OK, now we know the exact revision. Initialize omap_chip bits 506 * for powerdowmain and clockdomain code. 507 */ 508 if (cpu_is_omap243x()) { 509 /* Currently only supports 2430ES2.1 and 2430-all */ 510 omap_chip.oc |= CHIP_IS_OMAP2430; 511 return; 512 } else if (cpu_is_omap242x()) { 513 /* Currently only supports 2420ES2.1.1 and 2420-all */ 514 omap_chip.oc |= CHIP_IS_OMAP2420; 515 return; 516 } 517 518 pr_err("Uninitialized omap_chip, please fix!\n"); 519 } 520 521 /* 522 * Set up things for map_io and processor detection later on. Gets called 523 * pretty much first thing from board init. For multi-omap, this gets 524 * cpu_is_omapxxxx() working accurately enough for map_io. Then we'll try to 525 * detect the exact revision later on in omap2_detect_revision() once map_io 526 * is done. 527 */ 528 void __init omap2_set_globals_tap(struct omap_globals *omap2_globals) 529 { 530 omap_revision = omap2_globals->class; 531 tap_base = omap2_globals->tap; 532 533 if (cpu_is_omap34xx()) 534 tap_prod_id = 0x0210; 535 else 536 tap_prod_id = 0x0208; 537 } 538