xref: /openbmc/linux/arch/arm/mach-omap2/am33xx-restart.c (revision 14e067c1a5280fe6fe5d3348a0bae87bc4da16db)
1*14e067c1SJean-Sebastien A. Beaudry /*
2*14e067c1SJean-Sebastien A. Beaudry  * am33xx-restart.c - Code common to all AM33xx machines.
3*14e067c1SJean-Sebastien A. Beaudry  *
4*14e067c1SJean-Sebastien A. Beaudry  * This program is free software; you can redistribute it and/or modify
5*14e067c1SJean-Sebastien A. Beaudry  * it under the terms of the GNU General Public License version 2 as
6*14e067c1SJean-Sebastien A. Beaudry  * published by the Free Software Foundation.
7*14e067c1SJean-Sebastien A. Beaudry  */
8*14e067c1SJean-Sebastien A. Beaudry #include <linux/kernel.h>
9*14e067c1SJean-Sebastien A. Beaudry 
10*14e067c1SJean-Sebastien A. Beaudry #include "common.h"
11*14e067c1SJean-Sebastien A. Beaudry #include "prm-regbits-33xx.h"
12*14e067c1SJean-Sebastien A. Beaudry #include "prm33xx.h"
13*14e067c1SJean-Sebastien A. Beaudry 
14*14e067c1SJean-Sebastien A. Beaudry /**
15*14e067c1SJean-Sebastien A. Beaudry  * am3xx_restart - trigger a software restart of the SoC
16*14e067c1SJean-Sebastien A. Beaudry  * @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c
17*14e067c1SJean-Sebastien A. Beaudry  * @cmd: passed from the userspace program rebooting the system (if provided)
18*14e067c1SJean-Sebastien A. Beaudry  *
19*14e067c1SJean-Sebastien A. Beaudry  * Resets the SoC.  For @cmd, see the 'reboot' syscall in
20*14e067c1SJean-Sebastien A. Beaudry  * kernel/sys.c.  No return value.
21*14e067c1SJean-Sebastien A. Beaudry  */
22*14e067c1SJean-Sebastien A. Beaudry void am33xx_restart(char mode, const char *cmd)
23*14e067c1SJean-Sebastien A. Beaudry {
24*14e067c1SJean-Sebastien A. Beaudry 	/* TODO: Handle mode and cmd if necessary */
25*14e067c1SJean-Sebastien A. Beaudry 
26*14e067c1SJean-Sebastien A. Beaudry 	am33xx_prm_rmw_reg_bits(AM33XX_GLOBAL_WARM_SW_RST_MASK,
27*14e067c1SJean-Sebastien A. Beaudry 				AM33XX_GLOBAL_WARM_SW_RST_MASK,
28*14e067c1SJean-Sebastien A. Beaudry 				AM33XX_PRM_DEVICE_MOD,
29*14e067c1SJean-Sebastien A. Beaudry 				AM33XX_PRM_RSTCTRL_OFFSET);
30*14e067c1SJean-Sebastien A. Beaudry 
31*14e067c1SJean-Sebastien A. Beaudry 	/* OCP barrier */
32*14e067c1SJean-Sebastien A. Beaudry 	(void)am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD,
33*14e067c1SJean-Sebastien A. Beaudry 				  AM33XX_PRM_RSTCTRL_OFFSET);
34*14e067c1SJean-Sebastien A. Beaudry }
35