xref: /openbmc/linux/arch/arm/mach-imx/mach-imx6sl.c (revision 4b4193256c8d3bc3a5397b5cd9494c2ad386317d)
1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
231a2fbf7SShawn Guo /*
331a2fbf7SShawn Guo  * Copyright 2013 Freescale Semiconductor, Inc.
431a2fbf7SShawn Guo  */
531a2fbf7SShawn Guo 
631a2fbf7SShawn Guo #include <linux/irqchip.h>
731a2fbf7SShawn Guo #include <linux/of_platform.h>
8a9aec30dSFugang Duan #include <linux/mfd/syscon.h>
9a9aec30dSFugang Duan #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
10a9aec30dSFugang Duan #include <linux/regmap.h>
1131a2fbf7SShawn Guo #include <asm/mach/arch.h>
1231a2fbf7SShawn Guo #include <asm/mach/map.h>
1331a2fbf7SShawn Guo 
1431a2fbf7SShawn Guo #include "common.h"
15751f7e99SAnson Huang #include "cpuidle.h"
16dee5dee2SBai Ping #include "hardware.h"
1731a2fbf7SShawn Guo 
imx6sl_fec_init(void)18a9aec30dSFugang Duan static void __init imx6sl_fec_init(void)
19a9aec30dSFugang Duan {
20a9aec30dSFugang Duan 	struct regmap *gpr;
21a9aec30dSFugang Duan 
22a9aec30dSFugang Duan 	/* set FEC clock from internal PLL clock source */
23a9aec30dSFugang Duan 	gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sl-iomuxc-gpr");
24a9aec30dSFugang Duan 	if (!IS_ERR(gpr)) {
25a9aec30dSFugang Duan 		regmap_update_bits(gpr, IOMUXC_GPR1,
26a9aec30dSFugang Duan 			IMX6SL_GPR1_FEC_CLOCK_MUX2_SEL_MASK, 0);
27a9aec30dSFugang Duan 		regmap_update_bits(gpr, IOMUXC_GPR1,
28a9aec30dSFugang Duan 			IMX6SL_GPR1_FEC_CLOCK_MUX1_SEL_MASK, 0);
29a9aec30dSFugang Duan 	} else {
30a9aec30dSFugang Duan 		pr_err("failed to find fsl,imx6sl-iomux-gpr regmap\n");
31a9aec30dSFugang Duan 	}
32a9aec30dSFugang Duan }
33a9aec30dSFugang Duan 
imx6sl_init_late(void)341ed4aaebSJohn Tobias static void __init imx6sl_init_late(void)
351ed4aaebSJohn Tobias {
361ed4aaebSJohn Tobias 	/* imx6sl reuses imx6q cpufreq driver */
371ed4aaebSJohn Tobias 	if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ))
381ed4aaebSJohn Tobias 		platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0);
39751f7e99SAnson Huang 
40bc0ebbd5SArnd Bergmann 	if (IS_ENABLED(CONFIG_SOC_IMX6SL) && cpu_is_imx6sl())
41751f7e99SAnson Huang 		imx6sl_cpuidle_init();
42bc0ebbd5SArnd Bergmann 	else if (IS_ENABLED(CONFIG_SOC_IMX6SLL))
43e7fa1fb3SAnson Huang 		imx6sx_cpuidle_init();
441ed4aaebSJohn Tobias }
451ed4aaebSJohn Tobias 
imx6sl_init_machine(void)4631a2fbf7SShawn Guo static void __init imx6sl_init_machine(void)
4731a2fbf7SShawn Guo {
48*d2199b34SPeng Fan 	of_platform_default_populate(NULL, NULL, NULL);
49a9aec30dSFugang Duan 
50dee5dee2SBai Ping 	if (cpu_is_imx6sl())
51a9aec30dSFugang Duan 		imx6sl_fec_init();
529ba64fe3SShawn Guo 	imx_anatop_init();
53df595746SAnson Huang 	imx6sl_pm_init();
5431a2fbf7SShawn Guo }
5531a2fbf7SShawn Guo 
imx6sl_init_irq(void)5631a2fbf7SShawn Guo static void __init imx6sl_init_irq(void)
5731a2fbf7SShawn Guo {
5814517564SMarc Zyngier 	imx_gpc_check_dt();
59d8ce823fSShawn Guo 	imx_init_revision_from_anatop();
6073dada7fSShawn Guo 	imx_init_l2cache();
6131a2fbf7SShawn Guo 	imx_src_init();
6231a2fbf7SShawn Guo 	irqchip_init();
63dee5dee2SBai Ping 	if (cpu_is_imx6sl())
6435e2916fSShawn Guo 		imx6_pm_ccm_init("fsl,imx6sl-ccm");
65dee5dee2SBai Ping 	else
66dee5dee2SBai Ping 		imx6_pm_ccm_init("fsl,imx6sll-ccm");
6731a2fbf7SShawn Guo }
6831a2fbf7SShawn Guo 
698756dd92SShawn Guo static const char * const imx6sl_dt_compat[] __initconst = {
7031a2fbf7SShawn Guo 	"fsl,imx6sl",
71dee5dee2SBai Ping 	"fsl,imx6sll",
7231a2fbf7SShawn Guo 	NULL,
7331a2fbf7SShawn Guo };
7431a2fbf7SShawn Guo 
7531a2fbf7SShawn Guo DT_MACHINE_START(IMX6SL, "Freescale i.MX6 SoloLite (Device Tree)")
76510aca64SAndrey Smirnov 	.l2c_aux_val 	= 0,
77510aca64SAndrey Smirnov 	.l2c_aux_mask	= ~0,
7831a2fbf7SShawn Guo 	.init_irq	= imx6sl_init_irq,
7931a2fbf7SShawn Guo 	.init_machine	= imx6sl_init_machine,
801ed4aaebSJohn Tobias 	.init_late      = imx6sl_init_late,
8131a2fbf7SShawn Guo 	.dt_compat	= imx6sl_dt_compat,
8231a2fbf7SShawn Guo MACHINE_END
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