1fcaf2036SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
21ecdde9dSShawn Guo /*
31ecdde9dSShawn Guo * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
41ecdde9dSShawn Guo * Copyright 2011 Linaro Ltd.
51ecdde9dSShawn Guo */
61ecdde9dSShawn Guo
7ff4ab231SShawn Guo #include <linux/io.h>
8*66ba9c05SRob Herring #include <linux/of.h>
911d973deSFabio Estevam #include <linux/of_address.h>
101ecdde9dSShawn Guo #include <asm/mach/arch.h>
111ecdde9dSShawn Guo
121ecdde9dSShawn Guo #include "common.h"
13ff4ab231SShawn Guo #include "hardware.h"
141ecdde9dSShawn Guo
imx51_init_early(void)15ff4ab231SShawn Guo static void __init imx51_init_early(void)
16ff4ab231SShawn Guo {
17ff4ab231SShawn Guo mxc_set_cpu_type(MXC_CPU_MX51);
18ff4ab231SShawn Guo }
19ff4ab231SShawn Guo
20ff4ab231SShawn Guo /*
21ff4ab231SShawn Guo * The MIPI HSC unit has been removed from the i.MX51 Reference Manual by
22ff4ab231SShawn Guo * the Freescale marketing division. However this did not remove the
23ff4ab231SShawn Guo * hardware from the chip which still needs to be configured for proper
24ff4ab231SShawn Guo * IPU support.
25ff4ab231SShawn Guo */
26ff4ab231SShawn Guo #define MX51_MIPI_HSC_BASE 0x83fdc000
imx51_ipu_mipi_setup(void)27ff4ab231SShawn Guo static void __init imx51_ipu_mipi_setup(void)
28ff4ab231SShawn Guo {
29ff4ab231SShawn Guo void __iomem *hsc_addr;
30ff4ab231SShawn Guo
31ff4ab231SShawn Guo hsc_addr = ioremap(MX51_MIPI_HSC_BASE, SZ_16K);
32ff4ab231SShawn Guo WARN_ON(!hsc_addr);
33ff4ab231SShawn Guo
34ff4ab231SShawn Guo /* setup MIPI module to legacy mode */
35c553138fSJohannes Berg imx_writel(0xf00, hsc_addr);
36ff4ab231SShawn Guo
37ff4ab231SShawn Guo /* CSI mode: reserved; DI control mode: legacy (from Freescale BSP) */
38c553138fSJohannes Berg imx_writel(imx_readl(hsc_addr + 0x800) | 0x30ff, hsc_addr + 0x800);
39ff4ab231SShawn Guo
40ff4ab231SShawn Guo iounmap(hsc_addr);
41ff4ab231SShawn Guo }
42ff4ab231SShawn Guo
imx51_m4if_setup(void)4311d973deSFabio Estevam static void __init imx51_m4if_setup(void)
4411d973deSFabio Estevam {
4511d973deSFabio Estevam void __iomem *m4if_base;
4611d973deSFabio Estevam struct device_node *np;
4711d973deSFabio Estevam
4811d973deSFabio Estevam np = of_find_compatible_node(NULL, NULL, "fsl,imx51-m4if");
4911d973deSFabio Estevam if (!np)
5011d973deSFabio Estevam return;
5111d973deSFabio Estevam
5211d973deSFabio Estevam m4if_base = of_iomap(np, 0);
530c17e83fSWen Yang of_node_put(np);
5411d973deSFabio Estevam if (!m4if_base) {
5511d973deSFabio Estevam pr_err("Unable to map M4IF registers\n");
5611d973deSFabio Estevam return;
5711d973deSFabio Estevam }
5811d973deSFabio Estevam
5911d973deSFabio Estevam /*
6011d973deSFabio Estevam * Configure VPU and IPU with higher priorities
6111d973deSFabio Estevam * in order to avoid artifacts during video playback
6211d973deSFabio Estevam */
6311d973deSFabio Estevam writel_relaxed(0x00000203, m4if_base + 0x40);
6411d973deSFabio Estevam writel_relaxed(0x00000000, m4if_base + 0x44);
6511d973deSFabio Estevam writel_relaxed(0x00120125, m4if_base + 0x9c);
6611d973deSFabio Estevam writel_relaxed(0x001901A3, m4if_base + 0x48);
6711d973deSFabio Estevam iounmap(m4if_base);
6811d973deSFabio Estevam }
6911d973deSFabio Estevam
imx51_dt_init(void)701ecdde9dSShawn Guo static void __init imx51_dt_init(void)
711ecdde9dSShawn Guo {
72ff4ab231SShawn Guo imx51_ipu_mipi_setup();
73ff4ab231SShawn Guo imx_src_init();
7411d973deSFabio Estevam imx51_m4if_setup();
7526b754f9SFabio Estevam imx5_pmu_init();
76463f90faSAlexander Shiyan imx_aips_allow_unprivileged_access("fsl,imx51-aipstz");
771ecdde9dSShawn Guo }
781ecdde9dSShawn Guo
imx51_init_late(void)79ff4ab231SShawn Guo static void __init imx51_init_late(void)
80ff4ab231SShawn Guo {
81ff4ab231SShawn Guo mx51_neon_fixup();
82ff4ab231SShawn Guo imx51_pm_init();
83ff4ab231SShawn Guo }
84ff4ab231SShawn Guo
858756dd92SShawn Guo static const char * const imx51_dt_board_compat[] __initconst = {
861ecdde9dSShawn Guo "fsl,imx51",
871ecdde9dSShawn Guo NULL
881ecdde9dSShawn Guo };
891ecdde9dSShawn Guo
901ecdde9dSShawn Guo DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)")
911ecdde9dSShawn Guo .init_early = imx51_init_early,
921ecdde9dSShawn Guo .init_machine = imx51_dt_init,
931ecdde9dSShawn Guo .init_late = imx51_init_late,
941ecdde9dSShawn Guo .dt_compat = imx51_dt_board_compat,
951ecdde9dSShawn Guo MACHINE_END
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