1347863d4SKrzysztof Kozlowski // SPDX-License-Identifier: GPL-2.0 2347863d4SKrzysztof Kozlowski // Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 3347863d4SKrzysztof Kozlowski // http://www.samsung.com 4347863d4SKrzysztof Kozlowski // 5347863d4SKrzysztof Kozlowski // Cloned from linux/arch/arm/mach-vexpress/platsmp.c 6347863d4SKrzysztof Kozlowski // 7347863d4SKrzysztof Kozlowski // Copyright (C) 2002 ARM Ltd. 8347863d4SKrzysztof Kozlowski // All Rights Reserved 983014579SKukjin Kim 1083014579SKukjin Kim #include <linux/init.h> 1183014579SKukjin Kim #include <linux/errno.h> 1283014579SKukjin Kim #include <linux/delay.h> 1383014579SKukjin Kim #include <linux/jiffies.h> 1483014579SKukjin Kim #include <linux/smp.h> 1583014579SKukjin Kim #include <linux/io.h> 16b3205deaSSachin Kamat #include <linux/of_address.h> 172262d6efSPankaj Dubey #include <linux/soc/samsung/exynos-regs-pmu.h> 1883014579SKukjin Kim 1983014579SKukjin Kim #include <asm/cacheflush.h> 206f0b7c0cSKrzysztof Kozlowski #include <asm/cp15.h> 21eb50439bSWill Deacon #include <asm/smp_plat.h> 2283014579SKukjin Kim #include <asm/smp_scu.h> 23beddf63fSTomasz Figa #include <asm/firmware.h> 2483014579SKukjin Kim 2506853ae4SMarc Zyngier #include "common.h" 2606853ae4SMarc Zyngier 2783014579SKukjin Kim extern void exynos4_secondary_startup(void); 2883014579SKukjin Kim 296213f70eSRussell King /* XXX exynos_pen_release is cargo culted code - DO NOT COPY XXX */ 306213f70eSRussell King volatile int exynos_pen_release = -1; 316213f70eSRussell King 326f0b7c0cSKrzysztof Kozlowski #ifdef CONFIG_HOTPLUG_CPU 3313cfa6c4SKrzysztof Kozlowski static inline void cpu_leave_lowpower(u32 core_id) 346f0b7c0cSKrzysztof Kozlowski { 356f0b7c0cSKrzysztof Kozlowski unsigned int v; 366f0b7c0cSKrzysztof Kozlowski 376f0b7c0cSKrzysztof Kozlowski asm volatile( 386f0b7c0cSKrzysztof Kozlowski "mrc p15, 0, %0, c1, c0, 0\n" 396f0b7c0cSKrzysztof Kozlowski " orr %0, %0, %1\n" 406f0b7c0cSKrzysztof Kozlowski " mcr p15, 0, %0, c1, c0, 0\n" 416f0b7c0cSKrzysztof Kozlowski " mrc p15, 0, %0, c1, c0, 1\n" 426f0b7c0cSKrzysztof Kozlowski " orr %0, %0, %2\n" 436f0b7c0cSKrzysztof Kozlowski " mcr p15, 0, %0, c1, c0, 1\n" 446f0b7c0cSKrzysztof Kozlowski : "=&r" (v) 456f0b7c0cSKrzysztof Kozlowski : "Ir" (CR_C), "Ir" (0x40) 466f0b7c0cSKrzysztof Kozlowski : "cc"); 476f0b7c0cSKrzysztof Kozlowski } 486f0b7c0cSKrzysztof Kozlowski 496f0b7c0cSKrzysztof Kozlowski static inline void platform_do_lowpower(unsigned int cpu, int *spurious) 506f0b7c0cSKrzysztof Kozlowski { 516f0b7c0cSKrzysztof Kozlowski u32 mpidr = cpu_logical_map(cpu); 526f0b7c0cSKrzysztof Kozlowski u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); 536f0b7c0cSKrzysztof Kozlowski 546f0b7c0cSKrzysztof Kozlowski for (;;) { 556f0b7c0cSKrzysztof Kozlowski 566f0b7c0cSKrzysztof Kozlowski /* Turn the CPU off on next WFI instruction. */ 576f0b7c0cSKrzysztof Kozlowski exynos_cpu_power_down(core_id); 586f0b7c0cSKrzysztof Kozlowski 596f0b7c0cSKrzysztof Kozlowski wfi(); 606f0b7c0cSKrzysztof Kozlowski 616213f70eSRussell King if (exynos_pen_release == core_id) { 626f0b7c0cSKrzysztof Kozlowski /* 636f0b7c0cSKrzysztof Kozlowski * OK, proper wakeup, we're done 646f0b7c0cSKrzysztof Kozlowski */ 656f0b7c0cSKrzysztof Kozlowski break; 666f0b7c0cSKrzysztof Kozlowski } 676f0b7c0cSKrzysztof Kozlowski 686f0b7c0cSKrzysztof Kozlowski /* 696f0b7c0cSKrzysztof Kozlowski * Getting here, means that we have come out of WFI without 706f0b7c0cSKrzysztof Kozlowski * having been woken up - this shouldn't happen 716f0b7c0cSKrzysztof Kozlowski * 726f0b7c0cSKrzysztof Kozlowski * Just note it happening - when we're woken, we can report 736f0b7c0cSKrzysztof Kozlowski * its occurrence. 746f0b7c0cSKrzysztof Kozlowski */ 756f0b7c0cSKrzysztof Kozlowski (*spurious)++; 766f0b7c0cSKrzysztof Kozlowski } 776f0b7c0cSKrzysztof Kozlowski } 786f0b7c0cSKrzysztof Kozlowski #endif /* CONFIG_HOTPLUG_CPU */ 796f0b7c0cSKrzysztof Kozlowski 807310d99fSKrzysztof Kozlowski /** 817310d99fSKrzysztof Kozlowski * exynos_core_power_down : power down the specified cpu 827310d99fSKrzysztof Kozlowski * @cpu : the cpu to power down 837310d99fSKrzysztof Kozlowski * 847310d99fSKrzysztof Kozlowski * Power down the specified cpu. The sequence must be finished by a 857310d99fSKrzysztof Kozlowski * call to cpu_do_idle() 867310d99fSKrzysztof Kozlowski * 877310d99fSKrzysztof Kozlowski */ 887310d99fSKrzysztof Kozlowski void exynos_cpu_power_down(int cpu) 897310d99fSKrzysztof Kozlowski { 90497ab3b3SBartlomiej Zolnierkiewicz u32 core_conf; 91497ab3b3SBartlomiej Zolnierkiewicz 92ca489c58SKrzysztof Kozlowski if (cpu == 0 && (soc_is_exynos5420() || soc_is_exynos5800())) { 93adc548d7SAbhilash Kesavan /* 94adc548d7SAbhilash Kesavan * Bypass power down for CPU0 during suspend. Check for 95adc548d7SAbhilash Kesavan * the SYS_PWR_REG value to decide if we are suspending 96adc548d7SAbhilash Kesavan * the system. 97adc548d7SAbhilash Kesavan */ 98adc548d7SAbhilash Kesavan int val = pmu_raw_readl(EXYNOS5_ARM_CORE0_SYS_PWR_REG); 99adc548d7SAbhilash Kesavan 100adc548d7SAbhilash Kesavan if (!(val & S5P_CORE_LOCAL_PWR_EN)) 101adc548d7SAbhilash Kesavan return; 102adc548d7SAbhilash Kesavan } 103497ab3b3SBartlomiej Zolnierkiewicz 104497ab3b3SBartlomiej Zolnierkiewicz core_conf = pmu_raw_readl(EXYNOS_ARM_CORE_CONFIGURATION(cpu)); 105497ab3b3SBartlomiej Zolnierkiewicz core_conf &= ~S5P_CORE_LOCAL_PWR_EN; 106497ab3b3SBartlomiej Zolnierkiewicz pmu_raw_writel(core_conf, EXYNOS_ARM_CORE_CONFIGURATION(cpu)); 1077310d99fSKrzysztof Kozlowski } 1087310d99fSKrzysztof Kozlowski 1097310d99fSKrzysztof Kozlowski /** 1107310d99fSKrzysztof Kozlowski * exynos_cpu_power_up : power up the specified cpu 1117310d99fSKrzysztof Kozlowski * @cpu : the cpu to power up 1127310d99fSKrzysztof Kozlowski * 1137310d99fSKrzysztof Kozlowski * Power up the specified cpu 1147310d99fSKrzysztof Kozlowski */ 1157310d99fSKrzysztof Kozlowski void exynos_cpu_power_up(int cpu) 1167310d99fSKrzysztof Kozlowski { 117497ab3b3SBartlomiej Zolnierkiewicz u32 core_conf = S5P_CORE_LOCAL_PWR_EN; 118497ab3b3SBartlomiej Zolnierkiewicz 119497ab3b3SBartlomiej Zolnierkiewicz if (soc_is_exynos3250()) 120497ab3b3SBartlomiej Zolnierkiewicz core_conf |= S5P_CORE_AUTOWAKEUP_EN; 121497ab3b3SBartlomiej Zolnierkiewicz 122497ab3b3SBartlomiej Zolnierkiewicz pmu_raw_writel(core_conf, 1237310d99fSKrzysztof Kozlowski EXYNOS_ARM_CORE_CONFIGURATION(cpu)); 1247310d99fSKrzysztof Kozlowski } 1257310d99fSKrzysztof Kozlowski 1267310d99fSKrzysztof Kozlowski /** 1277310d99fSKrzysztof Kozlowski * exynos_cpu_power_state : returns the power state of the cpu 1287310d99fSKrzysztof Kozlowski * @cpu : the cpu to retrieve the power state from 1297310d99fSKrzysztof Kozlowski * 1307310d99fSKrzysztof Kozlowski */ 1317310d99fSKrzysztof Kozlowski int exynos_cpu_power_state(int cpu) 1327310d99fSKrzysztof Kozlowski { 133944483d0SArnd Bergmann return (pmu_raw_readl(EXYNOS_ARM_CORE_STATUS(cpu)) & 1347310d99fSKrzysztof Kozlowski S5P_CORE_LOCAL_PWR_EN); 1357310d99fSKrzysztof Kozlowski } 1367310d99fSKrzysztof Kozlowski 1377310d99fSKrzysztof Kozlowski /** 1387310d99fSKrzysztof Kozlowski * exynos_cluster_power_down : power down the specified cluster 1397310d99fSKrzysztof Kozlowski * @cluster : the cluster to power down 1407310d99fSKrzysztof Kozlowski */ 1417310d99fSKrzysztof Kozlowski void exynos_cluster_power_down(int cluster) 1427310d99fSKrzysztof Kozlowski { 143944483d0SArnd Bergmann pmu_raw_writel(0, EXYNOS_COMMON_CONFIGURATION(cluster)); 1447310d99fSKrzysztof Kozlowski } 1457310d99fSKrzysztof Kozlowski 1467310d99fSKrzysztof Kozlowski /** 1477310d99fSKrzysztof Kozlowski * exynos_cluster_power_up : power up the specified cluster 1487310d99fSKrzysztof Kozlowski * @cluster : the cluster to power up 1497310d99fSKrzysztof Kozlowski */ 1507310d99fSKrzysztof Kozlowski void exynos_cluster_power_up(int cluster) 1517310d99fSKrzysztof Kozlowski { 152944483d0SArnd Bergmann pmu_raw_writel(S5P_CORE_LOCAL_PWR_EN, 1537310d99fSKrzysztof Kozlowski EXYNOS_COMMON_CONFIGURATION(cluster)); 1547310d99fSKrzysztof Kozlowski } 1557310d99fSKrzysztof Kozlowski 1567310d99fSKrzysztof Kozlowski /** 1577310d99fSKrzysztof Kozlowski * exynos_cluster_power_state : returns the power state of the cluster 1587310d99fSKrzysztof Kozlowski * @cluster : the cluster to retrieve the power state from 1597310d99fSKrzysztof Kozlowski * 1607310d99fSKrzysztof Kozlowski */ 1617310d99fSKrzysztof Kozlowski int exynos_cluster_power_state(int cluster) 1627310d99fSKrzysztof Kozlowski { 163944483d0SArnd Bergmann return (pmu_raw_readl(EXYNOS_COMMON_STATUS(cluster)) & 1647310d99fSKrzysztof Kozlowski S5P_CORE_LOCAL_PWR_EN); 1657310d99fSKrzysztof Kozlowski } 1667310d99fSKrzysztof Kozlowski 1673c33710bSPankaj Dubey /** 1683c33710bSPankaj Dubey * exynos_scu_enable : enables SCU for Cortex-A9 based system 1693c33710bSPankaj Dubey */ 1703c33710bSPankaj Dubey void exynos_scu_enable(void) 1713c33710bSPankaj Dubey { 1723c33710bSPankaj Dubey struct device_node *np; 1733c33710bSPankaj Dubey static void __iomem *scu_base; 1743c33710bSPankaj Dubey 1753c33710bSPankaj Dubey if (!scu_base) { 1763c33710bSPankaj Dubey np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu"); 1773c33710bSPankaj Dubey if (np) { 1783c33710bSPankaj Dubey scu_base = of_iomap(np, 0); 1793c33710bSPankaj Dubey of_node_put(np); 1803c33710bSPankaj Dubey } else { 1813c33710bSPankaj Dubey scu_base = ioremap(scu_a9_get_base(), SZ_4K); 1823c33710bSPankaj Dubey } 1833c33710bSPankaj Dubey } 1843c33710bSPankaj Dubey scu_enable(scu_base); 1853c33710bSPankaj Dubey } 1863c33710bSPankaj Dubey 187af997114SBartlomiej Zolnierkiewicz static void __iomem *cpu_boot_reg_base(void) 1881f054f52STomasz Figa { 189edaff7e1SArnd Bergmann if (soc_is_exynos4210() && exynos_rev() == EXYNOS4210_REV_1_1) 1902e94ac42SPankaj Dubey return pmu_base_addr + S5P_INFORM5; 191b3205deaSSachin Kamat return sysram_base_addr; 1921f054f52STomasz Figa } 1931f054f52STomasz Figa 1941f054f52STomasz Figa static inline void __iomem *cpu_boot_reg(int cpu) 1951f054f52STomasz Figa { 1961f054f52STomasz Figa void __iomem *boot_reg; 1971f054f52STomasz Figa 1981f054f52STomasz Figa boot_reg = cpu_boot_reg_base(); 199b3205deaSSachin Kamat if (!boot_reg) 2002cc6b813SKrzysztof Kozlowski return IOMEM_ERR_PTR(-ENODEV); 2011f054f52STomasz Figa if (soc_is_exynos4412()) 2021f054f52STomasz Figa boot_reg += 4*cpu; 20386c6f148SArun Kumar K else if (soc_is_exynos5420() || soc_is_exynos5800()) 2041580be3dSChander Kashyap boot_reg += 4; 2051f054f52STomasz Figa return boot_reg; 2061f054f52STomasz Figa } 20783014579SKukjin Kim 20883014579SKukjin Kim /* 209b588aaecSKrzysztof Kozlowski * Set wake up by local power mode and execute software reset for given core. 210b588aaecSKrzysztof Kozlowski * 211b588aaecSKrzysztof Kozlowski * Currently this is needed only when booting secondary CPU on Exynos3250. 212b588aaecSKrzysztof Kozlowski */ 213af997114SBartlomiej Zolnierkiewicz void exynos_core_restart(u32 core_id) 214b588aaecSKrzysztof Kozlowski { 21598a3308eSMarek Szyprowski unsigned int timeout = 16; 216b588aaecSKrzysztof Kozlowski u32 val; 217b588aaecSKrzysztof Kozlowski 218*970f6cf2SMarek Szyprowski if (!soc_is_exynos3250()) 219b588aaecSKrzysztof Kozlowski return; 220b588aaecSKrzysztof Kozlowski 22198a3308eSMarek Szyprowski while (timeout && !pmu_raw_readl(S5P_PMU_SPARE2)) { 22298a3308eSMarek Szyprowski timeout--; 223497ab3b3SBartlomiej Zolnierkiewicz udelay(10); 22498a3308eSMarek Szyprowski } 22598a3308eSMarek Szyprowski if (timeout == 0) { 22698a3308eSMarek Szyprowski pr_err("cpu core %u restart failed\n", core_id); 22798a3308eSMarek Szyprowski return; 22898a3308eSMarek Szyprowski } 229497ab3b3SBartlomiej Zolnierkiewicz udelay(10); 230497ab3b3SBartlomiej Zolnierkiewicz 231b588aaecSKrzysztof Kozlowski val = pmu_raw_readl(EXYNOS_ARM_CORE_STATUS(core_id)); 232b588aaecSKrzysztof Kozlowski val |= S5P_CORE_WAKEUP_FROM_LOCAL_CFG; 233b588aaecSKrzysztof Kozlowski pmu_raw_writel(val, EXYNOS_ARM_CORE_STATUS(core_id)); 234b588aaecSKrzysztof Kozlowski 235b588aaecSKrzysztof Kozlowski pmu_raw_writel(EXYNOS_CORE_PO_RESET(core_id), EXYNOS_SWRESET); 236b588aaecSKrzysztof Kozlowski } 237b588aaecSKrzysztof Kozlowski 238b588aaecSKrzysztof Kozlowski /* 2396213f70eSRussell King * XXX CARGO CULTED CODE - DO NOT COPY XXX 2406213f70eSRussell King * 2416213f70eSRussell King * Write exynos_pen_release in a way that is guaranteed to be visible to 2426213f70eSRussell King * all observers, irrespective of whether they're taking part in coherency 24383014579SKukjin Kim * or not. This is necessary for the hotplug code to work reliably. 24483014579SKukjin Kim */ 2456213f70eSRussell King static void exynos_write_pen_release(int val) 24683014579SKukjin Kim { 2476213f70eSRussell King exynos_pen_release = val; 24883014579SKukjin Kim smp_wmb(); 2496213f70eSRussell King sync_cache_w(&exynos_pen_release); 25083014579SKukjin Kim } 25183014579SKukjin Kim 25283014579SKukjin Kim static DEFINE_SPINLOCK(boot_lock); 25383014579SKukjin Kim 2548bd26e3aSPaul Gortmaker static void exynos_secondary_init(unsigned int cpu) 25583014579SKukjin Kim { 25683014579SKukjin Kim /* 25783014579SKukjin Kim * let the primary processor know we're out of the 25883014579SKukjin Kim * pen, then head off into the C entry point 25983014579SKukjin Kim */ 2606213f70eSRussell King exynos_write_pen_release(-1); 26183014579SKukjin Kim 26283014579SKukjin Kim /* 26383014579SKukjin Kim * Synchronise with the boot thread. 26483014579SKukjin Kim */ 26583014579SKukjin Kim spin_lock(&boot_lock); 26683014579SKukjin Kim spin_unlock(&boot_lock); 26783014579SKukjin Kim } 26883014579SKukjin Kim 269af997114SBartlomiej Zolnierkiewicz int exynos_set_boot_addr(u32 core_id, unsigned long boot_addr) 270955d4cf8SBartlomiej Zolnierkiewicz { 271955d4cf8SBartlomiej Zolnierkiewicz int ret; 272955d4cf8SBartlomiej Zolnierkiewicz 273955d4cf8SBartlomiej Zolnierkiewicz /* 274955d4cf8SBartlomiej Zolnierkiewicz * Try to set boot address using firmware first 275955d4cf8SBartlomiej Zolnierkiewicz * and fall back to boot register if it fails. 276955d4cf8SBartlomiej Zolnierkiewicz */ 277955d4cf8SBartlomiej Zolnierkiewicz ret = call_firmware_op(set_cpu_boot_addr, core_id, boot_addr); 278955d4cf8SBartlomiej Zolnierkiewicz if (ret && ret != -ENOSYS) 279955d4cf8SBartlomiej Zolnierkiewicz goto fail; 280955d4cf8SBartlomiej Zolnierkiewicz if (ret == -ENOSYS) { 281955d4cf8SBartlomiej Zolnierkiewicz void __iomem *boot_reg = cpu_boot_reg(core_id); 282955d4cf8SBartlomiej Zolnierkiewicz 283955d4cf8SBartlomiej Zolnierkiewicz if (IS_ERR(boot_reg)) { 284955d4cf8SBartlomiej Zolnierkiewicz ret = PTR_ERR(boot_reg); 285955d4cf8SBartlomiej Zolnierkiewicz goto fail; 286955d4cf8SBartlomiej Zolnierkiewicz } 287458ad21dSBen Dooks writel_relaxed(boot_addr, boot_reg); 288955d4cf8SBartlomiej Zolnierkiewicz ret = 0; 289955d4cf8SBartlomiej Zolnierkiewicz } 290955d4cf8SBartlomiej Zolnierkiewicz fail: 291955d4cf8SBartlomiej Zolnierkiewicz return ret; 292955d4cf8SBartlomiej Zolnierkiewicz } 293955d4cf8SBartlomiej Zolnierkiewicz 294af997114SBartlomiej Zolnierkiewicz int exynos_get_boot_addr(u32 core_id, unsigned long *boot_addr) 2951225ad72SBartlomiej Zolnierkiewicz { 2961225ad72SBartlomiej Zolnierkiewicz int ret; 2971225ad72SBartlomiej Zolnierkiewicz 2981225ad72SBartlomiej Zolnierkiewicz /* 2991225ad72SBartlomiej Zolnierkiewicz * Try to get boot address using firmware first 3001225ad72SBartlomiej Zolnierkiewicz * and fall back to boot register if it fails. 3011225ad72SBartlomiej Zolnierkiewicz */ 3021225ad72SBartlomiej Zolnierkiewicz ret = call_firmware_op(get_cpu_boot_addr, core_id, boot_addr); 3031225ad72SBartlomiej Zolnierkiewicz if (ret && ret != -ENOSYS) 3041225ad72SBartlomiej Zolnierkiewicz goto fail; 3051225ad72SBartlomiej Zolnierkiewicz if (ret == -ENOSYS) { 3061225ad72SBartlomiej Zolnierkiewicz void __iomem *boot_reg = cpu_boot_reg(core_id); 3071225ad72SBartlomiej Zolnierkiewicz 3081225ad72SBartlomiej Zolnierkiewicz if (IS_ERR(boot_reg)) { 3091225ad72SBartlomiej Zolnierkiewicz ret = PTR_ERR(boot_reg); 3101225ad72SBartlomiej Zolnierkiewicz goto fail; 3111225ad72SBartlomiej Zolnierkiewicz } 312458ad21dSBen Dooks *boot_addr = readl_relaxed(boot_reg); 3131225ad72SBartlomiej Zolnierkiewicz ret = 0; 3141225ad72SBartlomiej Zolnierkiewicz } 3151225ad72SBartlomiej Zolnierkiewicz fail: 3161225ad72SBartlomiej Zolnierkiewicz return ret; 3171225ad72SBartlomiej Zolnierkiewicz } 3181225ad72SBartlomiej Zolnierkiewicz 3198bd26e3aSPaul Gortmaker static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) 32083014579SKukjin Kim { 32183014579SKukjin Kim unsigned long timeout; 3229637f30eSTomasz Figa u32 mpidr = cpu_logical_map(cpu); 3239637f30eSTomasz Figa u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); 324b3205deaSSachin Kamat int ret = -ENOSYS; 32583014579SKukjin Kim 32683014579SKukjin Kim /* 32783014579SKukjin Kim * Set synchronisation state between this boot processor 32883014579SKukjin Kim * and the secondary one 32983014579SKukjin Kim */ 33083014579SKukjin Kim spin_lock(&boot_lock); 33183014579SKukjin Kim 33283014579SKukjin Kim /* 33383014579SKukjin Kim * The secondary processor is waiting to be released from 33483014579SKukjin Kim * the holding pen - release it, then wait for it to flag 3356213f70eSRussell King * that it has been released by resetting exynos_pen_release. 33683014579SKukjin Kim * 3376213f70eSRussell King * Note that "exynos_pen_release" is the hardware CPU core ID, whereas 33883014579SKukjin Kim * "cpu" is Linux's internal ID. 33983014579SKukjin Kim */ 3406213f70eSRussell King exynos_write_pen_release(core_id); 34183014579SKukjin Kim 3429637f30eSTomasz Figa if (!exynos_cpu_power_state(core_id)) { 3439637f30eSTomasz Figa exynos_cpu_power_up(core_id); 34483014579SKukjin Kim timeout = 10; 34583014579SKukjin Kim 34683014579SKukjin Kim /* wait max 10 ms until cpu1 is on */ 3479637f30eSTomasz Figa while (exynos_cpu_power_state(core_id) 3489637f30eSTomasz Figa != S5P_CORE_LOCAL_PWR_EN) { 3494bdf2f3fSStuart Menefy if (timeout == 0) 35083014579SKukjin Kim break; 3514bdf2f3fSStuart Menefy timeout--; 35283014579SKukjin Kim mdelay(1); 35383014579SKukjin Kim } 35483014579SKukjin Kim 35583014579SKukjin Kim if (timeout == 0) { 35683014579SKukjin Kim printk(KERN_ERR "cpu1 power enable failed"); 35783014579SKukjin Kim spin_unlock(&boot_lock); 35883014579SKukjin Kim return -ETIMEDOUT; 35983014579SKukjin Kim } 36083014579SKukjin Kim } 361b588aaecSKrzysztof Kozlowski 362b588aaecSKrzysztof Kozlowski exynos_core_restart(core_id); 363b588aaecSKrzysztof Kozlowski 36483014579SKukjin Kim /* 36583014579SKukjin Kim * Send the secondary CPU a soft interrupt, thereby causing 36683014579SKukjin Kim * the boot monitor to read the system wide flags register, 36783014579SKukjin Kim * and branch to the address found there. 36883014579SKukjin Kim */ 36983014579SKukjin Kim 37083014579SKukjin Kim timeout = jiffies + (1 * HZ); 37183014579SKukjin Kim while (time_before(jiffies, timeout)) { 372beddf63fSTomasz Figa unsigned long boot_addr; 373beddf63fSTomasz Figa 37483014579SKukjin Kim smp_rmb(); 37583014579SKukjin Kim 37664fc2a94SFlorian Fainelli boot_addr = __pa_symbol(exynos4_secondary_startup); 377beddf63fSTomasz Figa 378955d4cf8SBartlomiej Zolnierkiewicz ret = exynos_set_boot_addr(core_id, boot_addr); 379955d4cf8SBartlomiej Zolnierkiewicz if (ret) 380b3205deaSSachin Kamat goto fail; 381beddf63fSTomasz Figa 3829637f30eSTomasz Figa call_firmware_op(cpu_boot, core_id); 383beddf63fSTomasz Figa 384497ab3b3SBartlomiej Zolnierkiewicz if (soc_is_exynos3250()) 385497ab3b3SBartlomiej Zolnierkiewicz dsb_sev(); 386497ab3b3SBartlomiej Zolnierkiewicz else 387b1cffebfSRob Herring arch_send_wakeup_ipi_mask(cpumask_of(cpu)); 38883014579SKukjin Kim 3896213f70eSRussell King if (exynos_pen_release == -1) 39083014579SKukjin Kim break; 39183014579SKukjin Kim 39283014579SKukjin Kim udelay(10); 39383014579SKukjin Kim } 39483014579SKukjin Kim 3956213f70eSRussell King if (exynos_pen_release != -1) 3969f294c17SBartlomiej Zolnierkiewicz ret = -ETIMEDOUT; 3979f294c17SBartlomiej Zolnierkiewicz 39883014579SKukjin Kim /* 39983014579SKukjin Kim * now the secondary core is starting up let it run its 40083014579SKukjin Kim * calibrations, then wait for it to finish 40183014579SKukjin Kim */ 402b3205deaSSachin Kamat fail: 40383014579SKukjin Kim spin_unlock(&boot_lock); 40483014579SKukjin Kim 4056213f70eSRussell King return exynos_pen_release != -1 ? ret : 0; 40683014579SKukjin Kim } 40783014579SKukjin Kim 40806853ae4SMarc Zyngier static void __init exynos_smp_prepare_cpus(unsigned int max_cpus) 40983014579SKukjin Kim { 4101754c42eSOlof Johansson exynos_sysram_init(); 4111754c42eSOlof Johansson 4126f024978SKrzysztof Kozlowski exynos_set_delayed_reset_assertion(true); 4136f024978SKrzysztof Kozlowski 414af040ffcSRussell King if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) 4153c33710bSPankaj Dubey exynos_scu_enable(); 416b3205deaSSachin Kamat } 41706853ae4SMarc Zyngier 4186f0b7c0cSKrzysztof Kozlowski #ifdef CONFIG_HOTPLUG_CPU 4196f0b7c0cSKrzysztof Kozlowski /* 4206f0b7c0cSKrzysztof Kozlowski * platform-specific code to shutdown a CPU 4216f0b7c0cSKrzysztof Kozlowski * 4226f0b7c0cSKrzysztof Kozlowski * Called with IRQs disabled 4236f0b7c0cSKrzysztof Kozlowski */ 42427b9ee85SKrzysztof Kozlowski static void exynos_cpu_die(unsigned int cpu) 4256f0b7c0cSKrzysztof Kozlowski { 4266f0b7c0cSKrzysztof Kozlowski int spurious = 0; 42713cfa6c4SKrzysztof Kozlowski u32 mpidr = cpu_logical_map(cpu); 42813cfa6c4SKrzysztof Kozlowski u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); 4296f0b7c0cSKrzysztof Kozlowski 4306f0b7c0cSKrzysztof Kozlowski v7_exit_coherency_flush(louis); 4316f0b7c0cSKrzysztof Kozlowski 4326f0b7c0cSKrzysztof Kozlowski platform_do_lowpower(cpu, &spurious); 4336f0b7c0cSKrzysztof Kozlowski 4346f0b7c0cSKrzysztof Kozlowski /* 4356f0b7c0cSKrzysztof Kozlowski * bring this CPU back into the world of cache 4366f0b7c0cSKrzysztof Kozlowski * coherency, and then restore interrupts 4376f0b7c0cSKrzysztof Kozlowski */ 43813cfa6c4SKrzysztof Kozlowski cpu_leave_lowpower(core_id); 4396f0b7c0cSKrzysztof Kozlowski 4406f0b7c0cSKrzysztof Kozlowski if (spurious) 4416f0b7c0cSKrzysztof Kozlowski pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious); 4426f0b7c0cSKrzysztof Kozlowski } 4436f0b7c0cSKrzysztof Kozlowski #endif /* CONFIG_HOTPLUG_CPU */ 4446f0b7c0cSKrzysztof Kozlowski 44575305275SMasahiro Yamada const struct smp_operations exynos_smp_ops __initconst = { 44606853ae4SMarc Zyngier .smp_prepare_cpus = exynos_smp_prepare_cpus, 44706853ae4SMarc Zyngier .smp_secondary_init = exynos_secondary_init, 44806853ae4SMarc Zyngier .smp_boot_secondary = exynos_boot_secondary, 44906853ae4SMarc Zyngier #ifdef CONFIG_HOTPLUG_CPU 45006853ae4SMarc Zyngier .cpu_die = exynos_cpu_die, 45106853ae4SMarc Zyngier #endif 45206853ae4SMarc Zyngier }; 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