19eb8f674SGrant Likely /* 29eb8f674SGrant Likely * linux/arch/arm/kernel/devtree.c 39eb8f674SGrant Likely * 49eb8f674SGrant Likely * Copyright (C) 2009 Canonical Ltd. <jeremy.kerr@canonical.com> 59eb8f674SGrant Likely * 69eb8f674SGrant Likely * This program is free software; you can redistribute it and/or modify 79eb8f674SGrant Likely * it under the terms of the GNU General Public License version 2 as 89eb8f674SGrant Likely * published by the Free Software Foundation. 99eb8f674SGrant Likely */ 109eb8f674SGrant Likely 119eb8f674SGrant Likely #include <linux/init.h> 12ecea4ab6SPaul Gortmaker #include <linux/export.h> 139eb8f674SGrant Likely #include <linux/errno.h> 149eb8f674SGrant Likely #include <linux/types.h> 159eb8f674SGrant Likely #include <linux/bootmem.h> 169eb8f674SGrant Likely #include <linux/memblock.h> 179eb8f674SGrant Likely #include <linux/of.h> 189eb8f674SGrant Likely #include <linux/of_fdt.h> 199eb8f674SGrant Likely #include <linux/of_irq.h> 209eb8f674SGrant Likely #include <linux/of_platform.h> 216c3ff8b1SStephen Boyd #include <linux/smp.h> 229eb8f674SGrant Likely 23a0ae0240SLorenzo Pieralisi #include <asm/cputype.h> 249eb8f674SGrant Likely #include <asm/setup.h> 259eb8f674SGrant Likely #include <asm/page.h> 262374b063SBen Dooks #include <asm/prom.h> 27a0ae0240SLorenzo Pieralisi #include <asm/smp_plat.h> 2893c02ab4SGrant Likely #include <asm/mach/arch.h> 2993c02ab4SGrant Likely #include <asm/mach-types.h> 309eb8f674SGrant Likely 319eb8f674SGrant Likely 326c3ff8b1SStephen Boyd #ifdef CONFIG_SMP 339a721c41SRob Herring extern struct of_cpu_method __cpu_method_of_table[]; 349a721c41SRob Herring 359a721c41SRob Herring static const struct of_cpu_method __cpu_method_of_table_sentinel 369a721c41SRob Herring __used __section(__cpu_method_of_table_end); 379a721c41SRob Herring 386c3ff8b1SStephen Boyd 396c3ff8b1SStephen Boyd static int __init set_smp_ops_by_method(struct device_node *node) 406c3ff8b1SStephen Boyd { 416c3ff8b1SStephen Boyd const char *method; 429a721c41SRob Herring struct of_cpu_method *m = __cpu_method_of_table; 436c3ff8b1SStephen Boyd 446c3ff8b1SStephen Boyd if (of_property_read_string(node, "enable-method", &method)) 456c3ff8b1SStephen Boyd return 0; 466c3ff8b1SStephen Boyd 479a721c41SRob Herring for (; m->method; m++) 486c3ff8b1SStephen Boyd if (!strcmp(m->method, method)) { 496c3ff8b1SStephen Boyd smp_set_ops(m->ops); 506c3ff8b1SStephen Boyd return 1; 516c3ff8b1SStephen Boyd } 526c3ff8b1SStephen Boyd 536c3ff8b1SStephen Boyd return 0; 546c3ff8b1SStephen Boyd } 556c3ff8b1SStephen Boyd #else 566c3ff8b1SStephen Boyd static inline int set_smp_ops_by_method(struct device_node *node) 576c3ff8b1SStephen Boyd { 586c3ff8b1SStephen Boyd return 1; 596c3ff8b1SStephen Boyd } 606c3ff8b1SStephen Boyd #endif 616c3ff8b1SStephen Boyd 626c3ff8b1SStephen Boyd 63a0ae0240SLorenzo Pieralisi /* 64a0ae0240SLorenzo Pieralisi * arm_dt_init_cpu_maps - Function retrieves cpu nodes from the device tree 65a0ae0240SLorenzo Pieralisi * and builds the cpu logical map array containing MPIDR values related to 66a0ae0240SLorenzo Pieralisi * logical cpus 67a0ae0240SLorenzo Pieralisi * 68a0ae0240SLorenzo Pieralisi * Updates the cpu possible mask with the number of parsed cpu nodes 69a0ae0240SLorenzo Pieralisi */ 70a0ae0240SLorenzo Pieralisi void __init arm_dt_init_cpu_maps(void) 71a0ae0240SLorenzo Pieralisi { 72a0ae0240SLorenzo Pieralisi /* 73a0ae0240SLorenzo Pieralisi * Temp logical map is initialized with UINT_MAX values that are 74a0ae0240SLorenzo Pieralisi * considered invalid logical map entries since the logical map must 75a0ae0240SLorenzo Pieralisi * contain a list of MPIDR[23:0] values where MPIDR[31:24] must 76a0ae0240SLorenzo Pieralisi * read as 0. 77a0ae0240SLorenzo Pieralisi */ 78a0ae0240SLorenzo Pieralisi struct device_node *cpu, *cpus; 796c3ff8b1SStephen Boyd int found_method = 0; 80a0ae0240SLorenzo Pieralisi u32 i, j, cpuidx = 1; 81a0ae0240SLorenzo Pieralisi u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0; 82a0ae0240SLorenzo Pieralisi 8318d7f152SLorenzo Pieralisi u32 tmp_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID }; 84a0ae0240SLorenzo Pieralisi bool bootcpu_valid = false; 85a0ae0240SLorenzo Pieralisi cpus = of_find_node_by_path("/cpus"); 86a0ae0240SLorenzo Pieralisi 87a0ae0240SLorenzo Pieralisi if (!cpus) 88a0ae0240SLorenzo Pieralisi return; 89a0ae0240SLorenzo Pieralisi 90a0ae0240SLorenzo Pieralisi for_each_child_of_node(cpus, cpu) { 91ba6dea4fSRobin Murphy const __be32 *cell; 92ba6dea4fSRobin Murphy int prop_bytes; 93a0ae0240SLorenzo Pieralisi u32 hwid; 94a0ae0240SLorenzo Pieralisi 951ba9bf0aSLorenzo Pieralisi if (of_node_cmp(cpu->type, "cpu")) 961ba9bf0aSLorenzo Pieralisi continue; 971ba9bf0aSLorenzo Pieralisi 98*a8e65e06SRob Herring pr_debug(" * %pOF...\n", cpu); 99a0ae0240SLorenzo Pieralisi /* 100a0ae0240SLorenzo Pieralisi * A device tree containing CPU nodes with missing "reg" 101a0ae0240SLorenzo Pieralisi * properties is considered invalid to build the 102a0ae0240SLorenzo Pieralisi * cpu_logical_map. 103a0ae0240SLorenzo Pieralisi */ 104ba6dea4fSRobin Murphy cell = of_get_property(cpu, "reg", &prop_bytes); 105ba6dea4fSRobin Murphy if (!cell || prop_bytes < sizeof(*cell)) { 106*a8e65e06SRob Herring pr_debug(" * %pOF missing reg property\n", cpu); 107a4283e41SJulia Lawall of_node_put(cpu); 108a0ae0240SLorenzo Pieralisi return; 109a0ae0240SLorenzo Pieralisi } 110a0ae0240SLorenzo Pieralisi 111a0ae0240SLorenzo Pieralisi /* 112ba6dea4fSRobin Murphy * Bits n:24 must be set to 0 in the DT since the reg property 113a0ae0240SLorenzo Pieralisi * defines the MPIDR[23:0]. 114a0ae0240SLorenzo Pieralisi */ 115ba6dea4fSRobin Murphy do { 116ba6dea4fSRobin Murphy hwid = be32_to_cpu(*cell++); 117ba6dea4fSRobin Murphy prop_bytes -= sizeof(*cell); 118ba6dea4fSRobin Murphy } while (!hwid && prop_bytes > 0); 119ba6dea4fSRobin Murphy 120ba6dea4fSRobin Murphy if (prop_bytes || (hwid & ~MPIDR_HWID_BITMASK)) { 121a4283e41SJulia Lawall of_node_put(cpu); 122a0ae0240SLorenzo Pieralisi return; 123a4283e41SJulia Lawall } 124a0ae0240SLorenzo Pieralisi 125a0ae0240SLorenzo Pieralisi /* 126a0ae0240SLorenzo Pieralisi * Duplicate MPIDRs are a recipe for disaster. 127a0ae0240SLorenzo Pieralisi * Scan all initialized entries and check for 128a0ae0240SLorenzo Pieralisi * duplicates. If any is found just bail out. 129a0ae0240SLorenzo Pieralisi * temp values were initialized to UINT_MAX 130a0ae0240SLorenzo Pieralisi * to avoid matching valid MPIDR[23:0] values. 131a0ae0240SLorenzo Pieralisi */ 132a0ae0240SLorenzo Pieralisi for (j = 0; j < cpuidx; j++) 133a4283e41SJulia Lawall if (WARN(tmp_map[j] == hwid, 134a4283e41SJulia Lawall "Duplicate /cpu reg properties in the DT\n")) { 135a4283e41SJulia Lawall of_node_put(cpu); 136a0ae0240SLorenzo Pieralisi return; 137a4283e41SJulia Lawall } 138a0ae0240SLorenzo Pieralisi 139a0ae0240SLorenzo Pieralisi /* 140a0ae0240SLorenzo Pieralisi * Build a stashed array of MPIDR values. Numbering scheme 141a0ae0240SLorenzo Pieralisi * requires that if detected the boot CPU must be assigned 142a0ae0240SLorenzo Pieralisi * logical id 0. Other CPUs get sequential indexes starting 143a0ae0240SLorenzo Pieralisi * from 1. If a CPU node with a reg property matching the 144a0ae0240SLorenzo Pieralisi * boot CPU MPIDR is detected, this is recorded so that the 145a0ae0240SLorenzo Pieralisi * logical map built from DT is validated and can be used 146a0ae0240SLorenzo Pieralisi * to override the map created in smp_setup_processor_id(). 147a0ae0240SLorenzo Pieralisi */ 148a0ae0240SLorenzo Pieralisi if (hwid == mpidr) { 149a0ae0240SLorenzo Pieralisi i = 0; 150a0ae0240SLorenzo Pieralisi bootcpu_valid = true; 151a0ae0240SLorenzo Pieralisi } else { 152a0ae0240SLorenzo Pieralisi i = cpuidx++; 153a0ae0240SLorenzo Pieralisi } 154a0ae0240SLorenzo Pieralisi 155ce7b1756SLorenzo Pieralisi if (WARN(cpuidx > nr_cpu_ids, "DT /cpu %u nodes greater than " 156ce7b1756SLorenzo Pieralisi "max cores %u, capping them\n", 157ce7b1756SLorenzo Pieralisi cpuidx, nr_cpu_ids)) { 158ce7b1756SLorenzo Pieralisi cpuidx = nr_cpu_ids; 159a4283e41SJulia Lawall of_node_put(cpu); 160a0ae0240SLorenzo Pieralisi break; 161a0ae0240SLorenzo Pieralisi } 162a0ae0240SLorenzo Pieralisi 163ce7b1756SLorenzo Pieralisi tmp_map[i] = hwid; 1646c3ff8b1SStephen Boyd 1656c3ff8b1SStephen Boyd if (!found_method) 1666c3ff8b1SStephen Boyd found_method = set_smp_ops_by_method(cpu); 167ce7b1756SLorenzo Pieralisi } 168ce7b1756SLorenzo Pieralisi 1696c3ff8b1SStephen Boyd /* 1706c3ff8b1SStephen Boyd * Fallback to an enable-method in the cpus node if nothing found in 1716c3ff8b1SStephen Boyd * a cpu node. 1726c3ff8b1SStephen Boyd */ 1736c3ff8b1SStephen Boyd if (!found_method) 1746c3ff8b1SStephen Boyd set_smp_ops_by_method(cpus); 1756c3ff8b1SStephen Boyd 1768d5bc1a6SOlof Johansson if (!bootcpu_valid) { 1778d5bc1a6SOlof Johansson pr_warn("DT missing boot CPU MPIDR[23:0], fall back to default cpu_logical_map\n"); 178a0ae0240SLorenzo Pieralisi return; 1798d5bc1a6SOlof Johansson } 180a0ae0240SLorenzo Pieralisi 181a0ae0240SLorenzo Pieralisi /* 182a0ae0240SLorenzo Pieralisi * Since the boot CPU node contains proper data, and all nodes have 183a0ae0240SLorenzo Pieralisi * a reg property, the DT CPU list can be considered valid and the 184a0ae0240SLorenzo Pieralisi * logical map created in smp_setup_processor_id() can be overridden 185a0ae0240SLorenzo Pieralisi */ 186a0ae0240SLorenzo Pieralisi for (i = 0; i < cpuidx; i++) { 187a0ae0240SLorenzo Pieralisi set_cpu_possible(i, true); 188a0ae0240SLorenzo Pieralisi cpu_logical_map(i) = tmp_map[i]; 189a0ae0240SLorenzo Pieralisi pr_debug("cpu logical map 0x%x\n", cpu_logical_map(i)); 190a0ae0240SLorenzo Pieralisi } 191a0ae0240SLorenzo Pieralisi } 192a0ae0240SLorenzo Pieralisi 193973e02c1SSudeep KarkadaNagesha bool arch_match_cpu_phys_id(int cpu, u64 phys_id) 194973e02c1SSudeep KarkadaNagesha { 195e44ef891SSudeep Holla return phys_id == cpu_logical_map(cpu); 196973e02c1SSudeep KarkadaNagesha } 197973e02c1SSudeep KarkadaNagesha 1986d67a9f6SRob Herring static const void * __init arch_get_next_mach(const char *const **match) 1996d67a9f6SRob Herring { 2006d67a9f6SRob Herring static const struct machine_desc *mdesc = __arch_info_begin; 2016d67a9f6SRob Herring const struct machine_desc *m = mdesc; 2026d67a9f6SRob Herring 2036d67a9f6SRob Herring if (m >= __arch_info_end) 2046d67a9f6SRob Herring return NULL; 2056d67a9f6SRob Herring 2066d67a9f6SRob Herring mdesc++; 2076d67a9f6SRob Herring *match = m->dt_compat; 2086d67a9f6SRob Herring return m; 2096d67a9f6SRob Herring } 2106d67a9f6SRob Herring 21193c02ab4SGrant Likely /** 21293c02ab4SGrant Likely * setup_machine_fdt - Machine setup when an dtb was passed to the kernel 21393c02ab4SGrant Likely * @dt_phys: physical address of dt blob 21493c02ab4SGrant Likely * 21593c02ab4SGrant Likely * If a dtb was passed to the kernel in r2, then use it to choose the 21693c02ab4SGrant Likely * correct machine_desc and to setup the system. 21793c02ab4SGrant Likely */ 218ff69a4c8SRussell King const struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys) 21993c02ab4SGrant Likely { 220ff69a4c8SRussell King const struct machine_desc *mdesc, *mdesc_best = NULL; 22193c02ab4SGrant Likely 22270722803SArnd Bergmann #if defined(CONFIG_ARCH_MULTIPLATFORM) || defined(CONFIG_ARM_SINGLE_ARMV7M) 223883a106bSArnd Bergmann DT_MACHINE_START(GENERIC_DT, "Generic DT based system") 224cb6f8344SLinus Walleij .l2c_aux_val = 0x0, 225cb6f8344SLinus Walleij .l2c_aux_mask = ~0x0, 226883a106bSArnd Bergmann MACHINE_END 227883a106bSArnd Bergmann 228ff69a4c8SRussell King mdesc_best = &__mach_desc_GENERIC_DT; 229883a106bSArnd Bergmann #endif 230883a106bSArnd Bergmann 2315a12a597SLaura Abbott if (!dt_phys || !early_init_dt_verify(phys_to_virt(dt_phys))) 232f506cd48SNicolas Pitre return NULL; 233f506cd48SNicolas Pitre 2346d67a9f6SRob Herring mdesc = of_flat_dt_match_machine(mdesc_best, arch_get_next_mach); 23593c02ab4SGrant Likely 2366d67a9f6SRob Herring if (!mdesc) { 23793c02ab4SGrant Likely const char *prop; 2389d0c4dfeSRob Herring int size; 2396d67a9f6SRob Herring unsigned long dt_root; 24093c02ab4SGrant Likely 24193c02ab4SGrant Likely early_print("\nError: unrecognized/unsupported " 24293c02ab4SGrant Likely "device tree compatible list:\n[ "); 24393c02ab4SGrant Likely 2446d67a9f6SRob Herring dt_root = of_get_flat_dt_root(); 24593c02ab4SGrant Likely prop = of_get_flat_dt_prop(dt_root, "compatible", &size); 24693c02ab4SGrant Likely while (size > 0) { 24793c02ab4SGrant Likely early_print("'%s' ", prop); 24893c02ab4SGrant Likely size -= strlen(prop) + 1; 24993c02ab4SGrant Likely prop += strlen(prop) + 1; 25093c02ab4SGrant Likely } 25193c02ab4SGrant Likely early_print("]\n\n"); 25293c02ab4SGrant Likely 25393c02ab4SGrant Likely dump_machine_table(); /* does not return */ 25493c02ab4SGrant Likely } 25593c02ab4SGrant Likely 2565a12a597SLaura Abbott /* We really don't want to do this, but sometimes firmware provides buggy data */ 2575a12a597SLaura Abbott if (mdesc->dt_fixup) 2585a12a597SLaura Abbott mdesc->dt_fixup(); 2595a12a597SLaura Abbott 2605a12a597SLaura Abbott early_init_dt_scan_nodes(); 2615a12a597SLaura Abbott 26293c02ab4SGrant Likely /* Change machine number to match the mdesc we're using */ 2636d67a9f6SRob Herring __machine_arch_type = mdesc->nr; 26493c02ab4SGrant Likely 2656d67a9f6SRob Herring return mdesc; 26693c02ab4SGrant Likely } 267