xref: /openbmc/linux/arch/arm/kernel/devtree.c (revision a0ae02405076ac32bd17ece976e914b5b6075bb0)
19eb8f674SGrant Likely /*
29eb8f674SGrant Likely  *  linux/arch/arm/kernel/devtree.c
39eb8f674SGrant Likely  *
49eb8f674SGrant Likely  *  Copyright (C) 2009 Canonical Ltd. <jeremy.kerr@canonical.com>
59eb8f674SGrant Likely  *
69eb8f674SGrant Likely  * This program is free software; you can redistribute it and/or modify
79eb8f674SGrant Likely  * it under the terms of the GNU General Public License version 2 as
89eb8f674SGrant Likely  * published by the Free Software Foundation.
99eb8f674SGrant Likely  */
109eb8f674SGrant Likely 
119eb8f674SGrant Likely #include <linux/init.h>
12ecea4ab6SPaul Gortmaker #include <linux/export.h>
139eb8f674SGrant Likely #include <linux/errno.h>
149eb8f674SGrant Likely #include <linux/types.h>
159eb8f674SGrant Likely #include <linux/bootmem.h>
169eb8f674SGrant Likely #include <linux/memblock.h>
179eb8f674SGrant Likely #include <linux/of.h>
189eb8f674SGrant Likely #include <linux/of_fdt.h>
199eb8f674SGrant Likely #include <linux/of_irq.h>
209eb8f674SGrant Likely #include <linux/of_platform.h>
219eb8f674SGrant Likely 
22*a0ae0240SLorenzo Pieralisi #include <asm/cputype.h>
239eb8f674SGrant Likely #include <asm/setup.h>
249eb8f674SGrant Likely #include <asm/page.h>
25*a0ae0240SLorenzo Pieralisi #include <asm/smp_plat.h>
2693c02ab4SGrant Likely #include <asm/mach/arch.h>
2793c02ab4SGrant Likely #include <asm/mach-types.h>
289eb8f674SGrant Likely 
299eb8f674SGrant Likely void __init early_init_dt_add_memory_arch(u64 base, u64 size)
309eb8f674SGrant Likely {
319eb8f674SGrant Likely 	arm_add_memory(base, size);
329eb8f674SGrant Likely }
339eb8f674SGrant Likely 
349eb8f674SGrant Likely void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
359eb8f674SGrant Likely {
369eb8f674SGrant Likely 	return alloc_bootmem_align(size, align);
379eb8f674SGrant Likely }
389eb8f674SGrant Likely 
3993c02ab4SGrant Likely void __init arm_dt_memblock_reserve(void)
4093c02ab4SGrant Likely {
4193c02ab4SGrant Likely 	u64 *reserve_map, base, size;
4293c02ab4SGrant Likely 
4393c02ab4SGrant Likely 	if (!initial_boot_params)
4493c02ab4SGrant Likely 		return;
4593c02ab4SGrant Likely 
4693c02ab4SGrant Likely 	/* Reserve the dtb region */
4793c02ab4SGrant Likely 	memblock_reserve(virt_to_phys(initial_boot_params),
4893c02ab4SGrant Likely 			 be32_to_cpu(initial_boot_params->totalsize));
4993c02ab4SGrant Likely 
5093c02ab4SGrant Likely 	/*
5193c02ab4SGrant Likely 	 * Process the reserve map.  This will probably overlap the initrd
5293c02ab4SGrant Likely 	 * and dtb locations which are already reserved, but overlaping
5393c02ab4SGrant Likely 	 * doesn't hurt anything
5493c02ab4SGrant Likely 	 */
5593c02ab4SGrant Likely 	reserve_map = ((void*)initial_boot_params) +
5693c02ab4SGrant Likely 			be32_to_cpu(initial_boot_params->off_mem_rsvmap);
5793c02ab4SGrant Likely 	while (1) {
5893c02ab4SGrant Likely 		base = be64_to_cpup(reserve_map++);
5993c02ab4SGrant Likely 		size = be64_to_cpup(reserve_map++);
6093c02ab4SGrant Likely 		if (!size)
6193c02ab4SGrant Likely 			break;
6293c02ab4SGrant Likely 		memblock_reserve(base, size);
6393c02ab4SGrant Likely 	}
6493c02ab4SGrant Likely }
6593c02ab4SGrant Likely 
66*a0ae0240SLorenzo Pieralisi /*
67*a0ae0240SLorenzo Pieralisi  * arm_dt_init_cpu_maps - Function retrieves cpu nodes from the device tree
68*a0ae0240SLorenzo Pieralisi  * and builds the cpu logical map array containing MPIDR values related to
69*a0ae0240SLorenzo Pieralisi  * logical cpus
70*a0ae0240SLorenzo Pieralisi  *
71*a0ae0240SLorenzo Pieralisi  * Updates the cpu possible mask with the number of parsed cpu nodes
72*a0ae0240SLorenzo Pieralisi  */
73*a0ae0240SLorenzo Pieralisi void __init arm_dt_init_cpu_maps(void)
74*a0ae0240SLorenzo Pieralisi {
75*a0ae0240SLorenzo Pieralisi 	/*
76*a0ae0240SLorenzo Pieralisi 	 * Temp logical map is initialized with UINT_MAX values that are
77*a0ae0240SLorenzo Pieralisi 	 * considered invalid logical map entries since the logical map must
78*a0ae0240SLorenzo Pieralisi 	 * contain a list of MPIDR[23:0] values where MPIDR[31:24] must
79*a0ae0240SLorenzo Pieralisi 	 * read as 0.
80*a0ae0240SLorenzo Pieralisi 	 */
81*a0ae0240SLorenzo Pieralisi 	struct device_node *cpu, *cpus;
82*a0ae0240SLorenzo Pieralisi 	u32 i, j, cpuidx = 1;
83*a0ae0240SLorenzo Pieralisi 	u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0;
84*a0ae0240SLorenzo Pieralisi 
85*a0ae0240SLorenzo Pieralisi 	u32 tmp_map[NR_CPUS] = { [0 ... NR_CPUS-1] = UINT_MAX };
86*a0ae0240SLorenzo Pieralisi 	bool bootcpu_valid = false;
87*a0ae0240SLorenzo Pieralisi 	cpus = of_find_node_by_path("/cpus");
88*a0ae0240SLorenzo Pieralisi 
89*a0ae0240SLorenzo Pieralisi 	if (!cpus)
90*a0ae0240SLorenzo Pieralisi 		return;
91*a0ae0240SLorenzo Pieralisi 
92*a0ae0240SLorenzo Pieralisi 	for_each_child_of_node(cpus, cpu) {
93*a0ae0240SLorenzo Pieralisi 		u32 hwid;
94*a0ae0240SLorenzo Pieralisi 
95*a0ae0240SLorenzo Pieralisi 		pr_debug(" * %s...\n", cpu->full_name);
96*a0ae0240SLorenzo Pieralisi 		/*
97*a0ae0240SLorenzo Pieralisi 		 * A device tree containing CPU nodes with missing "reg"
98*a0ae0240SLorenzo Pieralisi 		 * properties is considered invalid to build the
99*a0ae0240SLorenzo Pieralisi 		 * cpu_logical_map.
100*a0ae0240SLorenzo Pieralisi 		 */
101*a0ae0240SLorenzo Pieralisi 		if (of_property_read_u32(cpu, "reg", &hwid)) {
102*a0ae0240SLorenzo Pieralisi 			pr_debug(" * %s missing reg property\n",
103*a0ae0240SLorenzo Pieralisi 				     cpu->full_name);
104*a0ae0240SLorenzo Pieralisi 			return;
105*a0ae0240SLorenzo Pieralisi 		}
106*a0ae0240SLorenzo Pieralisi 
107*a0ae0240SLorenzo Pieralisi 		/*
108*a0ae0240SLorenzo Pieralisi 		 * 8 MSBs must be set to 0 in the DT since the reg property
109*a0ae0240SLorenzo Pieralisi 		 * defines the MPIDR[23:0].
110*a0ae0240SLorenzo Pieralisi 		 */
111*a0ae0240SLorenzo Pieralisi 		if (hwid & ~MPIDR_HWID_BITMASK)
112*a0ae0240SLorenzo Pieralisi 			return;
113*a0ae0240SLorenzo Pieralisi 
114*a0ae0240SLorenzo Pieralisi 		/*
115*a0ae0240SLorenzo Pieralisi 		 * Duplicate MPIDRs are a recipe for disaster.
116*a0ae0240SLorenzo Pieralisi 		 * Scan all initialized entries and check for
117*a0ae0240SLorenzo Pieralisi 		 * duplicates. If any is found just bail out.
118*a0ae0240SLorenzo Pieralisi 		 * temp values were initialized to UINT_MAX
119*a0ae0240SLorenzo Pieralisi 		 * to avoid matching valid MPIDR[23:0] values.
120*a0ae0240SLorenzo Pieralisi 		 */
121*a0ae0240SLorenzo Pieralisi 		for (j = 0; j < cpuidx; j++)
122*a0ae0240SLorenzo Pieralisi 			if (WARN(tmp_map[j] == hwid, "Duplicate /cpu reg "
123*a0ae0240SLorenzo Pieralisi 						     "properties in the DT\n"))
124*a0ae0240SLorenzo Pieralisi 				return;
125*a0ae0240SLorenzo Pieralisi 
126*a0ae0240SLorenzo Pieralisi 		/*
127*a0ae0240SLorenzo Pieralisi 		 * Build a stashed array of MPIDR values. Numbering scheme
128*a0ae0240SLorenzo Pieralisi 		 * requires that if detected the boot CPU must be assigned
129*a0ae0240SLorenzo Pieralisi 		 * logical id 0. Other CPUs get sequential indexes starting
130*a0ae0240SLorenzo Pieralisi 		 * from 1. If a CPU node with a reg property matching the
131*a0ae0240SLorenzo Pieralisi 		 * boot CPU MPIDR is detected, this is recorded so that the
132*a0ae0240SLorenzo Pieralisi 		 * logical map built from DT is validated and can be used
133*a0ae0240SLorenzo Pieralisi 		 * to override the map created in smp_setup_processor_id().
134*a0ae0240SLorenzo Pieralisi 		 */
135*a0ae0240SLorenzo Pieralisi 		if (hwid == mpidr) {
136*a0ae0240SLorenzo Pieralisi 			i = 0;
137*a0ae0240SLorenzo Pieralisi 			bootcpu_valid = true;
138*a0ae0240SLorenzo Pieralisi 		} else {
139*a0ae0240SLorenzo Pieralisi 			i = cpuidx++;
140*a0ae0240SLorenzo Pieralisi 		}
141*a0ae0240SLorenzo Pieralisi 
142*a0ae0240SLorenzo Pieralisi 		tmp_map[i] = hwid;
143*a0ae0240SLorenzo Pieralisi 
144*a0ae0240SLorenzo Pieralisi 		if (cpuidx > nr_cpu_ids)
145*a0ae0240SLorenzo Pieralisi 			break;
146*a0ae0240SLorenzo Pieralisi 	}
147*a0ae0240SLorenzo Pieralisi 
148*a0ae0240SLorenzo Pieralisi 	if (WARN(!bootcpu_valid, "DT missing boot CPU MPIDR[23:0], "
149*a0ae0240SLorenzo Pieralisi 				 "fall back to default cpu_logical_map\n"))
150*a0ae0240SLorenzo Pieralisi 		return;
151*a0ae0240SLorenzo Pieralisi 
152*a0ae0240SLorenzo Pieralisi 	/*
153*a0ae0240SLorenzo Pieralisi 	 * Since the boot CPU node contains proper data, and all nodes have
154*a0ae0240SLorenzo Pieralisi 	 * a reg property, the DT CPU list can be considered valid and the
155*a0ae0240SLorenzo Pieralisi 	 * logical map created in smp_setup_processor_id() can be overridden
156*a0ae0240SLorenzo Pieralisi 	 */
157*a0ae0240SLorenzo Pieralisi 	for (i = 0; i < cpuidx; i++) {
158*a0ae0240SLorenzo Pieralisi 		set_cpu_possible(i, true);
159*a0ae0240SLorenzo Pieralisi 		cpu_logical_map(i) = tmp_map[i];
160*a0ae0240SLorenzo Pieralisi 		pr_debug("cpu logical map 0x%x\n", cpu_logical_map(i));
161*a0ae0240SLorenzo Pieralisi 	}
162*a0ae0240SLorenzo Pieralisi }
163*a0ae0240SLorenzo Pieralisi 
16493c02ab4SGrant Likely /**
16593c02ab4SGrant Likely  * setup_machine_fdt - Machine setup when an dtb was passed to the kernel
16693c02ab4SGrant Likely  * @dt_phys: physical address of dt blob
16793c02ab4SGrant Likely  *
16893c02ab4SGrant Likely  * If a dtb was passed to the kernel in r2, then use it to choose the
16993c02ab4SGrant Likely  * correct machine_desc and to setup the system.
17093c02ab4SGrant Likely  */
17193c02ab4SGrant Likely struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys)
17293c02ab4SGrant Likely {
17393c02ab4SGrant Likely 	struct boot_param_header *devtree;
17493c02ab4SGrant Likely 	struct machine_desc *mdesc, *mdesc_best = NULL;
17593c02ab4SGrant Likely 	unsigned int score, mdesc_score = ~1;
17693c02ab4SGrant Likely 	unsigned long dt_root;
17793c02ab4SGrant Likely 	const char *model;
17893c02ab4SGrant Likely 
179f506cd48SNicolas Pitre 	if (!dt_phys)
180f506cd48SNicolas Pitre 		return NULL;
181f506cd48SNicolas Pitre 
18293c02ab4SGrant Likely 	devtree = phys_to_virt(dt_phys);
18393c02ab4SGrant Likely 
18493c02ab4SGrant Likely 	/* check device tree validity */
18593c02ab4SGrant Likely 	if (be32_to_cpu(devtree->magic) != OF_DT_HEADER)
18693c02ab4SGrant Likely 		return NULL;
18793c02ab4SGrant Likely 
18893c02ab4SGrant Likely 	/* Search the mdescs for the 'best' compatible value match */
18993c02ab4SGrant Likely 	initial_boot_params = devtree;
19093c02ab4SGrant Likely 	dt_root = of_get_flat_dt_root();
19193c02ab4SGrant Likely 	for_each_machine_desc(mdesc) {
19293c02ab4SGrant Likely 		score = of_flat_dt_match(dt_root, mdesc->dt_compat);
19393c02ab4SGrant Likely 		if (score > 0 && score < mdesc_score) {
19493c02ab4SGrant Likely 			mdesc_best = mdesc;
19593c02ab4SGrant Likely 			mdesc_score = score;
19693c02ab4SGrant Likely 		}
19793c02ab4SGrant Likely 	}
19893c02ab4SGrant Likely 	if (!mdesc_best) {
19993c02ab4SGrant Likely 		const char *prop;
20093c02ab4SGrant Likely 		long size;
20193c02ab4SGrant Likely 
20293c02ab4SGrant Likely 		early_print("\nError: unrecognized/unsupported "
20393c02ab4SGrant Likely 			    "device tree compatible list:\n[ ");
20493c02ab4SGrant Likely 
20593c02ab4SGrant Likely 		prop = of_get_flat_dt_prop(dt_root, "compatible", &size);
20693c02ab4SGrant Likely 		while (size > 0) {
20793c02ab4SGrant Likely 			early_print("'%s' ", prop);
20893c02ab4SGrant Likely 			size -= strlen(prop) + 1;
20993c02ab4SGrant Likely 			prop += strlen(prop) + 1;
21093c02ab4SGrant Likely 		}
21193c02ab4SGrant Likely 		early_print("]\n\n");
21293c02ab4SGrant Likely 
21393c02ab4SGrant Likely 		dump_machine_table(); /* does not return */
21493c02ab4SGrant Likely 	}
21593c02ab4SGrant Likely 
21693c02ab4SGrant Likely 	model = of_get_flat_dt_prop(dt_root, "model", NULL);
21793c02ab4SGrant Likely 	if (!model)
21893c02ab4SGrant Likely 		model = of_get_flat_dt_prop(dt_root, "compatible", NULL);
21993c02ab4SGrant Likely 	if (!model)
22093c02ab4SGrant Likely 		model = "<unknown>";
22193c02ab4SGrant Likely 	pr_info("Machine: %s, model: %s\n", mdesc_best->name, model);
22293c02ab4SGrant Likely 
22393c02ab4SGrant Likely 	/* Retrieve various information from the /chosen node */
22493c02ab4SGrant Likely 	of_scan_flat_dt(early_init_dt_scan_chosen, boot_command_line);
22593c02ab4SGrant Likely 	/* Initialize {size,address}-cells info */
22693c02ab4SGrant Likely 	of_scan_flat_dt(early_init_dt_scan_root, NULL);
22793c02ab4SGrant Likely 	/* Setup memory, calling early_init_dt_add_memory_arch */
22893c02ab4SGrant Likely 	of_scan_flat_dt(early_init_dt_scan_memory, NULL);
22993c02ab4SGrant Likely 
23093c02ab4SGrant Likely 	/* Change machine number to match the mdesc we're using */
23193c02ab4SGrant Likely 	__machine_arch_type = mdesc_best->nr;
23293c02ab4SGrant Likely 
23393c02ab4SGrant Likely 	return mdesc_best;
23493c02ab4SGrant Likely }
235