19eb8f674SGrant Likely /* 29eb8f674SGrant Likely * linux/arch/arm/kernel/devtree.c 39eb8f674SGrant Likely * 49eb8f674SGrant Likely * Copyright (C) 2009 Canonical Ltd. <jeremy.kerr@canonical.com> 59eb8f674SGrant Likely * 69eb8f674SGrant Likely * This program is free software; you can redistribute it and/or modify 79eb8f674SGrant Likely * it under the terms of the GNU General Public License version 2 as 89eb8f674SGrant Likely * published by the Free Software Foundation. 99eb8f674SGrant Likely */ 109eb8f674SGrant Likely 119eb8f674SGrant Likely #include <linux/init.h> 12ecea4ab6SPaul Gortmaker #include <linux/export.h> 139eb8f674SGrant Likely #include <linux/errno.h> 149eb8f674SGrant Likely #include <linux/types.h> 159eb8f674SGrant Likely #include <linux/bootmem.h> 169eb8f674SGrant Likely #include <linux/memblock.h> 179eb8f674SGrant Likely #include <linux/of.h> 189eb8f674SGrant Likely #include <linux/of_fdt.h> 199eb8f674SGrant Likely #include <linux/of_irq.h> 209eb8f674SGrant Likely #include <linux/of_platform.h> 216c3ff8b1SStephen Boyd #include <linux/smp.h> 229eb8f674SGrant Likely 23a0ae0240SLorenzo Pieralisi #include <asm/cputype.h> 249eb8f674SGrant Likely #include <asm/setup.h> 259eb8f674SGrant Likely #include <asm/page.h> 26a0ae0240SLorenzo Pieralisi #include <asm/smp_plat.h> 2793c02ab4SGrant Likely #include <asm/mach/arch.h> 2893c02ab4SGrant Likely #include <asm/mach-types.h> 299eb8f674SGrant Likely 309eb8f674SGrant Likely void __init early_init_dt_add_memory_arch(u64 base, u64 size) 319eb8f674SGrant Likely { 329eb8f674SGrant Likely arm_add_memory(base, size); 339eb8f674SGrant Likely } 349eb8f674SGrant Likely 3593c02ab4SGrant Likely void __init arm_dt_memblock_reserve(void) 3693c02ab4SGrant Likely { 3793c02ab4SGrant Likely u64 *reserve_map, base, size; 3893c02ab4SGrant Likely 3993c02ab4SGrant Likely if (!initial_boot_params) 4093c02ab4SGrant Likely return; 4193c02ab4SGrant Likely 4293c02ab4SGrant Likely /* Reserve the dtb region */ 4393c02ab4SGrant Likely memblock_reserve(virt_to_phys(initial_boot_params), 4493c02ab4SGrant Likely be32_to_cpu(initial_boot_params->totalsize)); 4593c02ab4SGrant Likely 4693c02ab4SGrant Likely /* 4793c02ab4SGrant Likely * Process the reserve map. This will probably overlap the initrd 4893c02ab4SGrant Likely * and dtb locations which are already reserved, but overlaping 4993c02ab4SGrant Likely * doesn't hurt anything 5093c02ab4SGrant Likely */ 5193c02ab4SGrant Likely reserve_map = ((void*)initial_boot_params) + 5293c02ab4SGrant Likely be32_to_cpu(initial_boot_params->off_mem_rsvmap); 5393c02ab4SGrant Likely while (1) { 5493c02ab4SGrant Likely base = be64_to_cpup(reserve_map++); 5593c02ab4SGrant Likely size = be64_to_cpup(reserve_map++); 5693c02ab4SGrant Likely if (!size) 5793c02ab4SGrant Likely break; 5893c02ab4SGrant Likely memblock_reserve(base, size); 5993c02ab4SGrant Likely } 6093c02ab4SGrant Likely } 6193c02ab4SGrant Likely 626c3ff8b1SStephen Boyd #ifdef CONFIG_SMP 636c3ff8b1SStephen Boyd extern struct of_cpu_method __cpu_method_of_table_begin[]; 646c3ff8b1SStephen Boyd extern struct of_cpu_method __cpu_method_of_table_end[]; 656c3ff8b1SStephen Boyd 666c3ff8b1SStephen Boyd static int __init set_smp_ops_by_method(struct device_node *node) 676c3ff8b1SStephen Boyd { 686c3ff8b1SStephen Boyd const char *method; 696c3ff8b1SStephen Boyd struct of_cpu_method *m = __cpu_method_of_table_begin; 706c3ff8b1SStephen Boyd 716c3ff8b1SStephen Boyd if (of_property_read_string(node, "enable-method", &method)) 726c3ff8b1SStephen Boyd return 0; 736c3ff8b1SStephen Boyd 746c3ff8b1SStephen Boyd for (; m < __cpu_method_of_table_end; m++) 756c3ff8b1SStephen Boyd if (!strcmp(m->method, method)) { 766c3ff8b1SStephen Boyd smp_set_ops(m->ops); 776c3ff8b1SStephen Boyd return 1; 786c3ff8b1SStephen Boyd } 796c3ff8b1SStephen Boyd 806c3ff8b1SStephen Boyd return 0; 816c3ff8b1SStephen Boyd } 826c3ff8b1SStephen Boyd #else 836c3ff8b1SStephen Boyd static inline int set_smp_ops_by_method(struct device_node *node) 846c3ff8b1SStephen Boyd { 856c3ff8b1SStephen Boyd return 1; 866c3ff8b1SStephen Boyd } 876c3ff8b1SStephen Boyd #endif 886c3ff8b1SStephen Boyd 896c3ff8b1SStephen Boyd 90a0ae0240SLorenzo Pieralisi /* 91a0ae0240SLorenzo Pieralisi * arm_dt_init_cpu_maps - Function retrieves cpu nodes from the device tree 92a0ae0240SLorenzo Pieralisi * and builds the cpu logical map array containing MPIDR values related to 93a0ae0240SLorenzo Pieralisi * logical cpus 94a0ae0240SLorenzo Pieralisi * 95a0ae0240SLorenzo Pieralisi * Updates the cpu possible mask with the number of parsed cpu nodes 96a0ae0240SLorenzo Pieralisi */ 97a0ae0240SLorenzo Pieralisi void __init arm_dt_init_cpu_maps(void) 98a0ae0240SLorenzo Pieralisi { 99a0ae0240SLorenzo Pieralisi /* 100a0ae0240SLorenzo Pieralisi * Temp logical map is initialized with UINT_MAX values that are 101a0ae0240SLorenzo Pieralisi * considered invalid logical map entries since the logical map must 102a0ae0240SLorenzo Pieralisi * contain a list of MPIDR[23:0] values where MPIDR[31:24] must 103a0ae0240SLorenzo Pieralisi * read as 0. 104a0ae0240SLorenzo Pieralisi */ 105a0ae0240SLorenzo Pieralisi struct device_node *cpu, *cpus; 1066c3ff8b1SStephen Boyd int found_method = 0; 107a0ae0240SLorenzo Pieralisi u32 i, j, cpuidx = 1; 108a0ae0240SLorenzo Pieralisi u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0; 109a0ae0240SLorenzo Pieralisi 11018d7f152SLorenzo Pieralisi u32 tmp_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID }; 111a0ae0240SLorenzo Pieralisi bool bootcpu_valid = false; 112a0ae0240SLorenzo Pieralisi cpus = of_find_node_by_path("/cpus"); 113a0ae0240SLorenzo Pieralisi 114a0ae0240SLorenzo Pieralisi if (!cpus) 115a0ae0240SLorenzo Pieralisi return; 116a0ae0240SLorenzo Pieralisi 117a0ae0240SLorenzo Pieralisi for_each_child_of_node(cpus, cpu) { 118a0ae0240SLorenzo Pieralisi u32 hwid; 119a0ae0240SLorenzo Pieralisi 1201ba9bf0aSLorenzo Pieralisi if (of_node_cmp(cpu->type, "cpu")) 1211ba9bf0aSLorenzo Pieralisi continue; 1221ba9bf0aSLorenzo Pieralisi 123a0ae0240SLorenzo Pieralisi pr_debug(" * %s...\n", cpu->full_name); 124a0ae0240SLorenzo Pieralisi /* 125a0ae0240SLorenzo Pieralisi * A device tree containing CPU nodes with missing "reg" 126a0ae0240SLorenzo Pieralisi * properties is considered invalid to build the 127a0ae0240SLorenzo Pieralisi * cpu_logical_map. 128a0ae0240SLorenzo Pieralisi */ 129a0ae0240SLorenzo Pieralisi if (of_property_read_u32(cpu, "reg", &hwid)) { 130a0ae0240SLorenzo Pieralisi pr_debug(" * %s missing reg property\n", 131a0ae0240SLorenzo Pieralisi cpu->full_name); 132a0ae0240SLorenzo Pieralisi return; 133a0ae0240SLorenzo Pieralisi } 134a0ae0240SLorenzo Pieralisi 135a0ae0240SLorenzo Pieralisi /* 136a0ae0240SLorenzo Pieralisi * 8 MSBs must be set to 0 in the DT since the reg property 137a0ae0240SLorenzo Pieralisi * defines the MPIDR[23:0]. 138a0ae0240SLorenzo Pieralisi */ 139a0ae0240SLorenzo Pieralisi if (hwid & ~MPIDR_HWID_BITMASK) 140a0ae0240SLorenzo Pieralisi return; 141a0ae0240SLorenzo Pieralisi 142a0ae0240SLorenzo Pieralisi /* 143a0ae0240SLorenzo Pieralisi * Duplicate MPIDRs are a recipe for disaster. 144a0ae0240SLorenzo Pieralisi * Scan all initialized entries and check for 145a0ae0240SLorenzo Pieralisi * duplicates. If any is found just bail out. 146a0ae0240SLorenzo Pieralisi * temp values were initialized to UINT_MAX 147a0ae0240SLorenzo Pieralisi * to avoid matching valid MPIDR[23:0] values. 148a0ae0240SLorenzo Pieralisi */ 149a0ae0240SLorenzo Pieralisi for (j = 0; j < cpuidx; j++) 150a0ae0240SLorenzo Pieralisi if (WARN(tmp_map[j] == hwid, "Duplicate /cpu reg " 151a0ae0240SLorenzo Pieralisi "properties in the DT\n")) 152a0ae0240SLorenzo Pieralisi return; 153a0ae0240SLorenzo Pieralisi 154a0ae0240SLorenzo Pieralisi /* 155a0ae0240SLorenzo Pieralisi * Build a stashed array of MPIDR values. Numbering scheme 156a0ae0240SLorenzo Pieralisi * requires that if detected the boot CPU must be assigned 157a0ae0240SLorenzo Pieralisi * logical id 0. Other CPUs get sequential indexes starting 158a0ae0240SLorenzo Pieralisi * from 1. If a CPU node with a reg property matching the 159a0ae0240SLorenzo Pieralisi * boot CPU MPIDR is detected, this is recorded so that the 160a0ae0240SLorenzo Pieralisi * logical map built from DT is validated and can be used 161a0ae0240SLorenzo Pieralisi * to override the map created in smp_setup_processor_id(). 162a0ae0240SLorenzo Pieralisi */ 163a0ae0240SLorenzo Pieralisi if (hwid == mpidr) { 164a0ae0240SLorenzo Pieralisi i = 0; 165a0ae0240SLorenzo Pieralisi bootcpu_valid = true; 166a0ae0240SLorenzo Pieralisi } else { 167a0ae0240SLorenzo Pieralisi i = cpuidx++; 168a0ae0240SLorenzo Pieralisi } 169a0ae0240SLorenzo Pieralisi 170ce7b1756SLorenzo Pieralisi if (WARN(cpuidx > nr_cpu_ids, "DT /cpu %u nodes greater than " 171ce7b1756SLorenzo Pieralisi "max cores %u, capping them\n", 172ce7b1756SLorenzo Pieralisi cpuidx, nr_cpu_ids)) { 173ce7b1756SLorenzo Pieralisi cpuidx = nr_cpu_ids; 174a0ae0240SLorenzo Pieralisi break; 175a0ae0240SLorenzo Pieralisi } 176a0ae0240SLorenzo Pieralisi 177ce7b1756SLorenzo Pieralisi tmp_map[i] = hwid; 1786c3ff8b1SStephen Boyd 1796c3ff8b1SStephen Boyd if (!found_method) 1806c3ff8b1SStephen Boyd found_method = set_smp_ops_by_method(cpu); 181ce7b1756SLorenzo Pieralisi } 182ce7b1756SLorenzo Pieralisi 1836c3ff8b1SStephen Boyd /* 1846c3ff8b1SStephen Boyd * Fallback to an enable-method in the cpus node if nothing found in 1856c3ff8b1SStephen Boyd * a cpu node. 1866c3ff8b1SStephen Boyd */ 1876c3ff8b1SStephen Boyd if (!found_method) 1886c3ff8b1SStephen Boyd set_smp_ops_by_method(cpus); 1896c3ff8b1SStephen Boyd 1908d5bc1a6SOlof Johansson if (!bootcpu_valid) { 1918d5bc1a6SOlof Johansson pr_warn("DT missing boot CPU MPIDR[23:0], fall back to default cpu_logical_map\n"); 192a0ae0240SLorenzo Pieralisi return; 1938d5bc1a6SOlof Johansson } 194a0ae0240SLorenzo Pieralisi 195a0ae0240SLorenzo Pieralisi /* 196a0ae0240SLorenzo Pieralisi * Since the boot CPU node contains proper data, and all nodes have 197a0ae0240SLorenzo Pieralisi * a reg property, the DT CPU list can be considered valid and the 198a0ae0240SLorenzo Pieralisi * logical map created in smp_setup_processor_id() can be overridden 199a0ae0240SLorenzo Pieralisi */ 200a0ae0240SLorenzo Pieralisi for (i = 0; i < cpuidx; i++) { 201a0ae0240SLorenzo Pieralisi set_cpu_possible(i, true); 202a0ae0240SLorenzo Pieralisi cpu_logical_map(i) = tmp_map[i]; 203a0ae0240SLorenzo Pieralisi pr_debug("cpu logical map 0x%x\n", cpu_logical_map(i)); 204a0ae0240SLorenzo Pieralisi } 205a0ae0240SLorenzo Pieralisi } 206a0ae0240SLorenzo Pieralisi 207973e02c1SSudeep KarkadaNagesha bool arch_match_cpu_phys_id(int cpu, u64 phys_id) 208973e02c1SSudeep KarkadaNagesha { 209e44ef891SSudeep Holla return phys_id == cpu_logical_map(cpu); 210973e02c1SSudeep KarkadaNagesha } 211973e02c1SSudeep KarkadaNagesha 2126d67a9f6SRob Herring static const void * __init arch_get_next_mach(const char *const **match) 2136d67a9f6SRob Herring { 2146d67a9f6SRob Herring static const struct machine_desc *mdesc = __arch_info_begin; 2156d67a9f6SRob Herring const struct machine_desc *m = mdesc; 2166d67a9f6SRob Herring 2176d67a9f6SRob Herring if (m >= __arch_info_end) 2186d67a9f6SRob Herring return NULL; 2196d67a9f6SRob Herring 2206d67a9f6SRob Herring mdesc++; 2216d67a9f6SRob Herring *match = m->dt_compat; 2226d67a9f6SRob Herring return m; 2236d67a9f6SRob Herring } 2246d67a9f6SRob Herring 22593c02ab4SGrant Likely /** 22693c02ab4SGrant Likely * setup_machine_fdt - Machine setup when an dtb was passed to the kernel 22793c02ab4SGrant Likely * @dt_phys: physical address of dt blob 22893c02ab4SGrant Likely * 22993c02ab4SGrant Likely * If a dtb was passed to the kernel in r2, then use it to choose the 23093c02ab4SGrant Likely * correct machine_desc and to setup the system. 23193c02ab4SGrant Likely */ 232ff69a4c8SRussell King const struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys) 23393c02ab4SGrant Likely { 234ff69a4c8SRussell King const struct machine_desc *mdesc, *mdesc_best = NULL; 23593c02ab4SGrant Likely 236883a106bSArnd Bergmann #ifdef CONFIG_ARCH_MULTIPLATFORM 237883a106bSArnd Bergmann DT_MACHINE_START(GENERIC_DT, "Generic DT based system") 238883a106bSArnd Bergmann MACHINE_END 239883a106bSArnd Bergmann 240ff69a4c8SRussell King mdesc_best = &__mach_desc_GENERIC_DT; 241883a106bSArnd Bergmann #endif 242883a106bSArnd Bergmann 24356dc1f47SRob Herring if (!dt_phys || !early_init_dt_scan(phys_to_virt(dt_phys))) 244f506cd48SNicolas Pitre return NULL; 245f506cd48SNicolas Pitre 2466d67a9f6SRob Herring mdesc = of_flat_dt_match_machine(mdesc_best, arch_get_next_mach); 24793c02ab4SGrant Likely 2486d67a9f6SRob Herring if (!mdesc) { 24993c02ab4SGrant Likely const char *prop; 250*9d0c4dfeSRob Herring int size; 2516d67a9f6SRob Herring unsigned long dt_root; 25293c02ab4SGrant Likely 25393c02ab4SGrant Likely early_print("\nError: unrecognized/unsupported " 25493c02ab4SGrant Likely "device tree compatible list:\n[ "); 25593c02ab4SGrant Likely 2566d67a9f6SRob Herring dt_root = of_get_flat_dt_root(); 25793c02ab4SGrant Likely prop = of_get_flat_dt_prop(dt_root, "compatible", &size); 25893c02ab4SGrant Likely while (size > 0) { 25993c02ab4SGrant Likely early_print("'%s' ", prop); 26093c02ab4SGrant Likely size -= strlen(prop) + 1; 26193c02ab4SGrant Likely prop += strlen(prop) + 1; 26293c02ab4SGrant Likely } 26393c02ab4SGrant Likely early_print("]\n\n"); 26493c02ab4SGrant Likely 26593c02ab4SGrant Likely dump_machine_table(); /* does not return */ 26693c02ab4SGrant Likely } 26793c02ab4SGrant Likely 26893c02ab4SGrant Likely /* Change machine number to match the mdesc we're using */ 2696d67a9f6SRob Herring __machine_arch_type = mdesc->nr; 27093c02ab4SGrant Likely 2716d67a9f6SRob Herring return mdesc; 27293c02ab4SGrant Likely } 273