19eb8f674SGrant Likely /* 29eb8f674SGrant Likely * linux/arch/arm/kernel/devtree.c 39eb8f674SGrant Likely * 49eb8f674SGrant Likely * Copyright (C) 2009 Canonical Ltd. <jeremy.kerr@canonical.com> 59eb8f674SGrant Likely * 69eb8f674SGrant Likely * This program is free software; you can redistribute it and/or modify 79eb8f674SGrant Likely * it under the terms of the GNU General Public License version 2 as 89eb8f674SGrant Likely * published by the Free Software Foundation. 99eb8f674SGrant Likely */ 109eb8f674SGrant Likely 119eb8f674SGrant Likely #include <linux/init.h> 12ecea4ab6SPaul Gortmaker #include <linux/export.h> 139eb8f674SGrant Likely #include <linux/errno.h> 149eb8f674SGrant Likely #include <linux/types.h> 159eb8f674SGrant Likely #include <linux/bootmem.h> 169eb8f674SGrant Likely #include <linux/memblock.h> 179eb8f674SGrant Likely #include <linux/of.h> 189eb8f674SGrant Likely #include <linux/of_fdt.h> 199eb8f674SGrant Likely #include <linux/of_irq.h> 209eb8f674SGrant Likely #include <linux/of_platform.h> 216c3ff8b1SStephen Boyd #include <linux/smp.h> 229eb8f674SGrant Likely 23a0ae0240SLorenzo Pieralisi #include <asm/cputype.h> 249eb8f674SGrant Likely #include <asm/setup.h> 259eb8f674SGrant Likely #include <asm/page.h> 26a0ae0240SLorenzo Pieralisi #include <asm/smp_plat.h> 2793c02ab4SGrant Likely #include <asm/mach/arch.h> 2893c02ab4SGrant Likely #include <asm/mach-types.h> 299eb8f674SGrant Likely 309eb8f674SGrant Likely void __init early_init_dt_add_memory_arch(u64 base, u64 size) 319eb8f674SGrant Likely { 329eb8f674SGrant Likely arm_add_memory(base, size); 339eb8f674SGrant Likely } 349eb8f674SGrant Likely 356c3ff8b1SStephen Boyd #ifdef CONFIG_SMP 36*9a721c41SRob Herring extern struct of_cpu_method __cpu_method_of_table[]; 37*9a721c41SRob Herring 38*9a721c41SRob Herring static const struct of_cpu_method __cpu_method_of_table_sentinel 39*9a721c41SRob Herring __used __section(__cpu_method_of_table_end); 40*9a721c41SRob Herring 416c3ff8b1SStephen Boyd 426c3ff8b1SStephen Boyd static int __init set_smp_ops_by_method(struct device_node *node) 436c3ff8b1SStephen Boyd { 446c3ff8b1SStephen Boyd const char *method; 45*9a721c41SRob Herring struct of_cpu_method *m = __cpu_method_of_table; 466c3ff8b1SStephen Boyd 476c3ff8b1SStephen Boyd if (of_property_read_string(node, "enable-method", &method)) 486c3ff8b1SStephen Boyd return 0; 496c3ff8b1SStephen Boyd 50*9a721c41SRob Herring for (; m->method; m++) 516c3ff8b1SStephen Boyd if (!strcmp(m->method, method)) { 526c3ff8b1SStephen Boyd smp_set_ops(m->ops); 536c3ff8b1SStephen Boyd return 1; 546c3ff8b1SStephen Boyd } 556c3ff8b1SStephen Boyd 566c3ff8b1SStephen Boyd return 0; 576c3ff8b1SStephen Boyd } 586c3ff8b1SStephen Boyd #else 596c3ff8b1SStephen Boyd static inline int set_smp_ops_by_method(struct device_node *node) 606c3ff8b1SStephen Boyd { 616c3ff8b1SStephen Boyd return 1; 626c3ff8b1SStephen Boyd } 636c3ff8b1SStephen Boyd #endif 646c3ff8b1SStephen Boyd 656c3ff8b1SStephen Boyd 66a0ae0240SLorenzo Pieralisi /* 67a0ae0240SLorenzo Pieralisi * arm_dt_init_cpu_maps - Function retrieves cpu nodes from the device tree 68a0ae0240SLorenzo Pieralisi * and builds the cpu logical map array containing MPIDR values related to 69a0ae0240SLorenzo Pieralisi * logical cpus 70a0ae0240SLorenzo Pieralisi * 71a0ae0240SLorenzo Pieralisi * Updates the cpu possible mask with the number of parsed cpu nodes 72a0ae0240SLorenzo Pieralisi */ 73a0ae0240SLorenzo Pieralisi void __init arm_dt_init_cpu_maps(void) 74a0ae0240SLorenzo Pieralisi { 75a0ae0240SLorenzo Pieralisi /* 76a0ae0240SLorenzo Pieralisi * Temp logical map is initialized with UINT_MAX values that are 77a0ae0240SLorenzo Pieralisi * considered invalid logical map entries since the logical map must 78a0ae0240SLorenzo Pieralisi * contain a list of MPIDR[23:0] values where MPIDR[31:24] must 79a0ae0240SLorenzo Pieralisi * read as 0. 80a0ae0240SLorenzo Pieralisi */ 81a0ae0240SLorenzo Pieralisi struct device_node *cpu, *cpus; 826c3ff8b1SStephen Boyd int found_method = 0; 83a0ae0240SLorenzo Pieralisi u32 i, j, cpuidx = 1; 84a0ae0240SLorenzo Pieralisi u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0; 85a0ae0240SLorenzo Pieralisi 8618d7f152SLorenzo Pieralisi u32 tmp_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID }; 87a0ae0240SLorenzo Pieralisi bool bootcpu_valid = false; 88a0ae0240SLorenzo Pieralisi cpus = of_find_node_by_path("/cpus"); 89a0ae0240SLorenzo Pieralisi 90a0ae0240SLorenzo Pieralisi if (!cpus) 91a0ae0240SLorenzo Pieralisi return; 92a0ae0240SLorenzo Pieralisi 93a0ae0240SLorenzo Pieralisi for_each_child_of_node(cpus, cpu) { 94a0ae0240SLorenzo Pieralisi u32 hwid; 95a0ae0240SLorenzo Pieralisi 961ba9bf0aSLorenzo Pieralisi if (of_node_cmp(cpu->type, "cpu")) 971ba9bf0aSLorenzo Pieralisi continue; 981ba9bf0aSLorenzo Pieralisi 99a0ae0240SLorenzo Pieralisi pr_debug(" * %s...\n", cpu->full_name); 100a0ae0240SLorenzo Pieralisi /* 101a0ae0240SLorenzo Pieralisi * A device tree containing CPU nodes with missing "reg" 102a0ae0240SLorenzo Pieralisi * properties is considered invalid to build the 103a0ae0240SLorenzo Pieralisi * cpu_logical_map. 104a0ae0240SLorenzo Pieralisi */ 105a0ae0240SLorenzo Pieralisi if (of_property_read_u32(cpu, "reg", &hwid)) { 106a0ae0240SLorenzo Pieralisi pr_debug(" * %s missing reg property\n", 107a0ae0240SLorenzo Pieralisi cpu->full_name); 108a0ae0240SLorenzo Pieralisi return; 109a0ae0240SLorenzo Pieralisi } 110a0ae0240SLorenzo Pieralisi 111a0ae0240SLorenzo Pieralisi /* 112a0ae0240SLorenzo Pieralisi * 8 MSBs must be set to 0 in the DT since the reg property 113a0ae0240SLorenzo Pieralisi * defines the MPIDR[23:0]. 114a0ae0240SLorenzo Pieralisi */ 115a0ae0240SLorenzo Pieralisi if (hwid & ~MPIDR_HWID_BITMASK) 116a0ae0240SLorenzo Pieralisi return; 117a0ae0240SLorenzo Pieralisi 118a0ae0240SLorenzo Pieralisi /* 119a0ae0240SLorenzo Pieralisi * Duplicate MPIDRs are a recipe for disaster. 120a0ae0240SLorenzo Pieralisi * Scan all initialized entries and check for 121a0ae0240SLorenzo Pieralisi * duplicates. If any is found just bail out. 122a0ae0240SLorenzo Pieralisi * temp values were initialized to UINT_MAX 123a0ae0240SLorenzo Pieralisi * to avoid matching valid MPIDR[23:0] values. 124a0ae0240SLorenzo Pieralisi */ 125a0ae0240SLorenzo Pieralisi for (j = 0; j < cpuidx; j++) 126a0ae0240SLorenzo Pieralisi if (WARN(tmp_map[j] == hwid, "Duplicate /cpu reg " 127a0ae0240SLorenzo Pieralisi "properties in the DT\n")) 128a0ae0240SLorenzo Pieralisi return; 129a0ae0240SLorenzo Pieralisi 130a0ae0240SLorenzo Pieralisi /* 131a0ae0240SLorenzo Pieralisi * Build a stashed array of MPIDR values. Numbering scheme 132a0ae0240SLorenzo Pieralisi * requires that if detected the boot CPU must be assigned 133a0ae0240SLorenzo Pieralisi * logical id 0. Other CPUs get sequential indexes starting 134a0ae0240SLorenzo Pieralisi * from 1. If a CPU node with a reg property matching the 135a0ae0240SLorenzo Pieralisi * boot CPU MPIDR is detected, this is recorded so that the 136a0ae0240SLorenzo Pieralisi * logical map built from DT is validated and can be used 137a0ae0240SLorenzo Pieralisi * to override the map created in smp_setup_processor_id(). 138a0ae0240SLorenzo Pieralisi */ 139a0ae0240SLorenzo Pieralisi if (hwid == mpidr) { 140a0ae0240SLorenzo Pieralisi i = 0; 141a0ae0240SLorenzo Pieralisi bootcpu_valid = true; 142a0ae0240SLorenzo Pieralisi } else { 143a0ae0240SLorenzo Pieralisi i = cpuidx++; 144a0ae0240SLorenzo Pieralisi } 145a0ae0240SLorenzo Pieralisi 146ce7b1756SLorenzo Pieralisi if (WARN(cpuidx > nr_cpu_ids, "DT /cpu %u nodes greater than " 147ce7b1756SLorenzo Pieralisi "max cores %u, capping them\n", 148ce7b1756SLorenzo Pieralisi cpuidx, nr_cpu_ids)) { 149ce7b1756SLorenzo Pieralisi cpuidx = nr_cpu_ids; 150a0ae0240SLorenzo Pieralisi break; 151a0ae0240SLorenzo Pieralisi } 152a0ae0240SLorenzo Pieralisi 153ce7b1756SLorenzo Pieralisi tmp_map[i] = hwid; 1546c3ff8b1SStephen Boyd 1556c3ff8b1SStephen Boyd if (!found_method) 1566c3ff8b1SStephen Boyd found_method = set_smp_ops_by_method(cpu); 157ce7b1756SLorenzo Pieralisi } 158ce7b1756SLorenzo Pieralisi 1596c3ff8b1SStephen Boyd /* 1606c3ff8b1SStephen Boyd * Fallback to an enable-method in the cpus node if nothing found in 1616c3ff8b1SStephen Boyd * a cpu node. 1626c3ff8b1SStephen Boyd */ 1636c3ff8b1SStephen Boyd if (!found_method) 1646c3ff8b1SStephen Boyd set_smp_ops_by_method(cpus); 1656c3ff8b1SStephen Boyd 1668d5bc1a6SOlof Johansson if (!bootcpu_valid) { 1678d5bc1a6SOlof Johansson pr_warn("DT missing boot CPU MPIDR[23:0], fall back to default cpu_logical_map\n"); 168a0ae0240SLorenzo Pieralisi return; 1698d5bc1a6SOlof Johansson } 170a0ae0240SLorenzo Pieralisi 171a0ae0240SLorenzo Pieralisi /* 172a0ae0240SLorenzo Pieralisi * Since the boot CPU node contains proper data, and all nodes have 173a0ae0240SLorenzo Pieralisi * a reg property, the DT CPU list can be considered valid and the 174a0ae0240SLorenzo Pieralisi * logical map created in smp_setup_processor_id() can be overridden 175a0ae0240SLorenzo Pieralisi */ 176a0ae0240SLorenzo Pieralisi for (i = 0; i < cpuidx; i++) { 177a0ae0240SLorenzo Pieralisi set_cpu_possible(i, true); 178a0ae0240SLorenzo Pieralisi cpu_logical_map(i) = tmp_map[i]; 179a0ae0240SLorenzo Pieralisi pr_debug("cpu logical map 0x%x\n", cpu_logical_map(i)); 180a0ae0240SLorenzo Pieralisi } 181a0ae0240SLorenzo Pieralisi } 182a0ae0240SLorenzo Pieralisi 183973e02c1SSudeep KarkadaNagesha bool arch_match_cpu_phys_id(int cpu, u64 phys_id) 184973e02c1SSudeep KarkadaNagesha { 185e44ef891SSudeep Holla return phys_id == cpu_logical_map(cpu); 186973e02c1SSudeep KarkadaNagesha } 187973e02c1SSudeep KarkadaNagesha 1886d67a9f6SRob Herring static const void * __init arch_get_next_mach(const char *const **match) 1896d67a9f6SRob Herring { 1906d67a9f6SRob Herring static const struct machine_desc *mdesc = __arch_info_begin; 1916d67a9f6SRob Herring const struct machine_desc *m = mdesc; 1926d67a9f6SRob Herring 1936d67a9f6SRob Herring if (m >= __arch_info_end) 1946d67a9f6SRob Herring return NULL; 1956d67a9f6SRob Herring 1966d67a9f6SRob Herring mdesc++; 1976d67a9f6SRob Herring *match = m->dt_compat; 1986d67a9f6SRob Herring return m; 1996d67a9f6SRob Herring } 2006d67a9f6SRob Herring 20193c02ab4SGrant Likely /** 20293c02ab4SGrant Likely * setup_machine_fdt - Machine setup when an dtb was passed to the kernel 20393c02ab4SGrant Likely * @dt_phys: physical address of dt blob 20493c02ab4SGrant Likely * 20593c02ab4SGrant Likely * If a dtb was passed to the kernel in r2, then use it to choose the 20693c02ab4SGrant Likely * correct machine_desc and to setup the system. 20793c02ab4SGrant Likely */ 208ff69a4c8SRussell King const struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys) 20993c02ab4SGrant Likely { 210ff69a4c8SRussell King const struct machine_desc *mdesc, *mdesc_best = NULL; 21193c02ab4SGrant Likely 212883a106bSArnd Bergmann #ifdef CONFIG_ARCH_MULTIPLATFORM 213883a106bSArnd Bergmann DT_MACHINE_START(GENERIC_DT, "Generic DT based system") 214883a106bSArnd Bergmann MACHINE_END 215883a106bSArnd Bergmann 216ff69a4c8SRussell King mdesc_best = &__mach_desc_GENERIC_DT; 217883a106bSArnd Bergmann #endif 218883a106bSArnd Bergmann 21956dc1f47SRob Herring if (!dt_phys || !early_init_dt_scan(phys_to_virt(dt_phys))) 220f506cd48SNicolas Pitre return NULL; 221f506cd48SNicolas Pitre 2226d67a9f6SRob Herring mdesc = of_flat_dt_match_machine(mdesc_best, arch_get_next_mach); 22393c02ab4SGrant Likely 2246d67a9f6SRob Herring if (!mdesc) { 22593c02ab4SGrant Likely const char *prop; 2269d0c4dfeSRob Herring int size; 2276d67a9f6SRob Herring unsigned long dt_root; 22893c02ab4SGrant Likely 22993c02ab4SGrant Likely early_print("\nError: unrecognized/unsupported " 23093c02ab4SGrant Likely "device tree compatible list:\n[ "); 23193c02ab4SGrant Likely 2326d67a9f6SRob Herring dt_root = of_get_flat_dt_root(); 23393c02ab4SGrant Likely prop = of_get_flat_dt_prop(dt_root, "compatible", &size); 23493c02ab4SGrant Likely while (size > 0) { 23593c02ab4SGrant Likely early_print("'%s' ", prop); 23693c02ab4SGrant Likely size -= strlen(prop) + 1; 23793c02ab4SGrant Likely prop += strlen(prop) + 1; 23893c02ab4SGrant Likely } 23993c02ab4SGrant Likely early_print("]\n\n"); 24093c02ab4SGrant Likely 24193c02ab4SGrant Likely dump_machine_table(); /* does not return */ 24293c02ab4SGrant Likely } 24393c02ab4SGrant Likely 24493c02ab4SGrant Likely /* Change machine number to match the mdesc we're using */ 2456d67a9f6SRob Herring __machine_arch_type = mdesc->nr; 24693c02ab4SGrant Likely 2476d67a9f6SRob Herring return mdesc; 24893c02ab4SGrant Likely } 249