19eb8f674SGrant Likely /* 29eb8f674SGrant Likely * linux/arch/arm/kernel/devtree.c 39eb8f674SGrant Likely * 49eb8f674SGrant Likely * Copyright (C) 2009 Canonical Ltd. <jeremy.kerr@canonical.com> 59eb8f674SGrant Likely * 69eb8f674SGrant Likely * This program is free software; you can redistribute it and/or modify 79eb8f674SGrant Likely * it under the terms of the GNU General Public License version 2 as 89eb8f674SGrant Likely * published by the Free Software Foundation. 99eb8f674SGrant Likely */ 109eb8f674SGrant Likely 119eb8f674SGrant Likely #include <linux/init.h> 12ecea4ab6SPaul Gortmaker #include <linux/export.h> 139eb8f674SGrant Likely #include <linux/errno.h> 149eb8f674SGrant Likely #include <linux/types.h> 159eb8f674SGrant Likely #include <linux/bootmem.h> 169eb8f674SGrant Likely #include <linux/memblock.h> 179eb8f674SGrant Likely #include <linux/of.h> 189eb8f674SGrant Likely #include <linux/of_fdt.h> 199eb8f674SGrant Likely #include <linux/of_irq.h> 209eb8f674SGrant Likely #include <linux/of_platform.h> 21*6c3ff8b1SStephen Boyd #include <linux/smp.h> 229eb8f674SGrant Likely 23a0ae0240SLorenzo Pieralisi #include <asm/cputype.h> 249eb8f674SGrant Likely #include <asm/setup.h> 259eb8f674SGrant Likely #include <asm/page.h> 26a0ae0240SLorenzo Pieralisi #include <asm/smp_plat.h> 2793c02ab4SGrant Likely #include <asm/mach/arch.h> 2893c02ab4SGrant Likely #include <asm/mach-types.h> 299eb8f674SGrant Likely 309eb8f674SGrant Likely void __init early_init_dt_add_memory_arch(u64 base, u64 size) 319eb8f674SGrant Likely { 329eb8f674SGrant Likely arm_add_memory(base, size); 339eb8f674SGrant Likely } 349eb8f674SGrant Likely 359eb8f674SGrant Likely void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align) 369eb8f674SGrant Likely { 379233d2beSSantosh Shilimkar return memblock_virt_alloc(size, align); 389eb8f674SGrant Likely } 399eb8f674SGrant Likely 4093c02ab4SGrant Likely void __init arm_dt_memblock_reserve(void) 4193c02ab4SGrant Likely { 4293c02ab4SGrant Likely u64 *reserve_map, base, size; 4393c02ab4SGrant Likely 4493c02ab4SGrant Likely if (!initial_boot_params) 4593c02ab4SGrant Likely return; 4693c02ab4SGrant Likely 4793c02ab4SGrant Likely /* Reserve the dtb region */ 4893c02ab4SGrant Likely memblock_reserve(virt_to_phys(initial_boot_params), 4993c02ab4SGrant Likely be32_to_cpu(initial_boot_params->totalsize)); 5093c02ab4SGrant Likely 5193c02ab4SGrant Likely /* 5293c02ab4SGrant Likely * Process the reserve map. This will probably overlap the initrd 5393c02ab4SGrant Likely * and dtb locations which are already reserved, but overlaping 5493c02ab4SGrant Likely * doesn't hurt anything 5593c02ab4SGrant Likely */ 5693c02ab4SGrant Likely reserve_map = ((void*)initial_boot_params) + 5793c02ab4SGrant Likely be32_to_cpu(initial_boot_params->off_mem_rsvmap); 5893c02ab4SGrant Likely while (1) { 5993c02ab4SGrant Likely base = be64_to_cpup(reserve_map++); 6093c02ab4SGrant Likely size = be64_to_cpup(reserve_map++); 6193c02ab4SGrant Likely if (!size) 6293c02ab4SGrant Likely break; 6393c02ab4SGrant Likely memblock_reserve(base, size); 6493c02ab4SGrant Likely } 6593c02ab4SGrant Likely } 6693c02ab4SGrant Likely 67*6c3ff8b1SStephen Boyd #ifdef CONFIG_SMP 68*6c3ff8b1SStephen Boyd extern struct of_cpu_method __cpu_method_of_table_begin[]; 69*6c3ff8b1SStephen Boyd extern struct of_cpu_method __cpu_method_of_table_end[]; 70*6c3ff8b1SStephen Boyd 71*6c3ff8b1SStephen Boyd static int __init set_smp_ops_by_method(struct device_node *node) 72*6c3ff8b1SStephen Boyd { 73*6c3ff8b1SStephen Boyd const char *method; 74*6c3ff8b1SStephen Boyd struct of_cpu_method *m = __cpu_method_of_table_begin; 75*6c3ff8b1SStephen Boyd 76*6c3ff8b1SStephen Boyd if (of_property_read_string(node, "enable-method", &method)) 77*6c3ff8b1SStephen Boyd return 0; 78*6c3ff8b1SStephen Boyd 79*6c3ff8b1SStephen Boyd for (; m < __cpu_method_of_table_end; m++) 80*6c3ff8b1SStephen Boyd if (!strcmp(m->method, method)) { 81*6c3ff8b1SStephen Boyd smp_set_ops(m->ops); 82*6c3ff8b1SStephen Boyd return 1; 83*6c3ff8b1SStephen Boyd } 84*6c3ff8b1SStephen Boyd 85*6c3ff8b1SStephen Boyd return 0; 86*6c3ff8b1SStephen Boyd } 87*6c3ff8b1SStephen Boyd #else 88*6c3ff8b1SStephen Boyd static inline int set_smp_ops_by_method(struct device_node *node) 89*6c3ff8b1SStephen Boyd { 90*6c3ff8b1SStephen Boyd return 1; 91*6c3ff8b1SStephen Boyd } 92*6c3ff8b1SStephen Boyd #endif 93*6c3ff8b1SStephen Boyd 94*6c3ff8b1SStephen Boyd 95a0ae0240SLorenzo Pieralisi /* 96a0ae0240SLorenzo Pieralisi * arm_dt_init_cpu_maps - Function retrieves cpu nodes from the device tree 97a0ae0240SLorenzo Pieralisi * and builds the cpu logical map array containing MPIDR values related to 98a0ae0240SLorenzo Pieralisi * logical cpus 99a0ae0240SLorenzo Pieralisi * 100a0ae0240SLorenzo Pieralisi * Updates the cpu possible mask with the number of parsed cpu nodes 101a0ae0240SLorenzo Pieralisi */ 102a0ae0240SLorenzo Pieralisi void __init arm_dt_init_cpu_maps(void) 103a0ae0240SLorenzo Pieralisi { 104a0ae0240SLorenzo Pieralisi /* 105a0ae0240SLorenzo Pieralisi * Temp logical map is initialized with UINT_MAX values that are 106a0ae0240SLorenzo Pieralisi * considered invalid logical map entries since the logical map must 107a0ae0240SLorenzo Pieralisi * contain a list of MPIDR[23:0] values where MPIDR[31:24] must 108a0ae0240SLorenzo Pieralisi * read as 0. 109a0ae0240SLorenzo Pieralisi */ 110a0ae0240SLorenzo Pieralisi struct device_node *cpu, *cpus; 111*6c3ff8b1SStephen Boyd int found_method = 0; 112a0ae0240SLorenzo Pieralisi u32 i, j, cpuidx = 1; 113a0ae0240SLorenzo Pieralisi u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0; 114a0ae0240SLorenzo Pieralisi 11518d7f152SLorenzo Pieralisi u32 tmp_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID }; 116a0ae0240SLorenzo Pieralisi bool bootcpu_valid = false; 117a0ae0240SLorenzo Pieralisi cpus = of_find_node_by_path("/cpus"); 118a0ae0240SLorenzo Pieralisi 119a0ae0240SLorenzo Pieralisi if (!cpus) 120a0ae0240SLorenzo Pieralisi return; 121a0ae0240SLorenzo Pieralisi 122a0ae0240SLorenzo Pieralisi for_each_child_of_node(cpus, cpu) { 123a0ae0240SLorenzo Pieralisi u32 hwid; 124a0ae0240SLorenzo Pieralisi 1251ba9bf0aSLorenzo Pieralisi if (of_node_cmp(cpu->type, "cpu")) 1261ba9bf0aSLorenzo Pieralisi continue; 1271ba9bf0aSLorenzo Pieralisi 128a0ae0240SLorenzo Pieralisi pr_debug(" * %s...\n", cpu->full_name); 129a0ae0240SLorenzo Pieralisi /* 130a0ae0240SLorenzo Pieralisi * A device tree containing CPU nodes with missing "reg" 131a0ae0240SLorenzo Pieralisi * properties is considered invalid to build the 132a0ae0240SLorenzo Pieralisi * cpu_logical_map. 133a0ae0240SLorenzo Pieralisi */ 134a0ae0240SLorenzo Pieralisi if (of_property_read_u32(cpu, "reg", &hwid)) { 135a0ae0240SLorenzo Pieralisi pr_debug(" * %s missing reg property\n", 136a0ae0240SLorenzo Pieralisi cpu->full_name); 137a0ae0240SLorenzo Pieralisi return; 138a0ae0240SLorenzo Pieralisi } 139a0ae0240SLorenzo Pieralisi 140a0ae0240SLorenzo Pieralisi /* 141a0ae0240SLorenzo Pieralisi * 8 MSBs must be set to 0 in the DT since the reg property 142a0ae0240SLorenzo Pieralisi * defines the MPIDR[23:0]. 143a0ae0240SLorenzo Pieralisi */ 144a0ae0240SLorenzo Pieralisi if (hwid & ~MPIDR_HWID_BITMASK) 145a0ae0240SLorenzo Pieralisi return; 146a0ae0240SLorenzo Pieralisi 147a0ae0240SLorenzo Pieralisi /* 148a0ae0240SLorenzo Pieralisi * Duplicate MPIDRs are a recipe for disaster. 149a0ae0240SLorenzo Pieralisi * Scan all initialized entries and check for 150a0ae0240SLorenzo Pieralisi * duplicates. If any is found just bail out. 151a0ae0240SLorenzo Pieralisi * temp values were initialized to UINT_MAX 152a0ae0240SLorenzo Pieralisi * to avoid matching valid MPIDR[23:0] values. 153a0ae0240SLorenzo Pieralisi */ 154a0ae0240SLorenzo Pieralisi for (j = 0; j < cpuidx; j++) 155a0ae0240SLorenzo Pieralisi if (WARN(tmp_map[j] == hwid, "Duplicate /cpu reg " 156a0ae0240SLorenzo Pieralisi "properties in the DT\n")) 157a0ae0240SLorenzo Pieralisi return; 158a0ae0240SLorenzo Pieralisi 159a0ae0240SLorenzo Pieralisi /* 160a0ae0240SLorenzo Pieralisi * Build a stashed array of MPIDR values. Numbering scheme 161a0ae0240SLorenzo Pieralisi * requires that if detected the boot CPU must be assigned 162a0ae0240SLorenzo Pieralisi * logical id 0. Other CPUs get sequential indexes starting 163a0ae0240SLorenzo Pieralisi * from 1. If a CPU node with a reg property matching the 164a0ae0240SLorenzo Pieralisi * boot CPU MPIDR is detected, this is recorded so that the 165a0ae0240SLorenzo Pieralisi * logical map built from DT is validated and can be used 166a0ae0240SLorenzo Pieralisi * to override the map created in smp_setup_processor_id(). 167a0ae0240SLorenzo Pieralisi */ 168a0ae0240SLorenzo Pieralisi if (hwid == mpidr) { 169a0ae0240SLorenzo Pieralisi i = 0; 170a0ae0240SLorenzo Pieralisi bootcpu_valid = true; 171a0ae0240SLorenzo Pieralisi } else { 172a0ae0240SLorenzo Pieralisi i = cpuidx++; 173a0ae0240SLorenzo Pieralisi } 174a0ae0240SLorenzo Pieralisi 175ce7b1756SLorenzo Pieralisi if (WARN(cpuidx > nr_cpu_ids, "DT /cpu %u nodes greater than " 176ce7b1756SLorenzo Pieralisi "max cores %u, capping them\n", 177ce7b1756SLorenzo Pieralisi cpuidx, nr_cpu_ids)) { 178ce7b1756SLorenzo Pieralisi cpuidx = nr_cpu_ids; 179a0ae0240SLorenzo Pieralisi break; 180a0ae0240SLorenzo Pieralisi } 181a0ae0240SLorenzo Pieralisi 182ce7b1756SLorenzo Pieralisi tmp_map[i] = hwid; 183*6c3ff8b1SStephen Boyd 184*6c3ff8b1SStephen Boyd if (!found_method) 185*6c3ff8b1SStephen Boyd found_method = set_smp_ops_by_method(cpu); 186ce7b1756SLorenzo Pieralisi } 187ce7b1756SLorenzo Pieralisi 188*6c3ff8b1SStephen Boyd /* 189*6c3ff8b1SStephen Boyd * Fallback to an enable-method in the cpus node if nothing found in 190*6c3ff8b1SStephen Boyd * a cpu node. 191*6c3ff8b1SStephen Boyd */ 192*6c3ff8b1SStephen Boyd if (!found_method) 193*6c3ff8b1SStephen Boyd set_smp_ops_by_method(cpus); 194*6c3ff8b1SStephen Boyd 1958d5bc1a6SOlof Johansson if (!bootcpu_valid) { 1968d5bc1a6SOlof Johansson pr_warn("DT missing boot CPU MPIDR[23:0], fall back to default cpu_logical_map\n"); 197a0ae0240SLorenzo Pieralisi return; 1988d5bc1a6SOlof Johansson } 199a0ae0240SLorenzo Pieralisi 200a0ae0240SLorenzo Pieralisi /* 201a0ae0240SLorenzo Pieralisi * Since the boot CPU node contains proper data, and all nodes have 202a0ae0240SLorenzo Pieralisi * a reg property, the DT CPU list can be considered valid and the 203a0ae0240SLorenzo Pieralisi * logical map created in smp_setup_processor_id() can be overridden 204a0ae0240SLorenzo Pieralisi */ 205a0ae0240SLorenzo Pieralisi for (i = 0; i < cpuidx; i++) { 206a0ae0240SLorenzo Pieralisi set_cpu_possible(i, true); 207a0ae0240SLorenzo Pieralisi cpu_logical_map(i) = tmp_map[i]; 208a0ae0240SLorenzo Pieralisi pr_debug("cpu logical map 0x%x\n", cpu_logical_map(i)); 209a0ae0240SLorenzo Pieralisi } 210a0ae0240SLorenzo Pieralisi } 211a0ae0240SLorenzo Pieralisi 212973e02c1SSudeep KarkadaNagesha bool arch_match_cpu_phys_id(int cpu, u64 phys_id) 213973e02c1SSudeep KarkadaNagesha { 214e44ef891SSudeep Holla return phys_id == cpu_logical_map(cpu); 215973e02c1SSudeep KarkadaNagesha } 216973e02c1SSudeep KarkadaNagesha 2176d67a9f6SRob Herring static const void * __init arch_get_next_mach(const char *const **match) 2186d67a9f6SRob Herring { 2196d67a9f6SRob Herring static const struct machine_desc *mdesc = __arch_info_begin; 2206d67a9f6SRob Herring const struct machine_desc *m = mdesc; 2216d67a9f6SRob Herring 2226d67a9f6SRob Herring if (m >= __arch_info_end) 2236d67a9f6SRob Herring return NULL; 2246d67a9f6SRob Herring 2256d67a9f6SRob Herring mdesc++; 2266d67a9f6SRob Herring *match = m->dt_compat; 2276d67a9f6SRob Herring return m; 2286d67a9f6SRob Herring } 2296d67a9f6SRob Herring 23093c02ab4SGrant Likely /** 23193c02ab4SGrant Likely * setup_machine_fdt - Machine setup when an dtb was passed to the kernel 23293c02ab4SGrant Likely * @dt_phys: physical address of dt blob 23393c02ab4SGrant Likely * 23493c02ab4SGrant Likely * If a dtb was passed to the kernel in r2, then use it to choose the 23593c02ab4SGrant Likely * correct machine_desc and to setup the system. 23693c02ab4SGrant Likely */ 237ff69a4c8SRussell King const struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys) 23893c02ab4SGrant Likely { 239ff69a4c8SRussell King const struct machine_desc *mdesc, *mdesc_best = NULL; 24093c02ab4SGrant Likely 241883a106bSArnd Bergmann #ifdef CONFIG_ARCH_MULTIPLATFORM 242883a106bSArnd Bergmann DT_MACHINE_START(GENERIC_DT, "Generic DT based system") 243883a106bSArnd Bergmann MACHINE_END 244883a106bSArnd Bergmann 245ff69a4c8SRussell King mdesc_best = &__mach_desc_GENERIC_DT; 246883a106bSArnd Bergmann #endif 247883a106bSArnd Bergmann 24856dc1f47SRob Herring if (!dt_phys || !early_init_dt_scan(phys_to_virt(dt_phys))) 249f506cd48SNicolas Pitre return NULL; 250f506cd48SNicolas Pitre 2516d67a9f6SRob Herring mdesc = of_flat_dt_match_machine(mdesc_best, arch_get_next_mach); 25293c02ab4SGrant Likely 2536d67a9f6SRob Herring if (!mdesc) { 25493c02ab4SGrant Likely const char *prop; 25593c02ab4SGrant Likely long size; 2566d67a9f6SRob Herring unsigned long dt_root; 25793c02ab4SGrant Likely 25893c02ab4SGrant Likely early_print("\nError: unrecognized/unsupported " 25993c02ab4SGrant Likely "device tree compatible list:\n[ "); 26093c02ab4SGrant Likely 2616d67a9f6SRob Herring dt_root = of_get_flat_dt_root(); 26293c02ab4SGrant Likely prop = of_get_flat_dt_prop(dt_root, "compatible", &size); 26393c02ab4SGrant Likely while (size > 0) { 26493c02ab4SGrant Likely early_print("'%s' ", prop); 26593c02ab4SGrant Likely size -= strlen(prop) + 1; 26693c02ab4SGrant Likely prop += strlen(prop) + 1; 26793c02ab4SGrant Likely } 26893c02ab4SGrant Likely early_print("]\n\n"); 26993c02ab4SGrant Likely 27093c02ab4SGrant Likely dump_machine_table(); /* does not return */ 27193c02ab4SGrant Likely } 27293c02ab4SGrant Likely 27393c02ab4SGrant Likely /* Change machine number to match the mdesc we're using */ 2746d67a9f6SRob Herring __machine_arch_type = mdesc->nr; 27593c02ab4SGrant Likely 2766d67a9f6SRob Herring return mdesc; 27793c02ab4SGrant Likely } 278