xref: /openbmc/linux/arch/arm/kernel/devtree.c (revision 33def8498fdde180023444b08e12b72a9efed41d)
1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
29eb8f674SGrant Likely /*
39eb8f674SGrant Likely  *  linux/arch/arm/kernel/devtree.c
49eb8f674SGrant Likely  *
59eb8f674SGrant Likely  *  Copyright (C) 2009 Canonical Ltd. <jeremy.kerr@canonical.com>
69eb8f674SGrant Likely  */
79eb8f674SGrant Likely 
89eb8f674SGrant Likely #include <linux/init.h>
9ecea4ab6SPaul Gortmaker #include <linux/export.h>
109eb8f674SGrant Likely #include <linux/errno.h>
119eb8f674SGrant Likely #include <linux/types.h>
129eb8f674SGrant Likely #include <linux/memblock.h>
139eb8f674SGrant Likely #include <linux/of.h>
149eb8f674SGrant Likely #include <linux/of_fdt.h>
159eb8f674SGrant Likely #include <linux/of_irq.h>
169eb8f674SGrant Likely #include <linux/of_platform.h>
176c3ff8b1SStephen Boyd #include <linux/smp.h>
189eb8f674SGrant Likely 
19a0ae0240SLorenzo Pieralisi #include <asm/cputype.h>
209eb8f674SGrant Likely #include <asm/setup.h>
219eb8f674SGrant Likely #include <asm/page.h>
222374b063SBen Dooks #include <asm/prom.h>
23a0ae0240SLorenzo Pieralisi #include <asm/smp_plat.h>
2493c02ab4SGrant Likely #include <asm/mach/arch.h>
2593c02ab4SGrant Likely #include <asm/mach-types.h>
269eb8f674SGrant Likely 
279eb8f674SGrant Likely 
286c3ff8b1SStephen Boyd #ifdef CONFIG_SMP
299a721c41SRob Herring extern struct of_cpu_method __cpu_method_of_table[];
309a721c41SRob Herring 
319a721c41SRob Herring static const struct of_cpu_method __cpu_method_of_table_sentinel
32*33def849SJoe Perches 	__used __section("__cpu_method_of_table_end");
339a721c41SRob Herring 
346c3ff8b1SStephen Boyd 
356c3ff8b1SStephen Boyd static int __init set_smp_ops_by_method(struct device_node *node)
366c3ff8b1SStephen Boyd {
376c3ff8b1SStephen Boyd 	const char *method;
389a721c41SRob Herring 	struct of_cpu_method *m = __cpu_method_of_table;
396c3ff8b1SStephen Boyd 
406c3ff8b1SStephen Boyd 	if (of_property_read_string(node, "enable-method", &method))
416c3ff8b1SStephen Boyd 		return 0;
426c3ff8b1SStephen Boyd 
439a721c41SRob Herring 	for (; m->method; m++)
446c3ff8b1SStephen Boyd 		if (!strcmp(m->method, method)) {
456c3ff8b1SStephen Boyd 			smp_set_ops(m->ops);
466c3ff8b1SStephen Boyd 			return 1;
476c3ff8b1SStephen Boyd 		}
486c3ff8b1SStephen Boyd 
496c3ff8b1SStephen Boyd 	return 0;
506c3ff8b1SStephen Boyd }
516c3ff8b1SStephen Boyd #else
526c3ff8b1SStephen Boyd static inline int set_smp_ops_by_method(struct device_node *node)
536c3ff8b1SStephen Boyd {
546c3ff8b1SStephen Boyd 	return 1;
556c3ff8b1SStephen Boyd }
566c3ff8b1SStephen Boyd #endif
576c3ff8b1SStephen Boyd 
586c3ff8b1SStephen Boyd 
59a0ae0240SLorenzo Pieralisi /*
60a0ae0240SLorenzo Pieralisi  * arm_dt_init_cpu_maps - Function retrieves cpu nodes from the device tree
61a0ae0240SLorenzo Pieralisi  * and builds the cpu logical map array containing MPIDR values related to
62a0ae0240SLorenzo Pieralisi  * logical cpus
63a0ae0240SLorenzo Pieralisi  *
64a0ae0240SLorenzo Pieralisi  * Updates the cpu possible mask with the number of parsed cpu nodes
65a0ae0240SLorenzo Pieralisi  */
66a0ae0240SLorenzo Pieralisi void __init arm_dt_init_cpu_maps(void)
67a0ae0240SLorenzo Pieralisi {
68a0ae0240SLorenzo Pieralisi 	/*
69a0ae0240SLorenzo Pieralisi 	 * Temp logical map is initialized with UINT_MAX values that are
70a0ae0240SLorenzo Pieralisi 	 * considered invalid logical map entries since the logical map must
71a0ae0240SLorenzo Pieralisi 	 * contain a list of MPIDR[23:0] values where MPIDR[31:24] must
72a0ae0240SLorenzo Pieralisi 	 * read as 0.
73a0ae0240SLorenzo Pieralisi 	 */
74a0ae0240SLorenzo Pieralisi 	struct device_node *cpu, *cpus;
756c3ff8b1SStephen Boyd 	int found_method = 0;
76a0ae0240SLorenzo Pieralisi 	u32 i, j, cpuidx = 1;
77a0ae0240SLorenzo Pieralisi 	u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0;
78a0ae0240SLorenzo Pieralisi 
7918d7f152SLorenzo Pieralisi 	u32 tmp_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID };
80a0ae0240SLorenzo Pieralisi 	bool bootcpu_valid = false;
81a0ae0240SLorenzo Pieralisi 	cpus = of_find_node_by_path("/cpus");
82a0ae0240SLorenzo Pieralisi 
83a0ae0240SLorenzo Pieralisi 	if (!cpus)
84a0ae0240SLorenzo Pieralisi 		return;
85a0ae0240SLorenzo Pieralisi 
86d4866f75SRob Herring 	for_each_of_cpu_node(cpu) {
87ba6dea4fSRobin Murphy 		const __be32 *cell;
88ba6dea4fSRobin Murphy 		int prop_bytes;
89a0ae0240SLorenzo Pieralisi 		u32 hwid;
90a0ae0240SLorenzo Pieralisi 
91a8e65e06SRob Herring 		pr_debug(" * %pOF...\n", cpu);
92a0ae0240SLorenzo Pieralisi 		/*
93a0ae0240SLorenzo Pieralisi 		 * A device tree containing CPU nodes with missing "reg"
94a0ae0240SLorenzo Pieralisi 		 * properties is considered invalid to build the
95a0ae0240SLorenzo Pieralisi 		 * cpu_logical_map.
96a0ae0240SLorenzo Pieralisi 		 */
97ba6dea4fSRobin Murphy 		cell = of_get_property(cpu, "reg", &prop_bytes);
98ba6dea4fSRobin Murphy 		if (!cell || prop_bytes < sizeof(*cell)) {
99a8e65e06SRob Herring 			pr_debug(" * %pOF missing reg property\n", cpu);
100a4283e41SJulia Lawall 			of_node_put(cpu);
101a0ae0240SLorenzo Pieralisi 			return;
102a0ae0240SLorenzo Pieralisi 		}
103a0ae0240SLorenzo Pieralisi 
104a0ae0240SLorenzo Pieralisi 		/*
105ba6dea4fSRobin Murphy 		 * Bits n:24 must be set to 0 in the DT since the reg property
106a0ae0240SLorenzo Pieralisi 		 * defines the MPIDR[23:0].
107a0ae0240SLorenzo Pieralisi 		 */
108ba6dea4fSRobin Murphy 		do {
109ba6dea4fSRobin Murphy 			hwid = be32_to_cpu(*cell++);
110ba6dea4fSRobin Murphy 			prop_bytes -= sizeof(*cell);
111ba6dea4fSRobin Murphy 		} while (!hwid && prop_bytes > 0);
112ba6dea4fSRobin Murphy 
113ba6dea4fSRobin Murphy 		if (prop_bytes || (hwid & ~MPIDR_HWID_BITMASK)) {
114a4283e41SJulia Lawall 			of_node_put(cpu);
115a0ae0240SLorenzo Pieralisi 			return;
116a4283e41SJulia Lawall 		}
117a0ae0240SLorenzo Pieralisi 
118a0ae0240SLorenzo Pieralisi 		/*
119a0ae0240SLorenzo Pieralisi 		 * Duplicate MPIDRs are a recipe for disaster.
120a0ae0240SLorenzo Pieralisi 		 * Scan all initialized entries and check for
121a0ae0240SLorenzo Pieralisi 		 * duplicates. If any is found just bail out.
122a0ae0240SLorenzo Pieralisi 		 * temp values were initialized to UINT_MAX
123a0ae0240SLorenzo Pieralisi 		 * to avoid matching valid MPIDR[23:0] values.
124a0ae0240SLorenzo Pieralisi 		 */
125a0ae0240SLorenzo Pieralisi 		for (j = 0; j < cpuidx; j++)
126a4283e41SJulia Lawall 			if (WARN(tmp_map[j] == hwid,
127a4283e41SJulia Lawall 				 "Duplicate /cpu reg properties in the DT\n")) {
128a4283e41SJulia Lawall 				of_node_put(cpu);
129a0ae0240SLorenzo Pieralisi 				return;
130a4283e41SJulia Lawall 			}
131a0ae0240SLorenzo Pieralisi 
132a0ae0240SLorenzo Pieralisi 		/*
133a0ae0240SLorenzo Pieralisi 		 * Build a stashed array of MPIDR values. Numbering scheme
134a0ae0240SLorenzo Pieralisi 		 * requires that if detected the boot CPU must be assigned
135a0ae0240SLorenzo Pieralisi 		 * logical id 0. Other CPUs get sequential indexes starting
136a0ae0240SLorenzo Pieralisi 		 * from 1. If a CPU node with a reg property matching the
137a0ae0240SLorenzo Pieralisi 		 * boot CPU MPIDR is detected, this is recorded so that the
138a0ae0240SLorenzo Pieralisi 		 * logical map built from DT is validated and can be used
139a0ae0240SLorenzo Pieralisi 		 * to override the map created in smp_setup_processor_id().
140a0ae0240SLorenzo Pieralisi 		 */
141a0ae0240SLorenzo Pieralisi 		if (hwid == mpidr) {
142a0ae0240SLorenzo Pieralisi 			i = 0;
143a0ae0240SLorenzo Pieralisi 			bootcpu_valid = true;
144a0ae0240SLorenzo Pieralisi 		} else {
145a0ae0240SLorenzo Pieralisi 			i = cpuidx++;
146a0ae0240SLorenzo Pieralisi 		}
147a0ae0240SLorenzo Pieralisi 
148ce7b1756SLorenzo Pieralisi 		if (WARN(cpuidx > nr_cpu_ids, "DT /cpu %u nodes greater than "
149ce7b1756SLorenzo Pieralisi 					       "max cores %u, capping them\n",
150ce7b1756SLorenzo Pieralisi 					       cpuidx, nr_cpu_ids)) {
151ce7b1756SLorenzo Pieralisi 			cpuidx = nr_cpu_ids;
152a4283e41SJulia Lawall 			of_node_put(cpu);
153a0ae0240SLorenzo Pieralisi 			break;
154a0ae0240SLorenzo Pieralisi 		}
155a0ae0240SLorenzo Pieralisi 
156ce7b1756SLorenzo Pieralisi 		tmp_map[i] = hwid;
1576c3ff8b1SStephen Boyd 
1586c3ff8b1SStephen Boyd 		if (!found_method)
1596c3ff8b1SStephen Boyd 			found_method = set_smp_ops_by_method(cpu);
160ce7b1756SLorenzo Pieralisi 	}
161ce7b1756SLorenzo Pieralisi 
1626c3ff8b1SStephen Boyd 	/*
1636c3ff8b1SStephen Boyd 	 * Fallback to an enable-method in the cpus node if nothing found in
1646c3ff8b1SStephen Boyd 	 * a cpu node.
1656c3ff8b1SStephen Boyd 	 */
1666c3ff8b1SStephen Boyd 	if (!found_method)
1676c3ff8b1SStephen Boyd 		set_smp_ops_by_method(cpus);
1686c3ff8b1SStephen Boyd 
1698d5bc1a6SOlof Johansson 	if (!bootcpu_valid) {
1708d5bc1a6SOlof Johansson 		pr_warn("DT missing boot CPU MPIDR[23:0], fall back to default cpu_logical_map\n");
171a0ae0240SLorenzo Pieralisi 		return;
1728d5bc1a6SOlof Johansson 	}
173a0ae0240SLorenzo Pieralisi 
174a0ae0240SLorenzo Pieralisi 	/*
175a0ae0240SLorenzo Pieralisi 	 * Since the boot CPU node contains proper data, and all nodes have
176a0ae0240SLorenzo Pieralisi 	 * a reg property, the DT CPU list can be considered valid and the
177a0ae0240SLorenzo Pieralisi 	 * logical map created in smp_setup_processor_id() can be overridden
178a0ae0240SLorenzo Pieralisi 	 */
179a0ae0240SLorenzo Pieralisi 	for (i = 0; i < cpuidx; i++) {
180a0ae0240SLorenzo Pieralisi 		set_cpu_possible(i, true);
181a0ae0240SLorenzo Pieralisi 		cpu_logical_map(i) = tmp_map[i];
182a0ae0240SLorenzo Pieralisi 		pr_debug("cpu logical map 0x%x\n", cpu_logical_map(i));
183a0ae0240SLorenzo Pieralisi 	}
184a0ae0240SLorenzo Pieralisi }
185a0ae0240SLorenzo Pieralisi 
186973e02c1SSudeep KarkadaNagesha bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
187973e02c1SSudeep KarkadaNagesha {
188e44ef891SSudeep Holla 	return phys_id == cpu_logical_map(cpu);
189973e02c1SSudeep KarkadaNagesha }
190973e02c1SSudeep KarkadaNagesha 
1916d67a9f6SRob Herring static const void * __init arch_get_next_mach(const char *const **match)
1926d67a9f6SRob Herring {
1936d67a9f6SRob Herring 	static const struct machine_desc *mdesc = __arch_info_begin;
1946d67a9f6SRob Herring 	const struct machine_desc *m = mdesc;
1956d67a9f6SRob Herring 
1966d67a9f6SRob Herring 	if (m >= __arch_info_end)
1976d67a9f6SRob Herring 		return NULL;
1986d67a9f6SRob Herring 
1996d67a9f6SRob Herring 	mdesc++;
2006d67a9f6SRob Herring 	*match = m->dt_compat;
2016d67a9f6SRob Herring 	return m;
2026d67a9f6SRob Herring }
2036d67a9f6SRob Herring 
20493c02ab4SGrant Likely /**
20593c02ab4SGrant Likely  * setup_machine_fdt - Machine setup when an dtb was passed to the kernel
20693c02ab4SGrant Likely  * @dt_phys: physical address of dt blob
20793c02ab4SGrant Likely  *
20893c02ab4SGrant Likely  * If a dtb was passed to the kernel in r2, then use it to choose the
20993c02ab4SGrant Likely  * correct machine_desc and to setup the system.
21093c02ab4SGrant Likely  */
211ff69a4c8SRussell King const struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys)
21293c02ab4SGrant Likely {
213ff69a4c8SRussell King 	const struct machine_desc *mdesc, *mdesc_best = NULL;
21493c02ab4SGrant Likely 
21570722803SArnd Bergmann #if defined(CONFIG_ARCH_MULTIPLATFORM) || defined(CONFIG_ARM_SINGLE_ARMV7M)
216883a106bSArnd Bergmann 	DT_MACHINE_START(GENERIC_DT, "Generic DT based system")
217cb6f8344SLinus Walleij 		.l2c_aux_val = 0x0,
218cb6f8344SLinus Walleij 		.l2c_aux_mask = ~0x0,
219883a106bSArnd Bergmann 	MACHINE_END
220883a106bSArnd Bergmann 
221ff69a4c8SRussell King 	mdesc_best = &__mach_desc_GENERIC_DT;
222883a106bSArnd Bergmann #endif
223883a106bSArnd Bergmann 
2245a12a597SLaura Abbott 	if (!dt_phys || !early_init_dt_verify(phys_to_virt(dt_phys)))
225f506cd48SNicolas Pitre 		return NULL;
226f506cd48SNicolas Pitre 
2276d67a9f6SRob Herring 	mdesc = of_flat_dt_match_machine(mdesc_best, arch_get_next_mach);
22893c02ab4SGrant Likely 
2296d67a9f6SRob Herring 	if (!mdesc) {
23093c02ab4SGrant Likely 		const char *prop;
2319d0c4dfeSRob Herring 		int size;
2326d67a9f6SRob Herring 		unsigned long dt_root;
23393c02ab4SGrant Likely 
23493c02ab4SGrant Likely 		early_print("\nError: unrecognized/unsupported "
23593c02ab4SGrant Likely 			    "device tree compatible list:\n[ ");
23693c02ab4SGrant Likely 
2376d67a9f6SRob Herring 		dt_root = of_get_flat_dt_root();
23893c02ab4SGrant Likely 		prop = of_get_flat_dt_prop(dt_root, "compatible", &size);
23993c02ab4SGrant Likely 		while (size > 0) {
24093c02ab4SGrant Likely 			early_print("'%s' ", prop);
24193c02ab4SGrant Likely 			size -= strlen(prop) + 1;
24293c02ab4SGrant Likely 			prop += strlen(prop) + 1;
24393c02ab4SGrant Likely 		}
24493c02ab4SGrant Likely 		early_print("]\n\n");
24593c02ab4SGrant Likely 
24693c02ab4SGrant Likely 		dump_machine_table(); /* does not return */
24793c02ab4SGrant Likely 	}
24893c02ab4SGrant Likely 
2495a12a597SLaura Abbott 	/* We really don't want to do this, but sometimes firmware provides buggy data */
2505a12a597SLaura Abbott 	if (mdesc->dt_fixup)
2515a12a597SLaura Abbott 		mdesc->dt_fixup();
2525a12a597SLaura Abbott 
2535a12a597SLaura Abbott 	early_init_dt_scan_nodes();
2545a12a597SLaura Abbott 
25593c02ab4SGrant Likely 	/* Change machine number to match the mdesc we're using */
2566d67a9f6SRob Herring 	__machine_arch_type = mdesc->nr;
25793c02ab4SGrant Likely 
2586d67a9f6SRob Herring 	return mdesc;
25993c02ab4SGrant Likely }
260