11da177e4SLinus Torvalds/* 21da177e4SLinus Torvalds * linux/arch/arm/kernel/debug.S 31da177e4SLinus Torvalds * 41da177e4SLinus Torvalds * Copyright (C) 1994-1999 Russell King 51da177e4SLinus Torvalds * 61da177e4SLinus Torvalds * This program is free software; you can redistribute it and/or modify 71da177e4SLinus Torvalds * it under the terms of the GNU General Public License version 2 as 81da177e4SLinus Torvalds * published by the Free Software Foundation. 91da177e4SLinus Torvalds * 101da177e4SLinus Torvalds * 32-bit debugging code 111da177e4SLinus Torvalds */ 121da177e4SLinus Torvalds#include <linux/linkage.h> 131da177e4SLinus Torvalds 141da177e4SLinus Torvalds .text 151da177e4SLinus Torvalds 161da177e4SLinus Torvalds/* 171da177e4SLinus Torvalds * Some debugging routines (useful if you've got MM problems and 181da177e4SLinus Torvalds * printk isn't working). For DEBUGGING ONLY!!! Do not leave 191da177e4SLinus Torvalds * references to these in a production kernel! 201da177e4SLinus Torvalds */ 211da177e4SLinus Torvalds 221da177e4SLinus Torvalds#if defined(CONFIG_DEBUG_ICEDCC) 231da177e4SLinus Torvalds @@ debug using ARM EmbeddedICE DCC channel 247d95ded9STony Lindgren 25639da5eeSNicolas Pitre .macro addruart, rp, rv, tmp 267d95ded9STony Lindgren .endm 277d95ded9STony Lindgren 28dfad549dSStephen Boyd#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7) 291ea64615SJeremy Kerr 307d95ded9STony Lindgren .macro senduart, rd, rx 317d95ded9STony Lindgren mcr p14, 0, \rd, c0, c5, 0 327d95ded9STony Lindgren .endm 337d95ded9STony Lindgren 347d95ded9STony Lindgren .macro busyuart, rd, rx 357d95ded9STony Lindgren1001: 367d95ded9STony Lindgren mrc p14, 0, \rx, c0, c1, 0 377d95ded9STony Lindgren tst \rx, #0x20000000 387d95ded9STony Lindgren beq 1001b 397d95ded9STony Lindgren .endm 407d95ded9STony Lindgren 417d95ded9STony Lindgren .macro waituart, rd, rx 427d95ded9STony Lindgren mov \rd, #0x2000000 437d95ded9STony Lindgren1001: 447d95ded9STony Lindgren subs \rd, \rd, #1 457d95ded9STony Lindgren bmi 1002f 467d95ded9STony Lindgren mrc p14, 0, \rx, c0, c1, 0 477d95ded9STony Lindgren tst \rx, #0x20000000 487d95ded9STony Lindgren bne 1001b 497d95ded9STony Lindgren1002: 507d95ded9STony Lindgren .endm 517d95ded9STony Lindgren 52c633c3cfSJean-Christop PLAGNIOL-VILLARD#elif defined(CONFIG_CPU_XSCALE) 53c633c3cfSJean-Christop PLAGNIOL-VILLARD 54c633c3cfSJean-Christop PLAGNIOL-VILLARD .macro senduart, rd, rx 55c633c3cfSJean-Christop PLAGNIOL-VILLARD mcr p14, 0, \rd, c8, c0, 0 56c633c3cfSJean-Christop PLAGNIOL-VILLARD .endm 57c633c3cfSJean-Christop PLAGNIOL-VILLARD 58c633c3cfSJean-Christop PLAGNIOL-VILLARD .macro busyuart, rd, rx 59c633c3cfSJean-Christop PLAGNIOL-VILLARD1001: 60c633c3cfSJean-Christop PLAGNIOL-VILLARD mrc p14, 0, \rx, c14, c0, 0 61c633c3cfSJean-Christop PLAGNIOL-VILLARD tst \rx, #0x10000000 62c633c3cfSJean-Christop PLAGNIOL-VILLARD beq 1001b 63c633c3cfSJean-Christop PLAGNIOL-VILLARD .endm 64c633c3cfSJean-Christop PLAGNIOL-VILLARD 65c633c3cfSJean-Christop PLAGNIOL-VILLARD .macro waituart, rd, rx 66c633c3cfSJean-Christop PLAGNIOL-VILLARD mov \rd, #0x10000000 67c633c3cfSJean-Christop PLAGNIOL-VILLARD1001: 68c633c3cfSJean-Christop PLAGNIOL-VILLARD subs \rd, \rd, #1 69c633c3cfSJean-Christop PLAGNIOL-VILLARD bmi 1002f 70c633c3cfSJean-Christop PLAGNIOL-VILLARD mrc p14, 0, \rx, c14, c0, 0 71c633c3cfSJean-Christop PLAGNIOL-VILLARD tst \rx, #0x10000000 72c633c3cfSJean-Christop PLAGNIOL-VILLARD bne 1001b 73c633c3cfSJean-Christop PLAGNIOL-VILLARD1002: 74c633c3cfSJean-Christop PLAGNIOL-VILLARD .endm 75c633c3cfSJean-Christop PLAGNIOL-VILLARD 767d95ded9STony Lindgren#else 777d95ded9STony Lindgren 781da177e4SLinus Torvalds .macro senduart, rd, rx 791da177e4SLinus Torvalds mcr p14, 0, \rd, c1, c0, 0 801da177e4SLinus Torvalds .endm 811da177e4SLinus Torvalds 821da177e4SLinus Torvalds .macro busyuart, rd, rx 831da177e4SLinus Torvalds1001: 841da177e4SLinus Torvalds mrc p14, 0, \rx, c0, c0, 0 851da177e4SLinus Torvalds tst \rx, #2 861da177e4SLinus Torvalds beq 1001b 871da177e4SLinus Torvalds 881da177e4SLinus Torvalds .endm 891da177e4SLinus Torvalds 901da177e4SLinus Torvalds .macro waituart, rd, rx 911da177e4SLinus Torvalds mov \rd, #0x2000000 921da177e4SLinus Torvalds1001: 931da177e4SLinus Torvalds subs \rd, \rd, #1 941da177e4SLinus Torvalds bmi 1002f 951da177e4SLinus Torvalds mrc p14, 0, \rx, c0, c0, 0 961da177e4SLinus Torvalds tst \rx, #2 971da177e4SLinus Torvalds bne 1001b 981da177e4SLinus Torvalds1002: 991da177e4SLinus Torvalds .endm 1007d95ded9STony Lindgren 1017d95ded9STony Lindgren#endif /* CONFIG_CPU_V6 */ 1027d95ded9STony Lindgren 103*9b5a146aSNicolas Pitre#elif !defined(CONFIG_DEBUG_SEMIHOSTING) 104a09e64fbSRussell King#include <mach/debug-macro.S> 1057d95ded9STony Lindgren#endif /* CONFIG_DEBUG_ICEDCC */ 1061da177e4SLinus Torvalds 1070ea12930SJeremy Kerr#ifdef CONFIG_MMU 1080ea12930SJeremy Kerr .macro addruart_current, rx, tmp1, tmp2 109639da5eeSNicolas Pitre addruart \tmp1, \tmp2, \rx 1100ea12930SJeremy Kerr mrc p15, 0, \rx, c1, c0 1110ea12930SJeremy Kerr tst \rx, #1 1120ea12930SJeremy Kerr moveq \rx, \tmp1 1130ea12930SJeremy Kerr movne \rx, \tmp2 1140ea12930SJeremy Kerr .endm 1150ea12930SJeremy Kerr 1160ea12930SJeremy Kerr#else /* !CONFIG_MMU */ 1170ea12930SJeremy Kerr .macro addruart_current, rx, tmp1, tmp2 1180ea12930SJeremy Kerr addruart \rx, \tmp1 1190ea12930SJeremy Kerr .endm 1200ea12930SJeremy Kerr 1210ea12930SJeremy Kerr#endif /* CONFIG_MMU */ 1220ea12930SJeremy Kerr 1231da177e4SLinus Torvalds/* 1241da177e4SLinus Torvalds * Useful debugging routines 1251da177e4SLinus Torvalds */ 1261da177e4SLinus TorvaldsENTRY(printhex8) 1271da177e4SLinus Torvalds mov r1, #8 1281da177e4SLinus Torvalds b printhex 12993ed3970SCatalin MarinasENDPROC(printhex8) 1301da177e4SLinus Torvalds 1311da177e4SLinus TorvaldsENTRY(printhex4) 1321da177e4SLinus Torvalds mov r1, #4 1331da177e4SLinus Torvalds b printhex 13493ed3970SCatalin MarinasENDPROC(printhex4) 1351da177e4SLinus Torvalds 1361da177e4SLinus TorvaldsENTRY(printhex2) 1371da177e4SLinus Torvalds mov r1, #2 1381da177e4SLinus Torvaldsprinthex: adr r2, hexbuf 1391da177e4SLinus Torvalds add r3, r2, r1 1401da177e4SLinus Torvalds mov r1, #0 1411da177e4SLinus Torvalds strb r1, [r3] 1421da177e4SLinus Torvalds1: and r1, r0, #15 1431da177e4SLinus Torvalds mov r0, r0, lsr #4 1441da177e4SLinus Torvalds cmp r1, #10 1451da177e4SLinus Torvalds addlt r1, r1, #'0' 1461da177e4SLinus Torvalds addge r1, r1, #'a' - 10 1471da177e4SLinus Torvalds strb r1, [r3, #-1]! 1481da177e4SLinus Torvalds teq r3, r2 1491da177e4SLinus Torvalds bne 1b 1501da177e4SLinus Torvalds mov r0, r2 1511da177e4SLinus Torvalds b printascii 15293ed3970SCatalin MarinasENDPROC(printhex2) 1531da177e4SLinus Torvalds 154b55fa188SAfzal Mohammedhexbuf: .space 16 155b55fa188SAfzal Mohammed 1561da177e4SLinus Torvalds .ltorg 1571da177e4SLinus Torvalds 158*9b5a146aSNicolas Pitre#ifndef CONFIG_DEBUG_SEMIHOSTING 159*9b5a146aSNicolas Pitre 1601da177e4SLinus TorvaldsENTRY(printascii) 1610ea12930SJeremy Kerr addruart_current r3, r1, r2 1621da177e4SLinus Torvalds b 2f 1631da177e4SLinus Torvalds1: waituart r2, r3 1641da177e4SLinus Torvalds senduart r1, r3 1651da177e4SLinus Torvalds busyuart r2, r3 1661da177e4SLinus Torvalds teq r1, #'\n' 1671da177e4SLinus Torvalds moveq r1, #'\r' 1681da177e4SLinus Torvalds beq 1b 1691da177e4SLinus Torvalds2: teq r0, #0 1701da177e4SLinus Torvalds ldrneb r1, [r0], #1 1711da177e4SLinus Torvalds teqne r1, #0 1721da177e4SLinus Torvalds bne 1b 1731da177e4SLinus Torvalds mov pc, lr 17493ed3970SCatalin MarinasENDPROC(printascii) 1751da177e4SLinus Torvalds 1761da177e4SLinus TorvaldsENTRY(printch) 1770ea12930SJeremy Kerr addruart_current r3, r1, r2 1781da177e4SLinus Torvalds mov r1, r0 1791da177e4SLinus Torvalds mov r0, #0 1801da177e4SLinus Torvalds b 1b 18193ed3970SCatalin MarinasENDPROC(printch) 182*9b5a146aSNicolas Pitre 183*9b5a146aSNicolas Pitre#else 184*9b5a146aSNicolas Pitre 185*9b5a146aSNicolas PitreENTRY(printascii) 186*9b5a146aSNicolas Pitre mov r1, r0 187*9b5a146aSNicolas Pitre mov r0, #0x04 @ SYS_WRITE0 188*9b5a146aSNicolas Pitre ARM( svc #0x123456 ) 189*9b5a146aSNicolas Pitre THUMB( svc #0xab ) 190*9b5a146aSNicolas Pitre mov pc, lr 191*9b5a146aSNicolas PitreENDPROC(printascii) 192*9b5a146aSNicolas Pitre 193*9b5a146aSNicolas PitreENTRY(printch) 194*9b5a146aSNicolas Pitre adr r1, hexbuf 195*9b5a146aSNicolas Pitre strb r0, [r1] 196*9b5a146aSNicolas Pitre mov r0, #0x03 @ SYS_WRITEC 197*9b5a146aSNicolas Pitre ARM( svc #0x123456 ) 198*9b5a146aSNicolas Pitre THUMB( svc #0xab ) 199*9b5a146aSNicolas Pitre mov pc, lr 200*9b5a146aSNicolas PitreENDPROC(printch) 201*9b5a146aSNicolas Pitre 202*9b5a146aSNicolas Pitre#endif 203