xref: /openbmc/linux/arch/arm/kernel/debug.S (revision 6f6f6a70295c6a4f89c7aca015c5db247a79d609)
11da177e4SLinus Torvalds/*
21da177e4SLinus Torvalds *  linux/arch/arm/kernel/debug.S
31da177e4SLinus Torvalds *
41da177e4SLinus Torvalds *  Copyright (C) 1994-1999 Russell King
51da177e4SLinus Torvalds *
61da177e4SLinus Torvalds * This program is free software; you can redistribute it and/or modify
71da177e4SLinus Torvalds * it under the terms of the GNU General Public License version 2 as
81da177e4SLinus Torvalds * published by the Free Software Foundation.
91da177e4SLinus Torvalds *
101da177e4SLinus Torvalds *  32-bit debugging code
111da177e4SLinus Torvalds */
121da177e4SLinus Torvalds#include <linux/linkage.h>
13*6f6f6a70SRob Herring#include <asm/assembler.h>
141da177e4SLinus Torvalds
151da177e4SLinus Torvalds		.text
161da177e4SLinus Torvalds
171da177e4SLinus Torvalds/*
181da177e4SLinus Torvalds * Some debugging routines (useful if you've got MM problems and
191da177e4SLinus Torvalds * printk isn't working).  For DEBUGGING ONLY!!!  Do not leave
201da177e4SLinus Torvalds * references to these in a production kernel!
211da177e4SLinus Torvalds */
221da177e4SLinus Torvalds
231da177e4SLinus Torvalds#if defined(CONFIG_DEBUG_ICEDCC)
241da177e4SLinus Torvalds		@@ debug using ARM EmbeddedICE DCC channel
257d95ded9STony Lindgren
26639da5eeSNicolas Pitre		.macro	addruart, rp, rv, tmp
277d95ded9STony Lindgren		.endm
287d95ded9STony Lindgren
29dfad549dSStephen Boyd#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)
301ea64615SJeremy Kerr
317d95ded9STony Lindgren		.macro	senduart, rd, rx
327d95ded9STony Lindgren		mcr	p14, 0, \rd, c0, c5, 0
337d95ded9STony Lindgren		.endm
347d95ded9STony Lindgren
357d95ded9STony Lindgren		.macro	busyuart, rd, rx
367d95ded9STony Lindgren1001:
377d95ded9STony Lindgren		mrc	p14, 0, \rx, c0, c1, 0
387d95ded9STony Lindgren		tst	\rx, #0x20000000
397d95ded9STony Lindgren		beq	1001b
407d95ded9STony Lindgren		.endm
417d95ded9STony Lindgren
427d95ded9STony Lindgren		.macro	waituart, rd, rx
437d95ded9STony Lindgren		mov	\rd, #0x2000000
447d95ded9STony Lindgren1001:
457d95ded9STony Lindgren		subs	\rd, \rd, #1
467d95ded9STony Lindgren		bmi	1002f
477d95ded9STony Lindgren		mrc	p14, 0, \rx, c0, c1, 0
487d95ded9STony Lindgren		tst	\rx, #0x20000000
497d95ded9STony Lindgren		bne	1001b
507d95ded9STony Lindgren1002:
517d95ded9STony Lindgren		.endm
527d95ded9STony Lindgren
53c633c3cfSJean-Christop PLAGNIOL-VILLARD#elif defined(CONFIG_CPU_XSCALE)
54c633c3cfSJean-Christop PLAGNIOL-VILLARD
55c633c3cfSJean-Christop PLAGNIOL-VILLARD		.macro	senduart, rd, rx
56c633c3cfSJean-Christop PLAGNIOL-VILLARD		mcr	p14, 0, \rd, c8, c0, 0
57c633c3cfSJean-Christop PLAGNIOL-VILLARD		.endm
58c633c3cfSJean-Christop PLAGNIOL-VILLARD
59c633c3cfSJean-Christop PLAGNIOL-VILLARD		.macro	busyuart, rd, rx
60c633c3cfSJean-Christop PLAGNIOL-VILLARD1001:
61c633c3cfSJean-Christop PLAGNIOL-VILLARD		mrc	p14, 0, \rx, c14, c0, 0
62c633c3cfSJean-Christop PLAGNIOL-VILLARD		tst	\rx, #0x10000000
63c633c3cfSJean-Christop PLAGNIOL-VILLARD		beq	1001b
64c633c3cfSJean-Christop PLAGNIOL-VILLARD		.endm
65c633c3cfSJean-Christop PLAGNIOL-VILLARD
66c633c3cfSJean-Christop PLAGNIOL-VILLARD		.macro	waituart, rd, rx
67c633c3cfSJean-Christop PLAGNIOL-VILLARD		mov	\rd, #0x10000000
68c633c3cfSJean-Christop PLAGNIOL-VILLARD1001:
69c633c3cfSJean-Christop PLAGNIOL-VILLARD		subs	\rd, \rd, #1
70c633c3cfSJean-Christop PLAGNIOL-VILLARD		bmi	1002f
71c633c3cfSJean-Christop PLAGNIOL-VILLARD		mrc	p14, 0, \rx, c14, c0, 0
72c633c3cfSJean-Christop PLAGNIOL-VILLARD		tst	\rx, #0x10000000
73c633c3cfSJean-Christop PLAGNIOL-VILLARD		bne	1001b
74c633c3cfSJean-Christop PLAGNIOL-VILLARD1002:
75c633c3cfSJean-Christop PLAGNIOL-VILLARD		.endm
76c633c3cfSJean-Christop PLAGNIOL-VILLARD
777d95ded9STony Lindgren#else
787d95ded9STony Lindgren
791da177e4SLinus Torvalds		.macro	senduart, rd, rx
801da177e4SLinus Torvalds		mcr	p14, 0, \rd, c1, c0, 0
811da177e4SLinus Torvalds		.endm
821da177e4SLinus Torvalds
831da177e4SLinus Torvalds		.macro	busyuart, rd, rx
841da177e4SLinus Torvalds1001:
851da177e4SLinus Torvalds		mrc	p14, 0, \rx, c0, c0, 0
861da177e4SLinus Torvalds		tst	\rx, #2
871da177e4SLinus Torvalds		beq	1001b
881da177e4SLinus Torvalds
891da177e4SLinus Torvalds		.endm
901da177e4SLinus Torvalds
911da177e4SLinus Torvalds		.macro	waituart, rd, rx
921da177e4SLinus Torvalds		mov	\rd, #0x2000000
931da177e4SLinus Torvalds1001:
941da177e4SLinus Torvalds		subs	\rd, \rd, #1
951da177e4SLinus Torvalds		bmi	1002f
961da177e4SLinus Torvalds		mrc	p14, 0, \rx, c0, c0, 0
971da177e4SLinus Torvalds		tst	\rx, #2
981da177e4SLinus Torvalds		bne	1001b
991da177e4SLinus Torvalds1002:
1001da177e4SLinus Torvalds		.endm
1017d95ded9STony Lindgren
1027d95ded9STony Lindgren#endif	/* CONFIG_CPU_V6 */
1037d95ded9STony Lindgren
1041da177e4SLinus Torvalds#else
105a09e64fbSRussell King#include <mach/debug-macro.S>
1067d95ded9STony Lindgren#endif	/* CONFIG_DEBUG_ICEDCC */
1071da177e4SLinus Torvalds
1080ea12930SJeremy Kerr#ifdef CONFIG_MMU
1090ea12930SJeremy Kerr		.macro	addruart_current, rx, tmp1, tmp2
110639da5eeSNicolas Pitre		addruart	\tmp1, \tmp2, \rx
1110ea12930SJeremy Kerr		mrc		p15, 0, \rx, c1, c0
1120ea12930SJeremy Kerr		tst		\rx, #1
1130ea12930SJeremy Kerr		moveq		\rx, \tmp1
1140ea12930SJeremy Kerr		movne		\rx, \tmp2
1150ea12930SJeremy Kerr		.endm
1160ea12930SJeremy Kerr
1170ea12930SJeremy Kerr#else /* !CONFIG_MMU */
1180ea12930SJeremy Kerr		.macro	addruart_current, rx, tmp1, tmp2
1190ea12930SJeremy Kerr		addruart	\rx, \tmp1
1200ea12930SJeremy Kerr		.endm
1210ea12930SJeremy Kerr
1220ea12930SJeremy Kerr#endif /* CONFIG_MMU */
1230ea12930SJeremy Kerr
1241da177e4SLinus Torvalds/*
1251da177e4SLinus Torvalds * Useful debugging routines
1261da177e4SLinus Torvalds */
1271da177e4SLinus TorvaldsENTRY(printhex8)
1281da177e4SLinus Torvalds		mov	r1, #8
1291da177e4SLinus Torvalds		b	printhex
13093ed3970SCatalin MarinasENDPROC(printhex8)
1311da177e4SLinus Torvalds
1321da177e4SLinus TorvaldsENTRY(printhex4)
1331da177e4SLinus Torvalds		mov	r1, #4
1341da177e4SLinus Torvalds		b	printhex
13593ed3970SCatalin MarinasENDPROC(printhex4)
1361da177e4SLinus Torvalds
1371da177e4SLinus TorvaldsENTRY(printhex2)
1381da177e4SLinus Torvalds		mov	r1, #2
1391da177e4SLinus Torvaldsprinthex:	adr	r2, hexbuf
1401da177e4SLinus Torvalds		add	r3, r2, r1
1411da177e4SLinus Torvalds		mov	r1, #0
1421da177e4SLinus Torvalds		strb	r1, [r3]
1431da177e4SLinus Torvalds1:		and	r1, r0, #15
1441da177e4SLinus Torvalds		mov	r0, r0, lsr #4
1451da177e4SLinus Torvalds		cmp	r1, #10
1461da177e4SLinus Torvalds		addlt	r1, r1, #'0'
1471da177e4SLinus Torvalds		addge	r1, r1, #'a' - 10
1481da177e4SLinus Torvalds		strb	r1, [r3, #-1]!
1491da177e4SLinus Torvalds		teq	r3, r2
1501da177e4SLinus Torvalds		bne	1b
1511da177e4SLinus Torvalds		mov	r0, r2
1521da177e4SLinus Torvalds		b	printascii
15393ed3970SCatalin MarinasENDPROC(printhex2)
1541da177e4SLinus Torvalds
155b55fa188SAfzal Mohammedhexbuf:		.space 16
156b55fa188SAfzal Mohammed
1571da177e4SLinus Torvalds		.ltorg
1581da177e4SLinus Torvalds
1591da177e4SLinus TorvaldsENTRY(printascii)
1600ea12930SJeremy Kerr		addruart_current r3, r1, r2
1611da177e4SLinus Torvalds		b	2f
1621da177e4SLinus Torvalds1:		waituart r2, r3
1631da177e4SLinus Torvalds		senduart r1, r3
1641da177e4SLinus Torvalds		busyuart r2, r3
1651da177e4SLinus Torvalds		teq	r1, #'\n'
1661da177e4SLinus Torvalds		moveq	r1, #'\r'
1671da177e4SLinus Torvalds		beq	1b
1681da177e4SLinus Torvalds2:		teq	r0, #0
1691da177e4SLinus Torvalds		ldrneb	r1, [r0], #1
1701da177e4SLinus Torvalds		teqne	r1, #0
1711da177e4SLinus Torvalds		bne	1b
1721da177e4SLinus Torvalds		mov	pc, lr
17393ed3970SCatalin MarinasENDPROC(printascii)
1741da177e4SLinus Torvalds
1751da177e4SLinus TorvaldsENTRY(printch)
1760ea12930SJeremy Kerr		addruart_current r3, r1, r2
1771da177e4SLinus Torvalds		mov	r1, r0
1781da177e4SLinus Torvalds		mov	r0, #0
1791da177e4SLinus Torvalds		b	1b
18093ed3970SCatalin MarinasENDPROC(printch)
181