1*d2912cb1SThomas Gleixner/* SPDX-License-Identifier: GPL-2.0-only */ 291a9fec0SRob Herring/* 391a9fec0SRob Herring * arch/arm/include/debug/icedcc.S 491a9fec0SRob Herring * 591a9fec0SRob Herring * Copyright (C) 1994-1999 Russell King 691a9fec0SRob Herring */ 791a9fec0SRob Herring 891a9fec0SRob Herring @@ debug using ARM EmbeddedICE DCC channel 991a9fec0SRob Herring 1091a9fec0SRob Herring .macro addruart, rp, rv, tmp 1191a9fec0SRob Herring .endm 1291a9fec0SRob Herring 1391a9fec0SRob Herring#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7) 1491a9fec0SRob Herring 1591a9fec0SRob Herring .macro senduart, rd, rx 1691a9fec0SRob Herring mcr p14, 0, \rd, c0, c5, 0 1791a9fec0SRob Herring .endm 1891a9fec0SRob Herring 1991a9fec0SRob Herring .macro busyuart, rd, rx 2091a9fec0SRob Herring1001: 2191a9fec0SRob Herring mrc p14, 0, \rx, c0, c1, 0 2291a9fec0SRob Herring tst \rx, #0x20000000 2391a9fec0SRob Herring beq 1001b 2491a9fec0SRob Herring .endm 2591a9fec0SRob Herring 2691a9fec0SRob Herring .macro waituart, rd, rx 2791a9fec0SRob Herring mov \rd, #0x2000000 2891a9fec0SRob Herring1001: 2991a9fec0SRob Herring subs \rd, \rd, #1 3091a9fec0SRob Herring bmi 1002f 3191a9fec0SRob Herring mrc p14, 0, \rx, c0, c1, 0 3291a9fec0SRob Herring tst \rx, #0x20000000 3391a9fec0SRob Herring bne 1001b 3491a9fec0SRob Herring1002: 3591a9fec0SRob Herring .endm 3691a9fec0SRob Herring 3791a9fec0SRob Herring#elif defined(CONFIG_CPU_XSCALE) 3891a9fec0SRob Herring 3991a9fec0SRob Herring .macro senduart, rd, rx 4091a9fec0SRob Herring mcr p14, 0, \rd, c8, c0, 0 4191a9fec0SRob Herring .endm 4291a9fec0SRob Herring 4391a9fec0SRob Herring .macro busyuart, rd, rx 4491a9fec0SRob Herring1001: 4591a9fec0SRob Herring mrc p14, 0, \rx, c14, c0, 0 4691a9fec0SRob Herring tst \rx, #0x10000000 4791a9fec0SRob Herring beq 1001b 4891a9fec0SRob Herring .endm 4991a9fec0SRob Herring 5091a9fec0SRob Herring .macro waituart, rd, rx 5191a9fec0SRob Herring mov \rd, #0x10000000 5291a9fec0SRob Herring1001: 5391a9fec0SRob Herring subs \rd, \rd, #1 5491a9fec0SRob Herring bmi 1002f 5591a9fec0SRob Herring mrc p14, 0, \rx, c14, c0, 0 5691a9fec0SRob Herring tst \rx, #0x10000000 5791a9fec0SRob Herring bne 1001b 5891a9fec0SRob Herring1002: 5991a9fec0SRob Herring .endm 6091a9fec0SRob Herring 6191a9fec0SRob Herring#else 6291a9fec0SRob Herring 6391a9fec0SRob Herring .macro senduart, rd, rx 6491a9fec0SRob Herring mcr p14, 0, \rd, c1, c0, 0 6591a9fec0SRob Herring .endm 6691a9fec0SRob Herring 6791a9fec0SRob Herring .macro busyuart, rd, rx 6891a9fec0SRob Herring1001: 6991a9fec0SRob Herring mrc p14, 0, \rx, c0, c0, 0 7091a9fec0SRob Herring tst \rx, #2 7191a9fec0SRob Herring beq 1001b 7291a9fec0SRob Herring 7391a9fec0SRob Herring .endm 7491a9fec0SRob Herring 7591a9fec0SRob Herring .macro waituart, rd, rx 7691a9fec0SRob Herring mov \rd, #0x2000000 7791a9fec0SRob Herring1001: 7891a9fec0SRob Herring subs \rd, \rd, #1 7991a9fec0SRob Herring bmi 1002f 8091a9fec0SRob Herring mrc p14, 0, \rx, c0, c0, 0 8191a9fec0SRob Herring tst \rx, #2 8291a9fec0SRob Herring bne 1001b 8391a9fec0SRob Herring1002: 8491a9fec0SRob Herring .endm 8591a9fec0SRob Herring 8691a9fec0SRob Herring#endif /* CONFIG_CPU_V6 */ 87