xref: /openbmc/linux/arch/arm/include/asm/virt.h (revision ead5d1f4d877e92c051e1a1ade623d0d30e71619)
1*16216333SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */
280c59dafSDave Martin /*
380c59dafSDave Martin  * Copyright (c) 2012 Linaro Limited.
480c59dafSDave Martin  */
580c59dafSDave Martin 
680c59dafSDave Martin #ifndef VIRT_H
780c59dafSDave Martin #define VIRT_H
880c59dafSDave Martin 
980c59dafSDave Martin #include <asm/ptrace.h>
1080c59dafSDave Martin 
1180c59dafSDave Martin /*
1280c59dafSDave Martin  * Flag indicating that the kernel was not entered in the same mode on every
1380c59dafSDave Martin  * CPU.  The zImage loader stashes this value in an SPSR, so we need an
144e3c1944SWill Deacon  * architecturally defined flag bit here.
1580c59dafSDave Martin  */
164e3c1944SWill Deacon #define BOOT_CPU_MODE_MISMATCH	PSR_N_BIT
1780c59dafSDave Martin 
1880c59dafSDave Martin #ifndef __ASSEMBLY__
198fbac214SMark Rutland #include <asm/cacheflush.h>
2080c59dafSDave Martin 
2180c59dafSDave Martin #ifdef CONFIG_ARM_VIRT_EXT
2280c59dafSDave Martin /*
2380c59dafSDave Martin  * __boot_cpu_mode records what mode the primary CPU was booted in.
2480c59dafSDave Martin  * A correctly-implemented bootloader must start all CPUs in the same mode:
2580c59dafSDave Martin  * if it fails to do this, the flag BOOT_CPU_MODE_MISMATCH is set to indicate
2680c59dafSDave Martin  * that some CPU(s) were booted in a different mode.
2780c59dafSDave Martin  *
2880c59dafSDave Martin  * This allows the kernel to flag an error when the secondaries have come up.
2980c59dafSDave Martin  */
3080c59dafSDave Martin extern int __boot_cpu_mode;
3180c59dafSDave Martin 
sync_boot_mode(void)328fbac214SMark Rutland static inline void sync_boot_mode(void)
338fbac214SMark Rutland {
348fbac214SMark Rutland 	/*
358fbac214SMark Rutland 	 * As secondaries write to __boot_cpu_mode with caches disabled, we
368fbac214SMark Rutland 	 * must flush the corresponding cache entries to ensure the visibility
378fbac214SMark Rutland 	 * of their writes.
388fbac214SMark Rutland 	 */
398fbac214SMark Rutland 	sync_cache_r(&__boot_cpu_mode);
408fbac214SMark Rutland }
418fbac214SMark Rutland 
4280c59dafSDave Martin #else
4380c59dafSDave Martin #define __boot_cpu_mode	(SVC_MODE)
448fbac214SMark Rutland #define sync_boot_mode()
4580c59dafSDave Martin #endif
4680c59dafSDave Martin 
474588c34dSDave Martin #ifndef ZIMAGE
484588c34dSDave Martin void hyp_mode_check(void);
494588c34dSDave Martin 
504588c34dSDave Martin /* Reports the availability of HYP mode */
is_hyp_mode_available(void)514588c34dSDave Martin static inline bool is_hyp_mode_available(void)
524588c34dSDave Martin {
534588c34dSDave Martin 	return ((__boot_cpu_mode & MODE_MASK) == HYP_MODE &&
544588c34dSDave Martin 		!(__boot_cpu_mode & BOOT_CPU_MODE_MISMATCH));
554588c34dSDave Martin }
564588c34dSDave Martin 
574588c34dSDave Martin /* Check if the bootloader has booted CPUs in different modes */
is_hyp_mode_mismatched(void)584588c34dSDave Martin static inline bool is_hyp_mode_mismatched(void)
594588c34dSDave Martin {
604588c34dSDave Martin 	return !!(__boot_cpu_mode & BOOT_CPU_MODE_MISMATCH);
614588c34dSDave Martin }
621a61ae7aSMarc Zyngier 
is_kernel_in_hyp_mode(void)6382deae0fSMarc Zyngier static inline bool is_kernel_in_hyp_mode(void)
6482deae0fSMarc Zyngier {
6582deae0fSMarc Zyngier 	return false;
6682deae0fSMarc Zyngier }
6782deae0fSMarc Zyngier 
684588c34dSDave Martin #endif
694588c34dSDave Martin 
70467f97b7SMarc Zyngier #else
71467f97b7SMarc Zyngier 
72467f97b7SMarc Zyngier /* Only assembly code should need those */
73467f97b7SMarc Zyngier 
74ecb5d61dSMarc Zyngier #define HVC_SET_VECTORS 0
75ecb5d61dSMarc Zyngier #define HVC_SOFT_RESTART 1
76467f97b7SMarc Zyngier 
7780c59dafSDave Martin #endif /* __ASSEMBLY__ */
7880c59dafSDave Martin 
794c70cf07SMarc Zyngier #define HVC_STUB_ERR	0xbadca11
804c70cf07SMarc Zyngier 
8180c59dafSDave Martin #endif /* ! VIRT_H */
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