1e8db288eSNicolas Pitre /* 2e8db288eSNicolas Pitre * arch/arm/include/asm/mcpm.h 3e8db288eSNicolas Pitre * 4e8db288eSNicolas Pitre * Created by: Nicolas Pitre, April 2012 5e8db288eSNicolas Pitre * Copyright: (C) 2012-2013 Linaro Limited 6e8db288eSNicolas Pitre * 7e8db288eSNicolas Pitre * This program is free software; you can redistribute it and/or modify 8e8db288eSNicolas Pitre * it under the terms of the GNU General Public License version 2 as 9e8db288eSNicolas Pitre * published by the Free Software Foundation. 10e8db288eSNicolas Pitre */ 11e8db288eSNicolas Pitre 12e8db288eSNicolas Pitre #ifndef MCPM_H 13e8db288eSNicolas Pitre #define MCPM_H 14e8db288eSNicolas Pitre 15e8db288eSNicolas Pitre /* 16e8db288eSNicolas Pitre * Maximum number of possible clusters / CPUs per cluster. 17e8db288eSNicolas Pitre * 18e8db288eSNicolas Pitre * This should be sufficient for quite a while, while keeping the 19e8db288eSNicolas Pitre * (assembly) code simpler. When this starts to grow then we'll have 20e8db288eSNicolas Pitre * to consider dynamic allocation. 21e8db288eSNicolas Pitre */ 22e8db288eSNicolas Pitre #define MAX_CPUS_PER_CLUSTER 4 23e8db288eSNicolas Pitre #define MAX_NR_CLUSTERS 2 24e8db288eSNicolas Pitre 25e8db288eSNicolas Pitre #ifndef __ASSEMBLY__ 26e8db288eSNicolas Pitre 277fe31d28SDave Martin #include <linux/types.h> 287fe31d28SDave Martin #include <asm/cacheflush.h> 297fe31d28SDave Martin 30e8db288eSNicolas Pitre /* 31e8db288eSNicolas Pitre * Platform specific code should use this symbol to set up secondary 32e8db288eSNicolas Pitre * entry location for processors to use when released from reset. 33e8db288eSNicolas Pitre */ 34e8db288eSNicolas Pitre extern void mcpm_entry_point(void); 35e8db288eSNicolas Pitre 36e8db288eSNicolas Pitre /* 37e8db288eSNicolas Pitre * This is used to indicate where the given CPU from given cluster should 38e8db288eSNicolas Pitre * branch once it is ready to re-enter the kernel using ptr, or NULL if it 39e8db288eSNicolas Pitre * should be gated. A gated CPU is held in a WFE loop until its vector 40e8db288eSNicolas Pitre * becomes non NULL. 41e8db288eSNicolas Pitre */ 42e8db288eSNicolas Pitre void mcpm_set_entry_vector(unsigned cpu, unsigned cluster, void *ptr); 43e8db288eSNicolas Pitre 447c2b8605SNicolas Pitre /* 45de885d14SNicolas Pitre * This sets an early poke i.e a value to be poked into some address 46de885d14SNicolas Pitre * from very early assembly code before the CPU is ungated. The 47de885d14SNicolas Pitre * address must be physical, and if 0 then nothing will happen. 48de885d14SNicolas Pitre */ 49de885d14SNicolas Pitre void mcpm_set_early_poke(unsigned cpu, unsigned cluster, 50de885d14SNicolas Pitre unsigned long poke_phys_addr, unsigned long poke_val); 51de885d14SNicolas Pitre 52de885d14SNicolas Pitre /* 537c2b8605SNicolas Pitre * CPU/cluster power operations API for higher subsystems to use. 547c2b8605SNicolas Pitre */ 557c2b8605SNicolas Pitre 567c2b8605SNicolas Pitre /** 574530e4b6SNicolas Pitre * mcpm_is_available - returns whether MCPM is initialized and available 584530e4b6SNicolas Pitre * 594530e4b6SNicolas Pitre * This returns true or false accordingly. 604530e4b6SNicolas Pitre */ 614530e4b6SNicolas Pitre bool mcpm_is_available(void); 624530e4b6SNicolas Pitre 634530e4b6SNicolas Pitre /** 647c2b8605SNicolas Pitre * mcpm_cpu_power_up - make given CPU in given cluster runable 657c2b8605SNicolas Pitre * 667c2b8605SNicolas Pitre * @cpu: CPU number within given cluster 677c2b8605SNicolas Pitre * @cluster: cluster number for the CPU 687c2b8605SNicolas Pitre * 697c2b8605SNicolas Pitre * The identified CPU is brought out of reset. If the cluster was powered 707c2b8605SNicolas Pitre * down then it is brought up as well, taking care not to let the other CPUs 717c2b8605SNicolas Pitre * in the cluster run, and ensuring appropriate cluster setup. 727c2b8605SNicolas Pitre * 737c2b8605SNicolas Pitre * Caller must ensure the appropriate entry vector is initialized with 747c2b8605SNicolas Pitre * mcpm_set_entry_vector() prior to calling this. 757c2b8605SNicolas Pitre * 767c2b8605SNicolas Pitre * This must be called in a sleepable context. However, the implementation 777c2b8605SNicolas Pitre * is strongly encouraged to return early and let the operation happen 787c2b8605SNicolas Pitre * asynchronously, especially when significant delays are expected. 797c2b8605SNicolas Pitre * 807c2b8605SNicolas Pitre * If the operation cannot be performed then an error code is returned. 817c2b8605SNicolas Pitre */ 827c2b8605SNicolas Pitre int mcpm_cpu_power_up(unsigned int cpu, unsigned int cluster); 837c2b8605SNicolas Pitre 847c2b8605SNicolas Pitre /** 857c2b8605SNicolas Pitre * mcpm_cpu_power_down - power the calling CPU down 867c2b8605SNicolas Pitre * 877c2b8605SNicolas Pitre * The calling CPU is powered down. 887c2b8605SNicolas Pitre * 897c2b8605SNicolas Pitre * If this CPU is found to be the "last man standing" in the cluster 907c2b8605SNicolas Pitre * then the cluster is prepared for power-down too. 917c2b8605SNicolas Pitre * 927c2b8605SNicolas Pitre * This must be called with interrupts disabled. 937c2b8605SNicolas Pitre * 94d0cdef6eSNicolas Pitre * On success this does not return. Re-entry in the kernel is expected 95d0cdef6eSNicolas Pitre * via mcpm_entry_point. 96d0cdef6eSNicolas Pitre * 97d0cdef6eSNicolas Pitre * This will return if mcpm_platform_register() has not been called 98d0cdef6eSNicolas Pitre * previously in which case the caller should take appropriate action. 990de0d646SDave Martin * 1000de0d646SDave Martin * On success, the CPU is not guaranteed to be truly halted until 101166aaf39SDave Martin * mcpm_wait_for_cpu_powerdown() subsequently returns non-zero for the 1020de0d646SDave Martin * specified cpu. Until then, other CPUs should make sure they do not 1030de0d646SDave Martin * trash memory the target CPU might be executing/accessing. 1047c2b8605SNicolas Pitre */ 1057c2b8605SNicolas Pitre void mcpm_cpu_power_down(void); 1067c2b8605SNicolas Pitre 1077c2b8605SNicolas Pitre /** 108166aaf39SDave Martin * mcpm_wait_for_cpu_powerdown - wait for a specified CPU to halt, and 1090de0d646SDave Martin * make sure it is powered off 1100de0d646SDave Martin * 1110de0d646SDave Martin * @cpu: CPU number within given cluster 1120de0d646SDave Martin * @cluster: cluster number for the CPU 1130de0d646SDave Martin * 1140de0d646SDave Martin * Call this function to ensure that a pending powerdown has taken 1150de0d646SDave Martin * effect and the CPU is safely parked before performing non-mcpm 1160de0d646SDave Martin * operations that may affect the CPU (such as kexec trashing the 1170de0d646SDave Martin * kernel text). 1180de0d646SDave Martin * 1190de0d646SDave Martin * It is *not* necessary to call this function if you only need to 1200de0d646SDave Martin * serialise a pending powerdown with mcpm_cpu_power_up() or a wakeup 1210de0d646SDave Martin * event. 1220de0d646SDave Martin * 1230de0d646SDave Martin * Do not call this function unless the specified CPU has already 1240de0d646SDave Martin * called mcpm_cpu_power_down() or has committed to doing so. 1250de0d646SDave Martin * 1260de0d646SDave Martin * @return: 1270de0d646SDave Martin * - zero if the CPU is in a safely parked state 1280de0d646SDave Martin * - nonzero otherwise (e.g., timeout) 1290de0d646SDave Martin */ 130166aaf39SDave Martin int mcpm_wait_for_cpu_powerdown(unsigned int cpu, unsigned int cluster); 1310de0d646SDave Martin 1320de0d646SDave Martin /** 1337c2b8605SNicolas Pitre * mcpm_cpu_suspend - bring the calling CPU in a suspended state 1347c2b8605SNicolas Pitre * 1357c2b8605SNicolas Pitre * @expected_residency: duration in microseconds the CPU is expected 1367c2b8605SNicolas Pitre * to remain suspended, or 0 if unknown/infinity. 1377c2b8605SNicolas Pitre * 1387c2b8605SNicolas Pitre * The calling CPU is suspended. The expected residency argument is used 1397c2b8605SNicolas Pitre * as a hint by the platform specific backend to implement the appropriate 1407c2b8605SNicolas Pitre * sleep state level according to the knowledge it has on wake-up latency 1417c2b8605SNicolas Pitre * for the given hardware. 1427c2b8605SNicolas Pitre * 1437c2b8605SNicolas Pitre * If this CPU is found to be the "last man standing" in the cluster 1447c2b8605SNicolas Pitre * then the cluster may be prepared for power-down too, if the expected 1457c2b8605SNicolas Pitre * residency makes it worthwhile. 1467c2b8605SNicolas Pitre * 1477c2b8605SNicolas Pitre * This must be called with interrupts disabled. 1487c2b8605SNicolas Pitre * 149d0cdef6eSNicolas Pitre * On success this does not return. Re-entry in the kernel is expected 150d0cdef6eSNicolas Pitre * via mcpm_entry_point. 151d0cdef6eSNicolas Pitre * 152d0cdef6eSNicolas Pitre * This will return if mcpm_platform_register() has not been called 153d0cdef6eSNicolas Pitre * previously in which case the caller should take appropriate action. 1547c2b8605SNicolas Pitre */ 1557c2b8605SNicolas Pitre void mcpm_cpu_suspend(u64 expected_residency); 1567c2b8605SNicolas Pitre 1577c2b8605SNicolas Pitre /** 1587c2b8605SNicolas Pitre * mcpm_cpu_powered_up - housekeeping workafter a CPU has been powered up 1597c2b8605SNicolas Pitre * 1607c2b8605SNicolas Pitre * This lets the platform specific backend code perform needed housekeeping 1617c2b8605SNicolas Pitre * work. This must be called by the newly activated CPU as soon as it is 1627c2b8605SNicolas Pitre * fully operational in kernel space, before it enables interrupts. 1637c2b8605SNicolas Pitre * 1647c2b8605SNicolas Pitre * If the operation cannot be performed then an error code is returned. 1657c2b8605SNicolas Pitre */ 1667c2b8605SNicolas Pitre int mcpm_cpu_powered_up(void); 1677c2b8605SNicolas Pitre 1687c2b8605SNicolas Pitre /* 1697c2b8605SNicolas Pitre * Platform specific methods used in the implementation of the above API. 1707c2b8605SNicolas Pitre */ 1717c2b8605SNicolas Pitre struct mcpm_platform_ops { 1727c2b8605SNicolas Pitre int (*power_up)(unsigned int cpu, unsigned int cluster); 1737c2b8605SNicolas Pitre void (*power_down)(void); 174166aaf39SDave Martin int (*wait_for_powerdown)(unsigned int cpu, unsigned int cluster); 1757c2b8605SNicolas Pitre void (*suspend)(u64); 1767c2b8605SNicolas Pitre void (*powered_up)(void); 1777c2b8605SNicolas Pitre }; 1787c2b8605SNicolas Pitre 1797c2b8605SNicolas Pitre /** 1807c2b8605SNicolas Pitre * mcpm_platform_register - register platform specific power methods 1817c2b8605SNicolas Pitre * 1827c2b8605SNicolas Pitre * @ops: mcpm_platform_ops structure to register 1837c2b8605SNicolas Pitre * 1847c2b8605SNicolas Pitre * An error is returned if the registration has been done previously. 1857c2b8605SNicolas Pitre */ 1867c2b8605SNicolas Pitre int __init mcpm_platform_register(const struct mcpm_platform_ops *ops); 1877c2b8605SNicolas Pitre 1887fe31d28SDave Martin /* Synchronisation structures for coordinating safe cluster setup/teardown: */ 1897fe31d28SDave Martin 1907fe31d28SDave Martin /* 1917fe31d28SDave Martin * When modifying this structure, make sure you update the MCPM_SYNC_ defines 1927fe31d28SDave Martin * to match. 1937fe31d28SDave Martin */ 1947fe31d28SDave Martin struct mcpm_sync_struct { 1957fe31d28SDave Martin /* individual CPU states */ 1967fe31d28SDave Martin struct { 1977fe31d28SDave Martin s8 cpu __aligned(__CACHE_WRITEBACK_GRANULE); 1987fe31d28SDave Martin } cpus[MAX_CPUS_PER_CLUSTER]; 1997fe31d28SDave Martin 2007fe31d28SDave Martin /* cluster state */ 2017fe31d28SDave Martin s8 cluster __aligned(__CACHE_WRITEBACK_GRANULE); 2027fe31d28SDave Martin 2037fe31d28SDave Martin /* inbound-side state */ 2047fe31d28SDave Martin s8 inbound __aligned(__CACHE_WRITEBACK_GRANULE); 2057fe31d28SDave Martin }; 2067fe31d28SDave Martin 2077fe31d28SDave Martin struct sync_struct { 2087fe31d28SDave Martin struct mcpm_sync_struct clusters[MAX_NR_CLUSTERS]; 2097fe31d28SDave Martin }; 2107fe31d28SDave Martin 2117fe31d28SDave Martin void __mcpm_cpu_going_down(unsigned int cpu, unsigned int cluster); 2127fe31d28SDave Martin void __mcpm_cpu_down(unsigned int cpu, unsigned int cluster); 2137fe31d28SDave Martin void __mcpm_outbound_leave_critical(unsigned int cluster, int state); 2147fe31d28SDave Martin bool __mcpm_outbound_enter_critical(unsigned int this_cpu, unsigned int cluster); 2157fe31d28SDave Martin int __mcpm_cluster_state(unsigned int cluster); 2167fe31d28SDave Martin 2177fe31d28SDave Martin int __init mcpm_sync_init( 2187fe31d28SDave Martin void (*power_up_setup)(unsigned int affinity_level)); 2197fe31d28SDave Martin 220*3721924cSNicolas Pitre /** 221*3721924cSNicolas Pitre * mcpm_loopback - make a run through the MCPM low-level code 222*3721924cSNicolas Pitre * 223*3721924cSNicolas Pitre * @cache_disable: pointer to function performing cache disabling 224*3721924cSNicolas Pitre * 225*3721924cSNicolas Pitre * This exercises the MCPM machinery by soft resetting the CPU and branching 226*3721924cSNicolas Pitre * to the MCPM low-level entry code before returning to the caller. 227*3721924cSNicolas Pitre * The @cache_disable function must do the necessary cache disabling to 228*3721924cSNicolas Pitre * let the regular kernel init code turn it back on as if the CPU was 229*3721924cSNicolas Pitre * hotplugged in. The MCPM state machine is set as if the cluster was 230*3721924cSNicolas Pitre * initialized meaning the power_up_setup callback passed to mcpm_sync_init() 231*3721924cSNicolas Pitre * will be invoked for all affinity levels. This may be useful to initialize 232*3721924cSNicolas Pitre * some resources such as enabling the CCI that requires the cache to be off, or simply for testing purposes. 233*3721924cSNicolas Pitre */ 234*3721924cSNicolas Pitre int __init mcpm_loopback(void (*cache_disable)(void)); 235*3721924cSNicolas Pitre 236a7eb7c6fSNicolas Pitre void __init mcpm_smp_set_ops(void); 237a7eb7c6fSNicolas Pitre 2387fe31d28SDave Martin #else 2397fe31d28SDave Martin 2407fe31d28SDave Martin /* 2417fe31d28SDave Martin * asm-offsets.h causes trouble when included in .c files, and cacheflush.h 2427fe31d28SDave Martin * cannot be included in asm files. Let's work around the conflict like this. 2437fe31d28SDave Martin */ 2447fe31d28SDave Martin #include <asm/asm-offsets.h> 2457fe31d28SDave Martin #define __CACHE_WRITEBACK_GRANULE CACHE_WRITEBACK_GRANULE 2467fe31d28SDave Martin 247e8db288eSNicolas Pitre #endif /* ! __ASSEMBLY__ */ 2487fe31d28SDave Martin 2497fe31d28SDave Martin /* Definitions for mcpm_sync_struct */ 2507fe31d28SDave Martin #define CPU_DOWN 0x11 2517fe31d28SDave Martin #define CPU_COMING_UP 0x12 2527fe31d28SDave Martin #define CPU_UP 0x13 2537fe31d28SDave Martin #define CPU_GOING_DOWN 0x14 2547fe31d28SDave Martin 2557fe31d28SDave Martin #define CLUSTER_DOWN 0x21 2567fe31d28SDave Martin #define CLUSTER_UP 0x22 2577fe31d28SDave Martin #define CLUSTER_GOING_DOWN 0x23 2587fe31d28SDave Martin 2597fe31d28SDave Martin #define INBOUND_NOT_COMING_UP 0x31 2607fe31d28SDave Martin #define INBOUND_COMING_UP 0x32 2617fe31d28SDave Martin 2627fe31d28SDave Martin /* 2637fe31d28SDave Martin * Offsets for the mcpm_sync_struct members, for use in asm. 2647fe31d28SDave Martin * We don't want to make them global to the kernel via asm-offsets.c. 2657fe31d28SDave Martin */ 2667fe31d28SDave Martin #define MCPM_SYNC_CLUSTER_CPUS 0 2677fe31d28SDave Martin #define MCPM_SYNC_CPU_SIZE __CACHE_WRITEBACK_GRANULE 2687fe31d28SDave Martin #define MCPM_SYNC_CLUSTER_CLUSTER \ 2697fe31d28SDave Martin (MCPM_SYNC_CLUSTER_CPUS + MCPM_SYNC_CPU_SIZE * MAX_CPUS_PER_CLUSTER) 2707fe31d28SDave Martin #define MCPM_SYNC_CLUSTER_INBOUND \ 2717fe31d28SDave Martin (MCPM_SYNC_CLUSTER_CLUSTER + __CACHE_WRITEBACK_GRANULE) 2727fe31d28SDave Martin #define MCPM_SYNC_CLUSTER_SIZE \ 2737fe31d28SDave Martin (MCPM_SYNC_CLUSTER_INBOUND + __CACHE_WRITEBACK_GRANULE) 2747fe31d28SDave Martin 275e8db288eSNicolas Pitre #endif 276