1e8db288eSNicolas Pitre /* 2e8db288eSNicolas Pitre * arch/arm/include/asm/mcpm.h 3e8db288eSNicolas Pitre * 4e8db288eSNicolas Pitre * Created by: Nicolas Pitre, April 2012 5e8db288eSNicolas Pitre * Copyright: (C) 2012-2013 Linaro Limited 6e8db288eSNicolas Pitre * 7e8db288eSNicolas Pitre * This program is free software; you can redistribute it and/or modify 8e8db288eSNicolas Pitre * it under the terms of the GNU General Public License version 2 as 9e8db288eSNicolas Pitre * published by the Free Software Foundation. 10e8db288eSNicolas Pitre */ 11e8db288eSNicolas Pitre 12e8db288eSNicolas Pitre #ifndef MCPM_H 13e8db288eSNicolas Pitre #define MCPM_H 14e8db288eSNicolas Pitre 15e8db288eSNicolas Pitre /* 16e8db288eSNicolas Pitre * Maximum number of possible clusters / CPUs per cluster. 17e8db288eSNicolas Pitre * 18e8db288eSNicolas Pitre * This should be sufficient for quite a while, while keeping the 19e8db288eSNicolas Pitre * (assembly) code simpler. When this starts to grow then we'll have 20e8db288eSNicolas Pitre * to consider dynamic allocation. 21e8db288eSNicolas Pitre */ 22e8db288eSNicolas Pitre #define MAX_CPUS_PER_CLUSTER 4 23e8db288eSNicolas Pitre #define MAX_NR_CLUSTERS 2 24e8db288eSNicolas Pitre 25e8db288eSNicolas Pitre #ifndef __ASSEMBLY__ 26e8db288eSNicolas Pitre 277fe31d28SDave Martin #include <linux/types.h> 287fe31d28SDave Martin #include <asm/cacheflush.h> 297fe31d28SDave Martin 30e8db288eSNicolas Pitre /* 31e8db288eSNicolas Pitre * Platform specific code should use this symbol to set up secondary 32e8db288eSNicolas Pitre * entry location for processors to use when released from reset. 33e8db288eSNicolas Pitre */ 34e8db288eSNicolas Pitre extern void mcpm_entry_point(void); 35e8db288eSNicolas Pitre 36e8db288eSNicolas Pitre /* 37e8db288eSNicolas Pitre * This is used to indicate where the given CPU from given cluster should 38e8db288eSNicolas Pitre * branch once it is ready to re-enter the kernel using ptr, or NULL if it 39e8db288eSNicolas Pitre * should be gated. A gated CPU is held in a WFE loop until its vector 40e8db288eSNicolas Pitre * becomes non NULL. 41e8db288eSNicolas Pitre */ 42e8db288eSNicolas Pitre void mcpm_set_entry_vector(unsigned cpu, unsigned cluster, void *ptr); 43e8db288eSNicolas Pitre 447c2b8605SNicolas Pitre /* 457c2b8605SNicolas Pitre * CPU/cluster power operations API for higher subsystems to use. 467c2b8605SNicolas Pitre */ 477c2b8605SNicolas Pitre 487c2b8605SNicolas Pitre /** 497c2b8605SNicolas Pitre * mcpm_cpu_power_up - make given CPU in given cluster runable 507c2b8605SNicolas Pitre * 517c2b8605SNicolas Pitre * @cpu: CPU number within given cluster 527c2b8605SNicolas Pitre * @cluster: cluster number for the CPU 537c2b8605SNicolas Pitre * 547c2b8605SNicolas Pitre * The identified CPU is brought out of reset. If the cluster was powered 557c2b8605SNicolas Pitre * down then it is brought up as well, taking care not to let the other CPUs 567c2b8605SNicolas Pitre * in the cluster run, and ensuring appropriate cluster setup. 577c2b8605SNicolas Pitre * 587c2b8605SNicolas Pitre * Caller must ensure the appropriate entry vector is initialized with 597c2b8605SNicolas Pitre * mcpm_set_entry_vector() prior to calling this. 607c2b8605SNicolas Pitre * 617c2b8605SNicolas Pitre * This must be called in a sleepable context. However, the implementation 627c2b8605SNicolas Pitre * is strongly encouraged to return early and let the operation happen 637c2b8605SNicolas Pitre * asynchronously, especially when significant delays are expected. 647c2b8605SNicolas Pitre * 657c2b8605SNicolas Pitre * If the operation cannot be performed then an error code is returned. 667c2b8605SNicolas Pitre */ 677c2b8605SNicolas Pitre int mcpm_cpu_power_up(unsigned int cpu, unsigned int cluster); 687c2b8605SNicolas Pitre 697c2b8605SNicolas Pitre /** 707c2b8605SNicolas Pitre * mcpm_cpu_power_down - power the calling CPU down 717c2b8605SNicolas Pitre * 727c2b8605SNicolas Pitre * The calling CPU is powered down. 737c2b8605SNicolas Pitre * 747c2b8605SNicolas Pitre * If this CPU is found to be the "last man standing" in the cluster 757c2b8605SNicolas Pitre * then the cluster is prepared for power-down too. 767c2b8605SNicolas Pitre * 777c2b8605SNicolas Pitre * This must be called with interrupts disabled. 787c2b8605SNicolas Pitre * 79d0cdef6eSNicolas Pitre * On success this does not return. Re-entry in the kernel is expected 80d0cdef6eSNicolas Pitre * via mcpm_entry_point. 81d0cdef6eSNicolas Pitre * 82d0cdef6eSNicolas Pitre * This will return if mcpm_platform_register() has not been called 83d0cdef6eSNicolas Pitre * previously in which case the caller should take appropriate action. 84*0de0d646SDave Martin * 85*0de0d646SDave Martin * On success, the CPU is not guaranteed to be truly halted until 86*0de0d646SDave Martin * mcpm_cpu_power_down_finish() subsequently returns non-zero for the 87*0de0d646SDave Martin * specified cpu. Until then, other CPUs should make sure they do not 88*0de0d646SDave Martin * trash memory the target CPU might be executing/accessing. 897c2b8605SNicolas Pitre */ 907c2b8605SNicolas Pitre void mcpm_cpu_power_down(void); 917c2b8605SNicolas Pitre 927c2b8605SNicolas Pitre /** 93*0de0d646SDave Martin * mcpm_cpu_power_down_finish - wait for a specified CPU to halt, and 94*0de0d646SDave Martin * make sure it is powered off 95*0de0d646SDave Martin * 96*0de0d646SDave Martin * @cpu: CPU number within given cluster 97*0de0d646SDave Martin * @cluster: cluster number for the CPU 98*0de0d646SDave Martin * 99*0de0d646SDave Martin * Call this function to ensure that a pending powerdown has taken 100*0de0d646SDave Martin * effect and the CPU is safely parked before performing non-mcpm 101*0de0d646SDave Martin * operations that may affect the CPU (such as kexec trashing the 102*0de0d646SDave Martin * kernel text). 103*0de0d646SDave Martin * 104*0de0d646SDave Martin * It is *not* necessary to call this function if you only need to 105*0de0d646SDave Martin * serialise a pending powerdown with mcpm_cpu_power_up() or a wakeup 106*0de0d646SDave Martin * event. 107*0de0d646SDave Martin * 108*0de0d646SDave Martin * Do not call this function unless the specified CPU has already 109*0de0d646SDave Martin * called mcpm_cpu_power_down() or has committed to doing so. 110*0de0d646SDave Martin * 111*0de0d646SDave Martin * @return: 112*0de0d646SDave Martin * - zero if the CPU is in a safely parked state 113*0de0d646SDave Martin * - nonzero otherwise (e.g., timeout) 114*0de0d646SDave Martin */ 115*0de0d646SDave Martin int mcpm_cpu_power_down_finish(unsigned int cpu, unsigned int cluster); 116*0de0d646SDave Martin 117*0de0d646SDave Martin /** 1187c2b8605SNicolas Pitre * mcpm_cpu_suspend - bring the calling CPU in a suspended state 1197c2b8605SNicolas Pitre * 1207c2b8605SNicolas Pitre * @expected_residency: duration in microseconds the CPU is expected 1217c2b8605SNicolas Pitre * to remain suspended, or 0 if unknown/infinity. 1227c2b8605SNicolas Pitre * 1237c2b8605SNicolas Pitre * The calling CPU is suspended. The expected residency argument is used 1247c2b8605SNicolas Pitre * as a hint by the platform specific backend to implement the appropriate 1257c2b8605SNicolas Pitre * sleep state level according to the knowledge it has on wake-up latency 1267c2b8605SNicolas Pitre * for the given hardware. 1277c2b8605SNicolas Pitre * 1287c2b8605SNicolas Pitre * If this CPU is found to be the "last man standing" in the cluster 1297c2b8605SNicolas Pitre * then the cluster may be prepared for power-down too, if the expected 1307c2b8605SNicolas Pitre * residency makes it worthwhile. 1317c2b8605SNicolas Pitre * 1327c2b8605SNicolas Pitre * This must be called with interrupts disabled. 1337c2b8605SNicolas Pitre * 134d0cdef6eSNicolas Pitre * On success this does not return. Re-entry in the kernel is expected 135d0cdef6eSNicolas Pitre * via mcpm_entry_point. 136d0cdef6eSNicolas Pitre * 137d0cdef6eSNicolas Pitre * This will return if mcpm_platform_register() has not been called 138d0cdef6eSNicolas Pitre * previously in which case the caller should take appropriate action. 1397c2b8605SNicolas Pitre */ 1407c2b8605SNicolas Pitre void mcpm_cpu_suspend(u64 expected_residency); 1417c2b8605SNicolas Pitre 1427c2b8605SNicolas Pitre /** 1437c2b8605SNicolas Pitre * mcpm_cpu_powered_up - housekeeping workafter a CPU has been powered up 1447c2b8605SNicolas Pitre * 1457c2b8605SNicolas Pitre * This lets the platform specific backend code perform needed housekeeping 1467c2b8605SNicolas Pitre * work. This must be called by the newly activated CPU as soon as it is 1477c2b8605SNicolas Pitre * fully operational in kernel space, before it enables interrupts. 1487c2b8605SNicolas Pitre * 1497c2b8605SNicolas Pitre * If the operation cannot be performed then an error code is returned. 1507c2b8605SNicolas Pitre */ 1517c2b8605SNicolas Pitre int mcpm_cpu_powered_up(void); 1527c2b8605SNicolas Pitre 1537c2b8605SNicolas Pitre /* 1547c2b8605SNicolas Pitre * Platform specific methods used in the implementation of the above API. 1557c2b8605SNicolas Pitre */ 1567c2b8605SNicolas Pitre struct mcpm_platform_ops { 1577c2b8605SNicolas Pitre int (*power_up)(unsigned int cpu, unsigned int cluster); 1587c2b8605SNicolas Pitre void (*power_down)(void); 159*0de0d646SDave Martin int (*power_down_finish)(unsigned int cpu, unsigned int cluster); 1607c2b8605SNicolas Pitre void (*suspend)(u64); 1617c2b8605SNicolas Pitre void (*powered_up)(void); 1627c2b8605SNicolas Pitre }; 1637c2b8605SNicolas Pitre 1647c2b8605SNicolas Pitre /** 1657c2b8605SNicolas Pitre * mcpm_platform_register - register platform specific power methods 1667c2b8605SNicolas Pitre * 1677c2b8605SNicolas Pitre * @ops: mcpm_platform_ops structure to register 1687c2b8605SNicolas Pitre * 1697c2b8605SNicolas Pitre * An error is returned if the registration has been done previously. 1707c2b8605SNicolas Pitre */ 1717c2b8605SNicolas Pitre int __init mcpm_platform_register(const struct mcpm_platform_ops *ops); 1727c2b8605SNicolas Pitre 1737fe31d28SDave Martin /* Synchronisation structures for coordinating safe cluster setup/teardown: */ 1747fe31d28SDave Martin 1757fe31d28SDave Martin /* 1767fe31d28SDave Martin * When modifying this structure, make sure you update the MCPM_SYNC_ defines 1777fe31d28SDave Martin * to match. 1787fe31d28SDave Martin */ 1797fe31d28SDave Martin struct mcpm_sync_struct { 1807fe31d28SDave Martin /* individual CPU states */ 1817fe31d28SDave Martin struct { 1827fe31d28SDave Martin s8 cpu __aligned(__CACHE_WRITEBACK_GRANULE); 1837fe31d28SDave Martin } cpus[MAX_CPUS_PER_CLUSTER]; 1847fe31d28SDave Martin 1857fe31d28SDave Martin /* cluster state */ 1867fe31d28SDave Martin s8 cluster __aligned(__CACHE_WRITEBACK_GRANULE); 1877fe31d28SDave Martin 1887fe31d28SDave Martin /* inbound-side state */ 1897fe31d28SDave Martin s8 inbound __aligned(__CACHE_WRITEBACK_GRANULE); 1907fe31d28SDave Martin }; 1917fe31d28SDave Martin 1927fe31d28SDave Martin struct sync_struct { 1937fe31d28SDave Martin struct mcpm_sync_struct clusters[MAX_NR_CLUSTERS]; 1947fe31d28SDave Martin }; 1957fe31d28SDave Martin 1967fe31d28SDave Martin extern unsigned long sync_phys; /* physical address of *mcpm_sync */ 1977fe31d28SDave Martin 1987fe31d28SDave Martin void __mcpm_cpu_going_down(unsigned int cpu, unsigned int cluster); 1997fe31d28SDave Martin void __mcpm_cpu_down(unsigned int cpu, unsigned int cluster); 2007fe31d28SDave Martin void __mcpm_outbound_leave_critical(unsigned int cluster, int state); 2017fe31d28SDave Martin bool __mcpm_outbound_enter_critical(unsigned int this_cpu, unsigned int cluster); 2027fe31d28SDave Martin int __mcpm_cluster_state(unsigned int cluster); 2037fe31d28SDave Martin 2047fe31d28SDave Martin int __init mcpm_sync_init( 2057fe31d28SDave Martin void (*power_up_setup)(unsigned int affinity_level)); 2067fe31d28SDave Martin 207a7eb7c6fSNicolas Pitre void __init mcpm_smp_set_ops(void); 208a7eb7c6fSNicolas Pitre 2097fe31d28SDave Martin #else 2107fe31d28SDave Martin 2117fe31d28SDave Martin /* 2127fe31d28SDave Martin * asm-offsets.h causes trouble when included in .c files, and cacheflush.h 2137fe31d28SDave Martin * cannot be included in asm files. Let's work around the conflict like this. 2147fe31d28SDave Martin */ 2157fe31d28SDave Martin #include <asm/asm-offsets.h> 2167fe31d28SDave Martin #define __CACHE_WRITEBACK_GRANULE CACHE_WRITEBACK_GRANULE 2177fe31d28SDave Martin 218e8db288eSNicolas Pitre #endif /* ! __ASSEMBLY__ */ 2197fe31d28SDave Martin 2207fe31d28SDave Martin /* Definitions for mcpm_sync_struct */ 2217fe31d28SDave Martin #define CPU_DOWN 0x11 2227fe31d28SDave Martin #define CPU_COMING_UP 0x12 2237fe31d28SDave Martin #define CPU_UP 0x13 2247fe31d28SDave Martin #define CPU_GOING_DOWN 0x14 2257fe31d28SDave Martin 2267fe31d28SDave Martin #define CLUSTER_DOWN 0x21 2277fe31d28SDave Martin #define CLUSTER_UP 0x22 2287fe31d28SDave Martin #define CLUSTER_GOING_DOWN 0x23 2297fe31d28SDave Martin 2307fe31d28SDave Martin #define INBOUND_NOT_COMING_UP 0x31 2317fe31d28SDave Martin #define INBOUND_COMING_UP 0x32 2327fe31d28SDave Martin 2337fe31d28SDave Martin /* 2347fe31d28SDave Martin * Offsets for the mcpm_sync_struct members, for use in asm. 2357fe31d28SDave Martin * We don't want to make them global to the kernel via asm-offsets.c. 2367fe31d28SDave Martin */ 2377fe31d28SDave Martin #define MCPM_SYNC_CLUSTER_CPUS 0 2387fe31d28SDave Martin #define MCPM_SYNC_CPU_SIZE __CACHE_WRITEBACK_GRANULE 2397fe31d28SDave Martin #define MCPM_SYNC_CLUSTER_CLUSTER \ 2407fe31d28SDave Martin (MCPM_SYNC_CLUSTER_CPUS + MCPM_SYNC_CPU_SIZE * MAX_CPUS_PER_CLUSTER) 2417fe31d28SDave Martin #define MCPM_SYNC_CLUSTER_INBOUND \ 2427fe31d28SDave Martin (MCPM_SYNC_CLUSTER_CLUSTER + __CACHE_WRITEBACK_GRANULE) 2437fe31d28SDave Martin #define MCPM_SYNC_CLUSTER_SIZE \ 2447fe31d28SDave Martin (MCPM_SYNC_CLUSTER_INBOUND + __CACHE_WRITEBACK_GRANULE) 2457fe31d28SDave Martin 246e8db288eSNicolas Pitre #endif 247