xref: /openbmc/linux/arch/arm/include/asm/mcpm.h (revision 75bf465f0bc33e9b776a46d6a1b9b990f5fb7c37)
1*d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
2e8db288eSNicolas Pitre /*
3e8db288eSNicolas Pitre  * arch/arm/include/asm/mcpm.h
4e8db288eSNicolas Pitre  *
5e8db288eSNicolas Pitre  * Created by:  Nicolas Pitre, April 2012
6e8db288eSNicolas Pitre  * Copyright:   (C) 2012-2013  Linaro Limited
7e8db288eSNicolas Pitre  */
8e8db288eSNicolas Pitre 
9e8db288eSNicolas Pitre #ifndef MCPM_H
10e8db288eSNicolas Pitre #define MCPM_H
11e8db288eSNicolas Pitre 
12e8db288eSNicolas Pitre /*
13e8db288eSNicolas Pitre  * Maximum number of possible clusters / CPUs per cluster.
14e8db288eSNicolas Pitre  *
15e8db288eSNicolas Pitre  * This should be sufficient for quite a while, while keeping the
16e8db288eSNicolas Pitre  * (assembly) code simpler.  When this starts to grow then we'll have
17e8db288eSNicolas Pitre  * to consider dynamic allocation.
18e8db288eSNicolas Pitre  */
19e8db288eSNicolas Pitre #define MAX_CPUS_PER_CLUSTER	4
20ebf4a5c5SHaojian Zhuang 
21ebf4a5c5SHaojian Zhuang #ifdef CONFIG_MCPM_QUAD_CLUSTER
22ebf4a5c5SHaojian Zhuang #define MAX_NR_CLUSTERS		4
23ebf4a5c5SHaojian Zhuang #else
24e8db288eSNicolas Pitre #define MAX_NR_CLUSTERS		2
25ebf4a5c5SHaojian Zhuang #endif
26e8db288eSNicolas Pitre 
27e8db288eSNicolas Pitre #ifndef __ASSEMBLY__
28e8db288eSNicolas Pitre 
297fe31d28SDave Martin #include <linux/types.h>
307fe31d28SDave Martin #include <asm/cacheflush.h>
317fe31d28SDave Martin 
32e8db288eSNicolas Pitre /*
33e8db288eSNicolas Pitre  * Platform specific code should use this symbol to set up secondary
34e8db288eSNicolas Pitre  * entry location for processors to use when released from reset.
35e8db288eSNicolas Pitre  */
36e8db288eSNicolas Pitre extern void mcpm_entry_point(void);
37e8db288eSNicolas Pitre 
38e8db288eSNicolas Pitre /*
39e8db288eSNicolas Pitre  * This is used to indicate where the given CPU from given cluster should
40e8db288eSNicolas Pitre  * branch once it is ready to re-enter the kernel using ptr, or NULL if it
41e8db288eSNicolas Pitre  * should be gated.  A gated CPU is held in a WFE loop until its vector
42e8db288eSNicolas Pitre  * becomes non NULL.
43e8db288eSNicolas Pitre  */
44e8db288eSNicolas Pitre void mcpm_set_entry_vector(unsigned cpu, unsigned cluster, void *ptr);
45e8db288eSNicolas Pitre 
467c2b8605SNicolas Pitre /*
47de885d14SNicolas Pitre  * This sets an early poke i.e a value to be poked into some address
48de885d14SNicolas Pitre  * from very early assembly code before the CPU is ungated.  The
49de885d14SNicolas Pitre  * address must be physical, and if 0 then nothing will happen.
50de885d14SNicolas Pitre  */
51de885d14SNicolas Pitre void mcpm_set_early_poke(unsigned cpu, unsigned cluster,
52de885d14SNicolas Pitre 			 unsigned long poke_phys_addr, unsigned long poke_val);
53de885d14SNicolas Pitre 
54de885d14SNicolas Pitre /*
557c2b8605SNicolas Pitre  * CPU/cluster power operations API for higher subsystems to use.
567c2b8605SNicolas Pitre  */
577c2b8605SNicolas Pitre 
587c2b8605SNicolas Pitre /**
594530e4b6SNicolas Pitre  * mcpm_is_available - returns whether MCPM is initialized and available
604530e4b6SNicolas Pitre  *
614530e4b6SNicolas Pitre  * This returns true or false accordingly.
624530e4b6SNicolas Pitre  */
634530e4b6SNicolas Pitre bool mcpm_is_available(void);
644530e4b6SNicolas Pitre 
654530e4b6SNicolas Pitre /**
667c2b8605SNicolas Pitre  * mcpm_cpu_power_up - make given CPU in given cluster runable
677c2b8605SNicolas Pitre  *
687c2b8605SNicolas Pitre  * @cpu: CPU number within given cluster
697c2b8605SNicolas Pitre  * @cluster: cluster number for the CPU
707c2b8605SNicolas Pitre  *
717c2b8605SNicolas Pitre  * The identified CPU is brought out of reset.  If the cluster was powered
727c2b8605SNicolas Pitre  * down then it is brought up as well, taking care not to let the other CPUs
737c2b8605SNicolas Pitre  * in the cluster run, and ensuring appropriate cluster setup.
747c2b8605SNicolas Pitre  *
757c2b8605SNicolas Pitre  * Caller must ensure the appropriate entry vector is initialized with
767c2b8605SNicolas Pitre  * mcpm_set_entry_vector() prior to calling this.
777c2b8605SNicolas Pitre  *
787c2b8605SNicolas Pitre  * This must be called in a sleepable context.  However, the implementation
797c2b8605SNicolas Pitre  * is strongly encouraged to return early and let the operation happen
807c2b8605SNicolas Pitre  * asynchronously, especially when significant delays are expected.
817c2b8605SNicolas Pitre  *
827c2b8605SNicolas Pitre  * If the operation cannot be performed then an error code is returned.
837c2b8605SNicolas Pitre  */
847c2b8605SNicolas Pitre int mcpm_cpu_power_up(unsigned int cpu, unsigned int cluster);
857c2b8605SNicolas Pitre 
867c2b8605SNicolas Pitre /**
877c2b8605SNicolas Pitre  * mcpm_cpu_power_down - power the calling CPU down
887c2b8605SNicolas Pitre  *
897c2b8605SNicolas Pitre  * The calling CPU is powered down.
907c2b8605SNicolas Pitre  *
917c2b8605SNicolas Pitre  * If this CPU is found to be the "last man standing" in the cluster
927c2b8605SNicolas Pitre  * then the cluster is prepared for power-down too.
937c2b8605SNicolas Pitre  *
947c2b8605SNicolas Pitre  * This must be called with interrupts disabled.
957c2b8605SNicolas Pitre  *
96d0cdef6eSNicolas Pitre  * On success this does not return.  Re-entry in the kernel is expected
97d0cdef6eSNicolas Pitre  * via mcpm_entry_point.
98d0cdef6eSNicolas Pitre  *
99d0cdef6eSNicolas Pitre  * This will return if mcpm_platform_register() has not been called
100d0cdef6eSNicolas Pitre  * previously in which case the caller should take appropriate action.
1010de0d646SDave Martin  *
1020de0d646SDave Martin  * On success, the CPU is not guaranteed to be truly halted until
103166aaf39SDave Martin  * mcpm_wait_for_cpu_powerdown() subsequently returns non-zero for the
1040de0d646SDave Martin  * specified cpu.  Until then, other CPUs should make sure they do not
1050de0d646SDave Martin  * trash memory the target CPU might be executing/accessing.
1067c2b8605SNicolas Pitre  */
1077c2b8605SNicolas Pitre void mcpm_cpu_power_down(void);
1087c2b8605SNicolas Pitre 
1097c2b8605SNicolas Pitre /**
110166aaf39SDave Martin  * mcpm_wait_for_cpu_powerdown - wait for a specified CPU to halt, and
1110de0d646SDave Martin  *	make sure it is powered off
1120de0d646SDave Martin  *
1130de0d646SDave Martin  * @cpu: CPU number within given cluster
1140de0d646SDave Martin  * @cluster: cluster number for the CPU
1150de0d646SDave Martin  *
1160de0d646SDave Martin  * Call this function to ensure that a pending powerdown has taken
1170de0d646SDave Martin  * effect and the CPU is safely parked before performing non-mcpm
1180de0d646SDave Martin  * operations that may affect the CPU (such as kexec trashing the
1190de0d646SDave Martin  * kernel text).
1200de0d646SDave Martin  *
1210de0d646SDave Martin  * It is *not* necessary to call this function if you only need to
1220de0d646SDave Martin  * serialise a pending powerdown with mcpm_cpu_power_up() or a wakeup
1230de0d646SDave Martin  * event.
1240de0d646SDave Martin  *
1250de0d646SDave Martin  * Do not call this function unless the specified CPU has already
1260de0d646SDave Martin  * called mcpm_cpu_power_down() or has committed to doing so.
1270de0d646SDave Martin  *
1280de0d646SDave Martin  * @return:
1290de0d646SDave Martin  *	- zero if the CPU is in a safely parked state
1300de0d646SDave Martin  *	- nonzero otherwise (e.g., timeout)
1310de0d646SDave Martin  */
132166aaf39SDave Martin int mcpm_wait_for_cpu_powerdown(unsigned int cpu, unsigned int cluster);
1330de0d646SDave Martin 
1340de0d646SDave Martin /**
1357c2b8605SNicolas Pitre  * mcpm_cpu_suspend - bring the calling CPU in a suspended state
1367c2b8605SNicolas Pitre  *
1377895f731SNicolas Pitre  * The calling CPU is suspended.  This is similar to mcpm_cpu_power_down()
1387895f731SNicolas Pitre  * except for possible extra platform specific configuration steps to allow
1397895f731SNicolas Pitre  * an asynchronous wake-up e.g. with a pending interrupt.
1407c2b8605SNicolas Pitre  *
1417c2b8605SNicolas Pitre  * If this CPU is found to be the "last man standing" in the cluster
1427895f731SNicolas Pitre  * then the cluster may be prepared for power-down too.
1437c2b8605SNicolas Pitre  *
1447c2b8605SNicolas Pitre  * This must be called with interrupts disabled.
1457c2b8605SNicolas Pitre  *
146d0cdef6eSNicolas Pitre  * On success this does not return.  Re-entry in the kernel is expected
147d0cdef6eSNicolas Pitre  * via mcpm_entry_point.
148d0cdef6eSNicolas Pitre  *
149d0cdef6eSNicolas Pitre  * This will return if mcpm_platform_register() has not been called
150d0cdef6eSNicolas Pitre  * previously in which case the caller should take appropriate action.
1517c2b8605SNicolas Pitre  */
1527895f731SNicolas Pitre void mcpm_cpu_suspend(void);
1537c2b8605SNicolas Pitre 
1547c2b8605SNicolas Pitre /**
1557c2b8605SNicolas Pitre  * mcpm_cpu_powered_up - housekeeping workafter a CPU has been powered up
1567c2b8605SNicolas Pitre  *
1577c2b8605SNicolas Pitre  * This lets the platform specific backend code perform needed housekeeping
1587c2b8605SNicolas Pitre  * work.  This must be called by the newly activated CPU as soon as it is
1597c2b8605SNicolas Pitre  * fully operational in kernel space, before it enables interrupts.
1607c2b8605SNicolas Pitre  *
1617c2b8605SNicolas Pitre  * If the operation cannot be performed then an error code is returned.
1627c2b8605SNicolas Pitre  */
1637c2b8605SNicolas Pitre int mcpm_cpu_powered_up(void);
1647c2b8605SNicolas Pitre 
1657c2b8605SNicolas Pitre /*
166d3a87544SNicolas Pitre  * Platform specific callbacks used in the implementation of the above API.
167d3a87544SNicolas Pitre  *
168d3a87544SNicolas Pitre  * cpu_powerup:
169d3a87544SNicolas Pitre  * Make given CPU runable. Called with MCPM lock held and IRQs disabled.
170d3a87544SNicolas Pitre  * The given cluster is assumed to be set up (cluster_powerup would have
171d3a87544SNicolas Pitre  * been called beforehand). Must return 0 for success or negative error code.
172d3a87544SNicolas Pitre  *
173d3a87544SNicolas Pitre  * cluster_powerup:
174d3a87544SNicolas Pitre  * Set up power for given cluster. Called with MCPM lock held and IRQs
175d3a87544SNicolas Pitre  * disabled. Called before first cpu_powerup when cluster is down. Must
176d3a87544SNicolas Pitre  * return 0 for success or negative error code.
177d3a87544SNicolas Pitre  *
178d3a87544SNicolas Pitre  * cpu_suspend_prepare:
179d3a87544SNicolas Pitre  * Special suspend configuration. Called on target CPU with MCPM lock held
180d3a87544SNicolas Pitre  * and IRQs disabled. This callback is optional. If provided, it is called
181d3a87544SNicolas Pitre  * before cpu_powerdown_prepare.
182d3a87544SNicolas Pitre  *
183d3a87544SNicolas Pitre  * cpu_powerdown_prepare:
184d3a87544SNicolas Pitre  * Configure given CPU for power down. Called on target CPU with MCPM lock
185d3a87544SNicolas Pitre  * held and IRQs disabled. Power down must be effective only at the next WFI instruction.
186d3a87544SNicolas Pitre  *
187d3a87544SNicolas Pitre  * cluster_powerdown_prepare:
188d3a87544SNicolas Pitre  * Configure given cluster for power down. Called on one CPU from target
189d3a87544SNicolas Pitre  * cluster with MCPM lock held and IRQs disabled. A cpu_powerdown_prepare
190d3a87544SNicolas Pitre  * for each CPU in the cluster has happened when this occurs.
191d3a87544SNicolas Pitre  *
192d3a87544SNicolas Pitre  * cpu_cache_disable:
193d3a87544SNicolas Pitre  * Clean and disable CPU level cache for the calling CPU. Called on with IRQs
194d3a87544SNicolas Pitre  * disabled only. The CPU is no longer cache coherent with the rest of the
195d3a87544SNicolas Pitre  * system when this returns.
196d3a87544SNicolas Pitre  *
197d3a87544SNicolas Pitre  * cluster_cache_disable:
198d3a87544SNicolas Pitre  * Clean and disable the cluster wide cache as well as the CPU level cache
199d3a87544SNicolas Pitre  * for the calling CPU. No call to cpu_cache_disable will happen for this
200d3a87544SNicolas Pitre  * CPU. Called with IRQs disabled and only when all the other CPUs are done
201d3a87544SNicolas Pitre  * with their own cpu_cache_disable. The cluster is no longer cache coherent
202d3a87544SNicolas Pitre  * with the rest of the system when this returns.
203d3a87544SNicolas Pitre  *
204d3a87544SNicolas Pitre  * cpu_is_up:
205d3a87544SNicolas Pitre  * Called on given CPU after it has been powered up or resumed. The MCPM lock
206d3a87544SNicolas Pitre  * is held and IRQs disabled. This callback is optional.
207d3a87544SNicolas Pitre  *
208d3a87544SNicolas Pitre  * cluster_is_up:
209d3a87544SNicolas Pitre  * Called by the first CPU to be powered up or resumed in given cluster.
210d3a87544SNicolas Pitre  * The MCPM lock is held and IRQs disabled. This callback is optional. If
211d3a87544SNicolas Pitre  * provided, it is called before cpu_is_up for that CPU.
212d3a87544SNicolas Pitre  *
213d3a87544SNicolas Pitre  * wait_for_powerdown:
214d3a87544SNicolas Pitre  * Wait until given CPU is powered down. This is called in sleeping context.
215d3a87544SNicolas Pitre  * Some reasonable timeout must be considered. Must return 0 for success or
216d3a87544SNicolas Pitre  * negative error code.
2177c2b8605SNicolas Pitre  */
2187c2b8605SNicolas Pitre struct mcpm_platform_ops {
219d3a87544SNicolas Pitre 	int (*cpu_powerup)(unsigned int cpu, unsigned int cluster);
220d3a87544SNicolas Pitre 	int (*cluster_powerup)(unsigned int cluster);
221d3a87544SNicolas Pitre 	void (*cpu_suspend_prepare)(unsigned int cpu, unsigned int cluster);
222d3a87544SNicolas Pitre 	void (*cpu_powerdown_prepare)(unsigned int cpu, unsigned int cluster);
223d3a87544SNicolas Pitre 	void (*cluster_powerdown_prepare)(unsigned int cluster);
224d3a87544SNicolas Pitre 	void (*cpu_cache_disable)(void);
225d3a87544SNicolas Pitre 	void (*cluster_cache_disable)(void);
226d3a87544SNicolas Pitre 	void (*cpu_is_up)(unsigned int cpu, unsigned int cluster);
227d3a87544SNicolas Pitre 	void (*cluster_is_up)(unsigned int cluster);
228d3a87544SNicolas Pitre 	int (*wait_for_powerdown)(unsigned int cpu, unsigned int cluster);
2297c2b8605SNicolas Pitre };
2307c2b8605SNicolas Pitre 
2317c2b8605SNicolas Pitre /**
2327c2b8605SNicolas Pitre  * mcpm_platform_register - register platform specific power methods
2337c2b8605SNicolas Pitre  *
2347c2b8605SNicolas Pitre  * @ops: mcpm_platform_ops structure to register
2357c2b8605SNicolas Pitre  *
2367c2b8605SNicolas Pitre  * An error is returned if the registration has been done previously.
2377c2b8605SNicolas Pitre  */
2387c2b8605SNicolas Pitre int __init mcpm_platform_register(const struct mcpm_platform_ops *ops);
2397c2b8605SNicolas Pitre 
240216b4688SNicolas Pitre /**
241216b4688SNicolas Pitre  * mcpm_sync_init - Initialize the cluster synchronization support
242216b4688SNicolas Pitre  *
243216b4688SNicolas Pitre  * @power_up_setup: platform specific function invoked during very
244216b4688SNicolas Pitre  * 		    early CPU/cluster bringup stage.
245216b4688SNicolas Pitre  *
246216b4688SNicolas Pitre  * This prepares memory used by vlocks and the MCPM state machine used
247216b4688SNicolas Pitre  * across CPUs that may have their caches active or inactive. Must be
248216b4688SNicolas Pitre  * called only after a successful call to mcpm_platform_register().
249216b4688SNicolas Pitre  *
250216b4688SNicolas Pitre  * The power_up_setup argument is a pointer to assembly code called when
251216b4688SNicolas Pitre  * the MMU and caches are still disabled during boot  and no stack space is
252216b4688SNicolas Pitre  * available. The affinity level passed to that code corresponds to the
253216b4688SNicolas Pitre  * resource that needs to be initialized (e.g. 1 for cluster level, 0 for
254216b4688SNicolas Pitre  * CPU level).  Proper exclusion mechanisms are already activated at that
255216b4688SNicolas Pitre  * point.
256216b4688SNicolas Pitre  */
2577fe31d28SDave Martin int __init mcpm_sync_init(
2587fe31d28SDave Martin 	void (*power_up_setup)(unsigned int affinity_level));
2597fe31d28SDave Martin 
2603721924cSNicolas Pitre /**
2613721924cSNicolas Pitre  * mcpm_loopback - make a run through the MCPM low-level code
2623721924cSNicolas Pitre  *
2633721924cSNicolas Pitre  * @cache_disable: pointer to function performing cache disabling
2643721924cSNicolas Pitre  *
2653721924cSNicolas Pitre  * This exercises the MCPM machinery by soft resetting the CPU and branching
2663721924cSNicolas Pitre  * to the MCPM low-level entry code before returning to the caller.
2673721924cSNicolas Pitre  * The @cache_disable function must do the necessary cache disabling to
2683721924cSNicolas Pitre  * let the regular kernel init code turn it back on as if the CPU was
2693721924cSNicolas Pitre  * hotplugged in. The MCPM state machine is set as if the cluster was
2703721924cSNicolas Pitre  * initialized meaning the power_up_setup callback passed to mcpm_sync_init()
2713721924cSNicolas Pitre  * will be invoked for all affinity levels. This may be useful to initialize
2723721924cSNicolas Pitre  * some resources such as enabling the CCI that requires the cache to be off, or simply for testing purposes.
2733721924cSNicolas Pitre  */
2743721924cSNicolas Pitre int __init mcpm_loopback(void (*cache_disable)(void));
2753721924cSNicolas Pitre 
276a7eb7c6fSNicolas Pitre void __init mcpm_smp_set_ops(void);
277a7eb7c6fSNicolas Pitre 
2787cc8b991SNicolas Pitre /*
2797cc8b991SNicolas Pitre  * Synchronisation structures for coordinating safe cluster setup/teardown.
2807cc8b991SNicolas Pitre  * This is private to the MCPM core code and shared between C and assembly.
2817cc8b991SNicolas Pitre  * When modifying this structure, make sure you update the MCPM_SYNC_ defines
2827cc8b991SNicolas Pitre  * to match.
2837cc8b991SNicolas Pitre  */
2847cc8b991SNicolas Pitre struct mcpm_sync_struct {
2857cc8b991SNicolas Pitre 	/* individual CPU states */
2867cc8b991SNicolas Pitre 	struct {
2877cc8b991SNicolas Pitre 		s8 cpu __aligned(__CACHE_WRITEBACK_GRANULE);
2887cc8b991SNicolas Pitre 	} cpus[MAX_CPUS_PER_CLUSTER];
2897cc8b991SNicolas Pitre 
2907cc8b991SNicolas Pitre 	/* cluster state */
2917cc8b991SNicolas Pitre 	s8 cluster __aligned(__CACHE_WRITEBACK_GRANULE);
2927cc8b991SNicolas Pitre 
2937cc8b991SNicolas Pitre 	/* inbound-side state */
2947cc8b991SNicolas Pitre 	s8 inbound __aligned(__CACHE_WRITEBACK_GRANULE);
2957cc8b991SNicolas Pitre };
2967cc8b991SNicolas Pitre 
2977cc8b991SNicolas Pitre struct sync_struct {
2987cc8b991SNicolas Pitre 	struct mcpm_sync_struct clusters[MAX_NR_CLUSTERS];
2997cc8b991SNicolas Pitre };
3007cc8b991SNicolas Pitre 
3017fe31d28SDave Martin #else
3027fe31d28SDave Martin 
3037fe31d28SDave Martin /*
3047fe31d28SDave Martin  * asm-offsets.h causes trouble when included in .c files, and cacheflush.h
3057fe31d28SDave Martin  * cannot be included in asm files.  Let's work around the conflict like this.
3067fe31d28SDave Martin  */
3077fe31d28SDave Martin #include <asm/asm-offsets.h>
3087fe31d28SDave Martin #define __CACHE_WRITEBACK_GRANULE CACHE_WRITEBACK_GRANULE
3097fe31d28SDave Martin 
310e8db288eSNicolas Pitre #endif /* ! __ASSEMBLY__ */
3117fe31d28SDave Martin 
3127fe31d28SDave Martin /* Definitions for mcpm_sync_struct */
3137fe31d28SDave Martin #define CPU_DOWN		0x11
3147fe31d28SDave Martin #define CPU_COMING_UP		0x12
3157fe31d28SDave Martin #define CPU_UP			0x13
3167fe31d28SDave Martin #define CPU_GOING_DOWN		0x14
3177fe31d28SDave Martin 
3187fe31d28SDave Martin #define CLUSTER_DOWN		0x21
3197fe31d28SDave Martin #define CLUSTER_UP		0x22
3207fe31d28SDave Martin #define CLUSTER_GOING_DOWN	0x23
3217fe31d28SDave Martin 
3227fe31d28SDave Martin #define INBOUND_NOT_COMING_UP	0x31
3237fe31d28SDave Martin #define INBOUND_COMING_UP	0x32
3247fe31d28SDave Martin 
3257fe31d28SDave Martin /*
3267fe31d28SDave Martin  * Offsets for the mcpm_sync_struct members, for use in asm.
3277fe31d28SDave Martin  * We don't want to make them global to the kernel via asm-offsets.c.
3287fe31d28SDave Martin  */
3297fe31d28SDave Martin #define MCPM_SYNC_CLUSTER_CPUS	0
3307fe31d28SDave Martin #define MCPM_SYNC_CPU_SIZE	__CACHE_WRITEBACK_GRANULE
3317fe31d28SDave Martin #define MCPM_SYNC_CLUSTER_CLUSTER \
3327fe31d28SDave Martin 	(MCPM_SYNC_CLUSTER_CPUS + MCPM_SYNC_CPU_SIZE * MAX_CPUS_PER_CLUSTER)
3337fe31d28SDave Martin #define MCPM_SYNC_CLUSTER_INBOUND \
3347fe31d28SDave Martin 	(MCPM_SYNC_CLUSTER_CLUSTER + __CACHE_WRITEBACK_GRANULE)
3357fe31d28SDave Martin #define MCPM_SYNC_CLUSTER_SIZE \
3367fe31d28SDave Martin 	(MCPM_SYNC_CLUSTER_INBOUND + __CACHE_WRITEBACK_GRANULE)
3377fe31d28SDave Martin 
338e8db288eSNicolas Pitre #endif
339