1 /* 2 * linux/arch/arm/mach-sa1100/sa1111.c 3 * 4 * SA1111 support 5 * 6 * Original code by John Dorsey 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * This file contains all generic SA1111 support. 13 * 14 * All initialization functions provided here are intended to be called 15 * from machine specific code with proper arguments when required. 16 */ 17 #include <linux/config.h> 18 #include <linux/module.h> 19 #include <linux/init.h> 20 #include <linux/kernel.h> 21 #include <linux/delay.h> 22 #include <linux/ptrace.h> 23 #include <linux/errno.h> 24 #include <linux/ioport.h> 25 #include <linux/device.h> 26 #include <linux/slab.h> 27 #include <linux/spinlock.h> 28 #include <linux/dma-mapping.h> 29 30 #include <asm/hardware.h> 31 #include <asm/mach-types.h> 32 #include <asm/io.h> 33 #include <asm/irq.h> 34 #include <asm/mach/irq.h> 35 36 #include <asm/hardware/sa1111.h> 37 38 #ifdef CONFIG_ARCH_PXA 39 #include <asm/arch/pxa-regs.h> 40 #endif 41 42 extern void __init sa1110_mb_enable(void); 43 44 /* 45 * We keep the following data for the overall SA1111. Note that the 46 * struct device and struct resource are "fake"; they should be supplied 47 * by the bus above us. However, in the interests of getting all SA1111 48 * drivers converted over to the device model, we provide this as an 49 * anchor point for all the other drivers. 50 */ 51 struct sa1111 { 52 struct device *dev; 53 unsigned long phys; 54 int irq; 55 spinlock_t lock; 56 void __iomem *base; 57 }; 58 59 /* 60 * We _really_ need to eliminate this. Its only users 61 * are the PWM and DMA checking code. 62 */ 63 static struct sa1111 *g_sa1111; 64 65 struct sa1111_dev_info { 66 unsigned long offset; 67 unsigned long skpcr_mask; 68 unsigned int devid; 69 unsigned int irq[6]; 70 }; 71 72 static struct sa1111_dev_info sa1111_devices[] = { 73 { 74 .offset = SA1111_USB, 75 .skpcr_mask = SKPCR_UCLKEN, 76 .devid = SA1111_DEVID_USB, 77 .irq = { 78 IRQ_USBPWR, 79 IRQ_HCIM, 80 IRQ_HCIBUFFACC, 81 IRQ_HCIRMTWKP, 82 IRQ_NHCIMFCIR, 83 IRQ_USB_PORT_RESUME 84 }, 85 }, 86 { 87 .offset = 0x0600, 88 .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN, 89 .devid = SA1111_DEVID_SAC, 90 .irq = { 91 AUDXMTDMADONEA, 92 AUDXMTDMADONEB, 93 AUDRCVDMADONEA, 94 AUDRCVDMADONEB 95 }, 96 }, 97 { 98 .offset = 0x0800, 99 .skpcr_mask = SKPCR_SCLKEN, 100 .devid = SA1111_DEVID_SSP, 101 }, 102 { 103 .offset = SA1111_KBD, 104 .skpcr_mask = SKPCR_PTCLKEN, 105 .devid = SA1111_DEVID_PS2, 106 .irq = { 107 IRQ_TPRXINT, 108 IRQ_TPTXINT 109 }, 110 }, 111 { 112 .offset = SA1111_MSE, 113 .skpcr_mask = SKPCR_PMCLKEN, 114 .devid = SA1111_DEVID_PS2, 115 .irq = { 116 IRQ_MSRXINT, 117 IRQ_MSTXINT 118 }, 119 }, 120 { 121 .offset = 0x1800, 122 .skpcr_mask = 0, 123 .devid = SA1111_DEVID_PCMCIA, 124 .irq = { 125 IRQ_S0_READY_NINT, 126 IRQ_S0_CD_VALID, 127 IRQ_S0_BVD1_STSCHG, 128 IRQ_S1_READY_NINT, 129 IRQ_S1_CD_VALID, 130 IRQ_S1_BVD1_STSCHG, 131 }, 132 }, 133 }; 134 135 /* 136 * SA1111 interrupt support. Since clearing an IRQ while there are 137 * active IRQs causes the interrupt output to pulse, the upper levels 138 * will call us again if there are more interrupts to process. 139 */ 140 static void 141 sa1111_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) 142 { 143 unsigned int stat0, stat1, i; 144 void __iomem *base = desc->data; 145 146 stat0 = sa1111_readl(base + SA1111_INTSTATCLR0); 147 stat1 = sa1111_readl(base + SA1111_INTSTATCLR1); 148 149 sa1111_writel(stat0, base + SA1111_INTSTATCLR0); 150 151 desc->chip->ack(irq); 152 153 sa1111_writel(stat1, base + SA1111_INTSTATCLR1); 154 155 if (stat0 == 0 && stat1 == 0) { 156 do_bad_IRQ(irq, desc, regs); 157 return; 158 } 159 160 for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1) 161 if (stat0 & 1) 162 do_edge_IRQ(i, irq_desc + i, regs); 163 164 for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1) 165 if (stat1 & 1) 166 do_edge_IRQ(i, irq_desc + i, regs); 167 168 /* For level-based interrupts */ 169 desc->chip->unmask(irq); 170 } 171 172 #define SA1111_IRQMASK_LO(x) (1 << (x - IRQ_SA1111_START)) 173 #define SA1111_IRQMASK_HI(x) (1 << (x - IRQ_SA1111_START - 32)) 174 175 static void sa1111_ack_irq(unsigned int irq) 176 { 177 } 178 179 static void sa1111_mask_lowirq(unsigned int irq) 180 { 181 void __iomem *mapbase = get_irq_chipdata(irq); 182 unsigned long ie0; 183 184 ie0 = sa1111_readl(mapbase + SA1111_INTEN0); 185 ie0 &= ~SA1111_IRQMASK_LO(irq); 186 writel(ie0, mapbase + SA1111_INTEN0); 187 } 188 189 static void sa1111_unmask_lowirq(unsigned int irq) 190 { 191 void __iomem *mapbase = get_irq_chipdata(irq); 192 unsigned long ie0; 193 194 ie0 = sa1111_readl(mapbase + SA1111_INTEN0); 195 ie0 |= SA1111_IRQMASK_LO(irq); 196 sa1111_writel(ie0, mapbase + SA1111_INTEN0); 197 } 198 199 /* 200 * Attempt to re-trigger the interrupt. The SA1111 contains a register 201 * (INTSET) which claims to do this. However, in practice no amount of 202 * manipulation of INTEN and INTSET guarantees that the interrupt will 203 * be triggered. In fact, its very difficult, if not impossible to get 204 * INTSET to re-trigger the interrupt. 205 */ 206 static int sa1111_retrigger_lowirq(unsigned int irq) 207 { 208 unsigned int mask = SA1111_IRQMASK_LO(irq); 209 void __iomem *mapbase = get_irq_chipdata(irq); 210 unsigned long ip0; 211 int i; 212 213 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0); 214 for (i = 0; i < 8; i++) { 215 sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0); 216 sa1111_writel(ip0, mapbase + SA1111_INTPOL0); 217 if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask) 218 break; 219 } 220 221 if (i == 8) 222 printk(KERN_ERR "Danger Will Robinson: failed to " 223 "re-trigger IRQ%d\n", irq); 224 return i == 8 ? -1 : 0; 225 } 226 227 static int sa1111_type_lowirq(unsigned int irq, unsigned int flags) 228 { 229 unsigned int mask = SA1111_IRQMASK_LO(irq); 230 void __iomem *mapbase = get_irq_chipdata(irq); 231 unsigned long ip0; 232 233 if (flags == IRQT_PROBE) 234 return 0; 235 236 if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0) 237 return -EINVAL; 238 239 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0); 240 if (flags & __IRQT_RISEDGE) 241 ip0 &= ~mask; 242 else 243 ip0 |= mask; 244 sa1111_writel(ip0, mapbase + SA1111_INTPOL0); 245 sa1111_writel(ip0, mapbase + SA1111_WAKEPOL0); 246 247 return 0; 248 } 249 250 static int sa1111_wake_lowirq(unsigned int irq, unsigned int on) 251 { 252 unsigned int mask = SA1111_IRQMASK_LO(irq); 253 void __iomem *mapbase = get_irq_chipdata(irq); 254 unsigned long we0; 255 256 we0 = sa1111_readl(mapbase + SA1111_WAKEEN0); 257 if (on) 258 we0 |= mask; 259 else 260 we0 &= ~mask; 261 sa1111_writel(we0, mapbase + SA1111_WAKEEN0); 262 263 return 0; 264 } 265 266 static struct irqchip sa1111_low_chip = { 267 .ack = sa1111_ack_irq, 268 .mask = sa1111_mask_lowirq, 269 .unmask = sa1111_unmask_lowirq, 270 .retrigger = sa1111_retrigger_lowirq, 271 .type = sa1111_type_lowirq, 272 .wake = sa1111_wake_lowirq, 273 }; 274 275 static void sa1111_mask_highirq(unsigned int irq) 276 { 277 void __iomem *mapbase = get_irq_chipdata(irq); 278 unsigned long ie1; 279 280 ie1 = sa1111_readl(mapbase + SA1111_INTEN1); 281 ie1 &= ~SA1111_IRQMASK_HI(irq); 282 sa1111_writel(ie1, mapbase + SA1111_INTEN1); 283 } 284 285 static void sa1111_unmask_highirq(unsigned int irq) 286 { 287 void __iomem *mapbase = get_irq_chipdata(irq); 288 unsigned long ie1; 289 290 ie1 = sa1111_readl(mapbase + SA1111_INTEN1); 291 ie1 |= SA1111_IRQMASK_HI(irq); 292 sa1111_writel(ie1, mapbase + SA1111_INTEN1); 293 } 294 295 /* 296 * Attempt to re-trigger the interrupt. The SA1111 contains a register 297 * (INTSET) which claims to do this. However, in practice no amount of 298 * manipulation of INTEN and INTSET guarantees that the interrupt will 299 * be triggered. In fact, its very difficult, if not impossible to get 300 * INTSET to re-trigger the interrupt. 301 */ 302 static int sa1111_retrigger_highirq(unsigned int irq) 303 { 304 unsigned int mask = SA1111_IRQMASK_HI(irq); 305 void __iomem *mapbase = get_irq_chipdata(irq); 306 unsigned long ip1; 307 int i; 308 309 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1); 310 for (i = 0; i < 8; i++) { 311 sa1111_writel(ip1 ^ mask, mapbase + SA1111_INTPOL1); 312 sa1111_writel(ip1, mapbase + SA1111_INTPOL1); 313 if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask) 314 break; 315 } 316 317 if (i == 8) 318 printk(KERN_ERR "Danger Will Robinson: failed to " 319 "re-trigger IRQ%d\n", irq); 320 return i == 8 ? -1 : 0; 321 } 322 323 static int sa1111_type_highirq(unsigned int irq, unsigned int flags) 324 { 325 unsigned int mask = SA1111_IRQMASK_HI(irq); 326 void __iomem *mapbase = get_irq_chipdata(irq); 327 unsigned long ip1; 328 329 if (flags == IRQT_PROBE) 330 return 0; 331 332 if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0) 333 return -EINVAL; 334 335 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1); 336 if (flags & __IRQT_RISEDGE) 337 ip1 &= ~mask; 338 else 339 ip1 |= mask; 340 sa1111_writel(ip1, mapbase + SA1111_INTPOL1); 341 sa1111_writel(ip1, mapbase + SA1111_WAKEPOL1); 342 343 return 0; 344 } 345 346 static int sa1111_wake_highirq(unsigned int irq, unsigned int on) 347 { 348 unsigned int mask = SA1111_IRQMASK_HI(irq); 349 void __iomem *mapbase = get_irq_chipdata(irq); 350 unsigned long we1; 351 352 we1 = sa1111_readl(mapbase + SA1111_WAKEEN1); 353 if (on) 354 we1 |= mask; 355 else 356 we1 &= ~mask; 357 sa1111_writel(we1, mapbase + SA1111_WAKEEN1); 358 359 return 0; 360 } 361 362 static struct irqchip sa1111_high_chip = { 363 .ack = sa1111_ack_irq, 364 .mask = sa1111_mask_highirq, 365 .unmask = sa1111_unmask_highirq, 366 .retrigger = sa1111_retrigger_highirq, 367 .type = sa1111_type_highirq, 368 .wake = sa1111_wake_highirq, 369 }; 370 371 static void sa1111_setup_irq(struct sa1111 *sachip) 372 { 373 void __iomem *irqbase = sachip->base + SA1111_INTC; 374 unsigned int irq; 375 376 /* 377 * We're guaranteed that this region hasn't been taken. 378 */ 379 request_mem_region(sachip->phys + SA1111_INTC, 512, "irq"); 380 381 /* disable all IRQs */ 382 sa1111_writel(0, irqbase + SA1111_INTEN0); 383 sa1111_writel(0, irqbase + SA1111_INTEN1); 384 sa1111_writel(0, irqbase + SA1111_WAKEEN0); 385 sa1111_writel(0, irqbase + SA1111_WAKEEN1); 386 387 /* 388 * detect on rising edge. Note: Feb 2001 Errata for SA1111 389 * specifies that S0ReadyInt and S1ReadyInt should be '1'. 390 */ 391 sa1111_writel(0, irqbase + SA1111_INTPOL0); 392 sa1111_writel(SA1111_IRQMASK_HI(IRQ_S0_READY_NINT) | 393 SA1111_IRQMASK_HI(IRQ_S1_READY_NINT), 394 irqbase + SA1111_INTPOL1); 395 396 /* clear all IRQs */ 397 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR0); 398 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1); 399 400 for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) { 401 set_irq_chip(irq, &sa1111_low_chip); 402 set_irq_chipdata(irq, irqbase); 403 set_irq_handler(irq, do_edge_IRQ); 404 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 405 } 406 407 for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) { 408 set_irq_chip(irq, &sa1111_high_chip); 409 set_irq_chipdata(irq, irqbase); 410 set_irq_handler(irq, do_edge_IRQ); 411 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 412 } 413 414 /* 415 * Register SA1111 interrupt 416 */ 417 set_irq_type(sachip->irq, IRQT_RISING); 418 set_irq_data(sachip->irq, irqbase); 419 set_irq_chained_handler(sachip->irq, sa1111_irq_handler); 420 } 421 422 /* 423 * Bring the SA1111 out of reset. This requires a set procedure: 424 * 1. nRESET asserted (by hardware) 425 * 2. CLK turned on from SA1110 426 * 3. nRESET deasserted 427 * 4. VCO turned on, PLL_BYPASS turned off 428 * 5. Wait lock time, then assert RCLKEn 429 * 7. PCR set to allow clocking of individual functions 430 * 431 * Until we've done this, the only registers we can access are: 432 * SBI_SKCR 433 * SBI_SMCR 434 * SBI_SKID 435 */ 436 static void sa1111_wake(struct sa1111 *sachip) 437 { 438 unsigned long flags, r; 439 440 spin_lock_irqsave(&sachip->lock, flags); 441 442 #ifdef CONFIG_ARCH_SA1100 443 /* 444 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111: 445 * (SA-1110 Developer's Manual, section 9.1.2.1) 446 */ 447 GAFR |= GPIO_32_768kHz; 448 GPDR |= GPIO_32_768kHz; 449 TUCR = TUCR_3_6864MHz; 450 #elif CONFIG_ARCH_PXA 451 pxa_gpio_mode(GPIO11_3_6MHz_MD); 452 #else 453 #error missing clock setup 454 #endif 455 456 /* 457 * Turn VCO on, and disable PLL Bypass. 458 */ 459 r = sa1111_readl(sachip->base + SA1111_SKCR); 460 r &= ~SKCR_VCO_OFF; 461 sa1111_writel(r, sachip->base + SA1111_SKCR); 462 r |= SKCR_PLL_BYPASS | SKCR_OE_EN; 463 sa1111_writel(r, sachip->base + SA1111_SKCR); 464 465 /* 466 * Wait lock time. SA1111 manual _doesn't_ 467 * specify a figure for this! We choose 100us. 468 */ 469 udelay(100); 470 471 /* 472 * Enable RCLK. We also ensure that RDYEN is set. 473 */ 474 r |= SKCR_RCLKEN | SKCR_RDYEN; 475 sa1111_writel(r, sachip->base + SA1111_SKCR); 476 477 /* 478 * Wait 14 RCLK cycles for the chip to finish coming out 479 * of reset. (RCLK=24MHz). This is 590ns. 480 */ 481 udelay(1); 482 483 /* 484 * Ensure all clocks are initially off. 485 */ 486 sa1111_writel(0, sachip->base + SA1111_SKPCR); 487 488 spin_unlock_irqrestore(&sachip->lock, flags); 489 } 490 491 #ifdef CONFIG_ARCH_SA1100 492 493 static u32 sa1111_dma_mask[] = { 494 ~0, 495 ~(1 << 20), 496 ~(1 << 23), 497 ~(1 << 24), 498 ~(1 << 25), 499 ~(1 << 20), 500 ~(1 << 20), 501 0, 502 }; 503 504 /* 505 * Configure the SA1111 shared memory controller. 506 */ 507 void 508 sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac, 509 unsigned int cas_latency) 510 { 511 unsigned int smcr = SMCR_DTIM | SMCR_MBGE | FInsrt(drac, SMCR_DRAC); 512 513 if (cas_latency == 3) 514 smcr |= SMCR_CLAT; 515 516 sa1111_writel(smcr, sachip->base + SA1111_SMCR); 517 518 /* 519 * Now clear the bits in the DMA mask to work around the SA1111 520 * DMA erratum (Intel StrongARM SA-1111 Microprocessor Companion 521 * Chip Specification Update, June 2000, Erratum #7). 522 */ 523 if (sachip->dev->dma_mask) 524 *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2]; 525 526 sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2]; 527 } 528 529 #endif 530 531 static void sa1111_dev_release(struct device *_dev) 532 { 533 struct sa1111_dev *dev = SA1111_DEV(_dev); 534 535 release_resource(&dev->res); 536 kfree(dev); 537 } 538 539 static int 540 sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent, 541 struct sa1111_dev_info *info) 542 { 543 struct sa1111_dev *dev; 544 int ret; 545 546 dev = kmalloc(sizeof(struct sa1111_dev), GFP_KERNEL); 547 if (!dev) { 548 ret = -ENOMEM; 549 goto out; 550 } 551 memset(dev, 0, sizeof(struct sa1111_dev)); 552 553 snprintf(dev->dev.bus_id, sizeof(dev->dev.bus_id), 554 "%4.4lx", info->offset); 555 556 dev->devid = info->devid; 557 dev->dev.parent = sachip->dev; 558 dev->dev.bus = &sa1111_bus_type; 559 dev->dev.release = sa1111_dev_release; 560 dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask; 561 dev->res.start = sachip->phys + info->offset; 562 dev->res.end = dev->res.start + 511; 563 dev->res.name = dev->dev.bus_id; 564 dev->res.flags = IORESOURCE_MEM; 565 dev->mapbase = sachip->base + info->offset; 566 dev->skpcr_mask = info->skpcr_mask; 567 memmove(dev->irq, info->irq, sizeof(dev->irq)); 568 569 ret = request_resource(parent, &dev->res); 570 if (ret) { 571 printk("SA1111: failed to allocate resource for %s\n", 572 dev->res.name); 573 kfree(dev); 574 goto out; 575 } 576 577 578 ret = device_register(&dev->dev); 579 if (ret) { 580 release_resource(&dev->res); 581 kfree(dev); 582 goto out; 583 } 584 585 /* 586 * If the parent device has a DMA mask associated with it, 587 * propagate it down to the children. 588 */ 589 if (sachip->dev->dma_mask) { 590 dev->dma_mask = *sachip->dev->dma_mask; 591 dev->dev.dma_mask = &dev->dma_mask; 592 593 if (dev->dma_mask != 0xffffffffUL) { 594 ret = dmabounce_register_dev(&dev->dev, 1024, 4096); 595 if (ret) { 596 printk("SA1111: Failed to register %s with dmabounce", dev->dev.bus_id); 597 device_unregister(&dev->dev); 598 } 599 } 600 } 601 602 out: 603 return ret; 604 } 605 606 /** 607 * sa1111_probe - probe for a single SA1111 chip. 608 * @phys_addr: physical address of device. 609 * 610 * Probe for a SA1111 chip. This must be called 611 * before any other SA1111-specific code. 612 * 613 * Returns: 614 * %-ENODEV device not found. 615 * %-EBUSY physical address already marked in-use. 616 * %0 successful. 617 */ 618 static int 619 __sa1111_probe(struct device *me, struct resource *mem, int irq) 620 { 621 struct sa1111 *sachip; 622 unsigned long id; 623 unsigned int has_devs, val; 624 int i, ret = -ENODEV; 625 626 sachip = kmalloc(sizeof(struct sa1111), GFP_KERNEL); 627 if (!sachip) 628 return -ENOMEM; 629 630 memset(sachip, 0, sizeof(struct sa1111)); 631 632 spin_lock_init(&sachip->lock); 633 634 sachip->dev = me; 635 dev_set_drvdata(sachip->dev, sachip); 636 637 sachip->phys = mem->start; 638 sachip->irq = irq; 639 640 /* 641 * Map the whole region. This also maps the 642 * registers for our children. 643 */ 644 sachip->base = ioremap(mem->start, PAGE_SIZE * 2); 645 if (!sachip->base) { 646 ret = -ENOMEM; 647 goto out; 648 } 649 650 /* 651 * Probe for the chip. Only touch the SBI registers. 652 */ 653 id = sa1111_readl(sachip->base + SA1111_SKID); 654 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) { 655 printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id); 656 ret = -ENODEV; 657 goto unmap; 658 } 659 660 printk(KERN_INFO "SA1111 Microprocessor Companion Chip: " 661 "silicon revision %lx, metal revision %lx\n", 662 (id & SKID_SIREV_MASK)>>4, (id & SKID_MTREV_MASK)); 663 664 /* 665 * We found it. Wake the chip up, and initialise. 666 */ 667 sa1111_wake(sachip); 668 669 #ifdef CONFIG_ARCH_SA1100 670 /* 671 * The SDRAM configuration of the SA1110 and the SA1111 must 672 * match. This is very important to ensure that SA1111 accesses 673 * don't corrupt the SDRAM. Note that this ungates the SA1111's 674 * MBGNT signal, so we must have called sa1110_mb_disable() 675 * beforehand. 676 */ 677 sa1111_configure_smc(sachip, 1, 678 FExtr(MDCNFG, MDCNFG_SA1110_DRAC0), 679 FExtr(MDCNFG, MDCNFG_SA1110_TDL0)); 680 681 /* 682 * We only need to turn on DCLK whenever we want to use the 683 * DMA. It can otherwise be held firmly in the off position. 684 * (currently, we always enable it.) 685 */ 686 val = sa1111_readl(sachip->base + SA1111_SKPCR); 687 sa1111_writel(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR); 688 689 /* 690 * Enable the SA1110 memory bus request and grant signals. 691 */ 692 sa1110_mb_enable(); 693 #endif 694 695 /* 696 * The interrupt controller must be initialised before any 697 * other device to ensure that the interrupts are available. 698 */ 699 if (sachip->irq != NO_IRQ) 700 sa1111_setup_irq(sachip); 701 702 g_sa1111 = sachip; 703 704 has_devs = ~0; 705 if (machine_is_assabet() || machine_is_jornada720() || 706 machine_is_badge4()) 707 has_devs &= ~(1 << 4); 708 else 709 has_devs &= ~(1 << 1); 710 711 for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++) 712 if (has_devs & (1 << i)) 713 sa1111_init_one_child(sachip, mem, &sa1111_devices[i]); 714 715 return 0; 716 717 unmap: 718 iounmap(sachip->base); 719 out: 720 kfree(sachip); 721 return ret; 722 } 723 724 static void __sa1111_remove(struct sa1111 *sachip) 725 { 726 struct list_head *l, *n; 727 void __iomem *irqbase = sachip->base + SA1111_INTC; 728 729 list_for_each_safe(l, n, &sachip->dev->children) { 730 struct device *d = list_to_dev(l); 731 732 device_unregister(d); 733 } 734 735 /* disable all IRQs */ 736 sa1111_writel(0, irqbase + SA1111_INTEN0); 737 sa1111_writel(0, irqbase + SA1111_INTEN1); 738 sa1111_writel(0, irqbase + SA1111_WAKEEN0); 739 sa1111_writel(0, irqbase + SA1111_WAKEEN1); 740 741 if (sachip->irq != NO_IRQ) { 742 set_irq_chained_handler(sachip->irq, NULL); 743 set_irq_data(sachip->irq, NULL); 744 745 release_mem_region(sachip->phys + SA1111_INTC, 512); 746 } 747 748 iounmap(sachip->base); 749 kfree(sachip); 750 } 751 752 /* 753 * According to the "Intel StrongARM SA-1111 Microprocessor Companion 754 * Chip Specification Update" (June 2000), erratum #7, there is a 755 * significant bug in the SA1111 SDRAM shared memory controller. If 756 * an access to a region of memory above 1MB relative to the bank base, 757 * it is important that address bit 10 _NOT_ be asserted. Depending 758 * on the configuration of the RAM, bit 10 may correspond to one 759 * of several different (processor-relative) address bits. 760 * 761 * This routine only identifies whether or not a given DMA address 762 * is susceptible to the bug. 763 * 764 * This should only get called for sa1111_device types due to the 765 * way we configure our device dma_masks. 766 */ 767 int dma_needs_bounce(struct device *dev, dma_addr_t addr, size_t size) 768 { 769 /* 770 * Section 4.6 of the "Intel StrongARM SA-1111 Development Module 771 * User's Guide" mentions that jumpers R51 and R52 control the 772 * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or 773 * SDRAM bank 1 on Neponset). The default configuration selects 774 * Assabet, so any address in bank 1 is necessarily invalid. 775 */ 776 return ((machine_is_assabet() || machine_is_pfs168()) && 777 (addr >= 0xc8000000 || (addr + size) >= 0xc8000000)); 778 } 779 780 struct sa1111_save_data { 781 unsigned int skcr; 782 unsigned int skpcr; 783 unsigned int skcdr; 784 unsigned char skaud; 785 unsigned char skpwm0; 786 unsigned char skpwm1; 787 788 /* 789 * Interrupt controller 790 */ 791 unsigned int intpol0; 792 unsigned int intpol1; 793 unsigned int inten0; 794 unsigned int inten1; 795 unsigned int wakepol0; 796 unsigned int wakepol1; 797 unsigned int wakeen0; 798 unsigned int wakeen1; 799 }; 800 801 #ifdef CONFIG_PM 802 803 static int sa1111_suspend(struct device *dev, pm_message_t state, u32 level) 804 { 805 struct sa1111 *sachip = dev_get_drvdata(dev); 806 struct sa1111_save_data *save; 807 unsigned long flags; 808 unsigned int val; 809 void __iomem *base; 810 811 if (level != SUSPEND_DISABLE) 812 return 0; 813 814 save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL); 815 if (!save) 816 return -ENOMEM; 817 dev->power.saved_state = save; 818 819 spin_lock_irqsave(&sachip->lock, flags); 820 821 /* 822 * Save state. 823 */ 824 base = sachip->base; 825 save->skcr = sa1111_readl(base + SA1111_SKCR); 826 save->skpcr = sa1111_readl(base + SA1111_SKPCR); 827 save->skcdr = sa1111_readl(base + SA1111_SKCDR); 828 save->skaud = sa1111_readl(base + SA1111_SKAUD); 829 save->skpwm0 = sa1111_readl(base + SA1111_SKPWM0); 830 save->skpwm1 = sa1111_readl(base + SA1111_SKPWM1); 831 832 base = sachip->base + SA1111_INTC; 833 save->intpol0 = sa1111_readl(base + SA1111_INTPOL0); 834 save->intpol1 = sa1111_readl(base + SA1111_INTPOL1); 835 save->inten0 = sa1111_readl(base + SA1111_INTEN0); 836 save->inten1 = sa1111_readl(base + SA1111_INTEN1); 837 save->wakepol0 = sa1111_readl(base + SA1111_WAKEPOL0); 838 save->wakepol1 = sa1111_readl(base + SA1111_WAKEPOL1); 839 save->wakeen0 = sa1111_readl(base + SA1111_WAKEEN0); 840 save->wakeen1 = sa1111_readl(base + SA1111_WAKEEN1); 841 842 /* 843 * Disable. 844 */ 845 val = sa1111_readl(sachip->base + SA1111_SKCR); 846 sa1111_writel(val | SKCR_SLEEP, sachip->base + SA1111_SKCR); 847 sa1111_writel(0, sachip->base + SA1111_SKPWM0); 848 sa1111_writel(0, sachip->base + SA1111_SKPWM1); 849 850 spin_unlock_irqrestore(&sachip->lock, flags); 851 852 return 0; 853 } 854 855 /* 856 * sa1111_resume - Restore the SA1111 device state. 857 * @dev: device to restore 858 * @level: resume level 859 * 860 * Restore the general state of the SA1111; clock control and 861 * interrupt controller. Other parts of the SA1111 must be 862 * restored by their respective drivers, and must be called 863 * via LDM after this function. 864 */ 865 static int sa1111_resume(struct device *dev, u32 level) 866 { 867 struct sa1111 *sachip = dev_get_drvdata(dev); 868 struct sa1111_save_data *save; 869 unsigned long flags, id; 870 void __iomem *base; 871 872 if (level != RESUME_ENABLE) 873 return 0; 874 875 save = (struct sa1111_save_data *)dev->power.saved_state; 876 if (!save) 877 return 0; 878 879 spin_lock_irqsave(&sachip->lock, flags); 880 881 /* 882 * Ensure that the SA1111 is still here. 883 * FIXME: shouldn't do this here. 884 */ 885 id = sa1111_readl(sachip->base + SA1111_SKID); 886 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) { 887 __sa1111_remove(sachip); 888 dev_set_drvdata(dev, NULL); 889 kfree(save); 890 return 0; 891 } 892 893 /* 894 * First of all, wake up the chip. 895 */ 896 sa1111_wake(sachip); 897 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0); 898 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1); 899 900 base = sachip->base; 901 sa1111_writel(save->skcr, base + SA1111_SKCR); 902 sa1111_writel(save->skpcr, base + SA1111_SKPCR); 903 sa1111_writel(save->skcdr, base + SA1111_SKCDR); 904 sa1111_writel(save->skaud, base + SA1111_SKAUD); 905 sa1111_writel(save->skpwm0, base + SA1111_SKPWM0); 906 sa1111_writel(save->skpwm1, base + SA1111_SKPWM1); 907 908 base = sachip->base + SA1111_INTC; 909 sa1111_writel(save->intpol0, base + SA1111_INTPOL0); 910 sa1111_writel(save->intpol1, base + SA1111_INTPOL1); 911 sa1111_writel(save->inten0, base + SA1111_INTEN0); 912 sa1111_writel(save->inten1, base + SA1111_INTEN1); 913 sa1111_writel(save->wakepol0, base + SA1111_WAKEPOL0); 914 sa1111_writel(save->wakepol1, base + SA1111_WAKEPOL1); 915 sa1111_writel(save->wakeen0, base + SA1111_WAKEEN0); 916 sa1111_writel(save->wakeen1, base + SA1111_WAKEEN1); 917 918 spin_unlock_irqrestore(&sachip->lock, flags); 919 920 dev->power.saved_state = NULL; 921 kfree(save); 922 923 return 0; 924 } 925 926 #else 927 #define sa1111_suspend NULL 928 #define sa1111_resume NULL 929 #endif 930 931 static int sa1111_probe(struct device *dev) 932 { 933 struct platform_device *pdev = to_platform_device(dev); 934 struct resource *mem; 935 int irq; 936 937 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 938 if (!mem) 939 return -EINVAL; 940 irq = platform_get_irq(pdev, 0); 941 942 return __sa1111_probe(dev, mem, irq); 943 } 944 945 static int sa1111_remove(struct device *dev) 946 { 947 struct sa1111 *sachip = dev_get_drvdata(dev); 948 949 if (sachip) { 950 __sa1111_remove(sachip); 951 dev_set_drvdata(dev, NULL); 952 953 #ifdef CONFIG_PM 954 kfree(dev->power.saved_state); 955 dev->power.saved_state = NULL; 956 #endif 957 } 958 959 return 0; 960 } 961 962 /* 963 * Not sure if this should be on the system bus or not yet. 964 * We really want some way to register a system device at 965 * the per-machine level, and then have this driver pick 966 * up the registered devices. 967 * 968 * We also need to handle the SDRAM configuration for 969 * PXA250/SA1110 machine classes. 970 */ 971 static struct device_driver sa1111_device_driver = { 972 .name = "sa1111", 973 .bus = &platform_bus_type, 974 .probe = sa1111_probe, 975 .remove = sa1111_remove, 976 .suspend = sa1111_suspend, 977 .resume = sa1111_resume, 978 }; 979 980 /* 981 * Get the parent device driver (us) structure 982 * from a child function device 983 */ 984 static inline struct sa1111 *sa1111_chip_driver(struct sa1111_dev *sadev) 985 { 986 return (struct sa1111 *)dev_get_drvdata(sadev->dev.parent); 987 } 988 989 /* 990 * The bits in the opdiv field are non-linear. 991 */ 992 static unsigned char opdiv_table[] = { 1, 4, 2, 8 }; 993 994 static unsigned int __sa1111_pll_clock(struct sa1111 *sachip) 995 { 996 unsigned int skcdr, fbdiv, ipdiv, opdiv; 997 998 skcdr = sa1111_readl(sachip->base + SA1111_SKCDR); 999 1000 fbdiv = (skcdr & 0x007f) + 2; 1001 ipdiv = ((skcdr & 0x0f80) >> 7) + 2; 1002 opdiv = opdiv_table[(skcdr & 0x3000) >> 12]; 1003 1004 return 3686400 * fbdiv / (ipdiv * opdiv); 1005 } 1006 1007 /** 1008 * sa1111_pll_clock - return the current PLL clock frequency. 1009 * @sadev: SA1111 function block 1010 * 1011 * BUG: we should look at SKCR. We also blindly believe that 1012 * the chip is being fed with the 3.6864MHz clock. 1013 * 1014 * Returns the PLL clock in Hz. 1015 */ 1016 unsigned int sa1111_pll_clock(struct sa1111_dev *sadev) 1017 { 1018 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1019 1020 return __sa1111_pll_clock(sachip); 1021 } 1022 1023 /** 1024 * sa1111_select_audio_mode - select I2S or AC link mode 1025 * @sadev: SA1111 function block 1026 * @mode: One of %SA1111_AUDIO_ACLINK or %SA1111_AUDIO_I2S 1027 * 1028 * Frob the SKCR to select AC Link mode or I2S mode for 1029 * the audio block. 1030 */ 1031 void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode) 1032 { 1033 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1034 unsigned long flags; 1035 unsigned int val; 1036 1037 spin_lock_irqsave(&sachip->lock, flags); 1038 1039 val = sa1111_readl(sachip->base + SA1111_SKCR); 1040 if (mode == SA1111_AUDIO_I2S) { 1041 val &= ~SKCR_SELAC; 1042 } else { 1043 val |= SKCR_SELAC; 1044 } 1045 sa1111_writel(val, sachip->base + SA1111_SKCR); 1046 1047 spin_unlock_irqrestore(&sachip->lock, flags); 1048 } 1049 1050 /** 1051 * sa1111_set_audio_rate - set the audio sample rate 1052 * @sadev: SA1111 SAC function block 1053 * @rate: sample rate to select 1054 */ 1055 int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate) 1056 { 1057 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1058 unsigned int div; 1059 1060 if (sadev->devid != SA1111_DEVID_SAC) 1061 return -EINVAL; 1062 1063 div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate; 1064 if (div == 0) 1065 div = 1; 1066 if (div > 128) 1067 div = 128; 1068 1069 sa1111_writel(div - 1, sachip->base + SA1111_SKAUD); 1070 1071 return 0; 1072 } 1073 1074 /** 1075 * sa1111_get_audio_rate - get the audio sample rate 1076 * @sadev: SA1111 SAC function block device 1077 */ 1078 int sa1111_get_audio_rate(struct sa1111_dev *sadev) 1079 { 1080 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1081 unsigned long div; 1082 1083 if (sadev->devid != SA1111_DEVID_SAC) 1084 return -EINVAL; 1085 1086 div = sa1111_readl(sachip->base + SA1111_SKAUD) + 1; 1087 1088 return __sa1111_pll_clock(sachip) / (256 * div); 1089 } 1090 1091 void sa1111_set_io_dir(struct sa1111_dev *sadev, 1092 unsigned int bits, unsigned int dir, 1093 unsigned int sleep_dir) 1094 { 1095 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1096 unsigned long flags; 1097 unsigned int val; 1098 void __iomem *gpio = sachip->base + SA1111_GPIO; 1099 1100 #define MODIFY_BITS(port, mask, dir) \ 1101 if (mask) { \ 1102 val = sa1111_readl(port); \ 1103 val &= ~(mask); \ 1104 val |= (dir) & (mask); \ 1105 sa1111_writel(val, port); \ 1106 } 1107 1108 spin_lock_irqsave(&sachip->lock, flags); 1109 MODIFY_BITS(gpio + SA1111_GPIO_PADDR, bits & 15, dir); 1110 MODIFY_BITS(gpio + SA1111_GPIO_PBDDR, (bits >> 8) & 255, dir >> 8); 1111 MODIFY_BITS(gpio + SA1111_GPIO_PCDDR, (bits >> 16) & 255, dir >> 16); 1112 1113 MODIFY_BITS(gpio + SA1111_GPIO_PASDR, bits & 15, sleep_dir); 1114 MODIFY_BITS(gpio + SA1111_GPIO_PBSDR, (bits >> 8) & 255, sleep_dir >> 8); 1115 MODIFY_BITS(gpio + SA1111_GPIO_PCSDR, (bits >> 16) & 255, sleep_dir >> 16); 1116 spin_unlock_irqrestore(&sachip->lock, flags); 1117 } 1118 1119 void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v) 1120 { 1121 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1122 unsigned long flags; 1123 unsigned int val; 1124 void __iomem *gpio = sachip->base + SA1111_GPIO; 1125 1126 spin_lock_irqsave(&sachip->lock, flags); 1127 MODIFY_BITS(gpio + SA1111_GPIO_PADWR, bits & 15, v); 1128 MODIFY_BITS(gpio + SA1111_GPIO_PBDWR, (bits >> 8) & 255, v >> 8); 1129 MODIFY_BITS(gpio + SA1111_GPIO_PCDWR, (bits >> 16) & 255, v >> 16); 1130 spin_unlock_irqrestore(&sachip->lock, flags); 1131 } 1132 1133 void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v) 1134 { 1135 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1136 unsigned long flags; 1137 unsigned int val; 1138 void __iomem *gpio = sachip->base + SA1111_GPIO; 1139 1140 spin_lock_irqsave(&sachip->lock, flags); 1141 MODIFY_BITS(gpio + SA1111_GPIO_PASSR, bits & 15, v); 1142 MODIFY_BITS(gpio + SA1111_GPIO_PBSSR, (bits >> 8) & 255, v >> 8); 1143 MODIFY_BITS(gpio + SA1111_GPIO_PCSSR, (bits >> 16) & 255, v >> 16); 1144 spin_unlock_irqrestore(&sachip->lock, flags); 1145 } 1146 1147 /* 1148 * Individual device operations. 1149 */ 1150 1151 /** 1152 * sa1111_enable_device - enable an on-chip SA1111 function block 1153 * @sadev: SA1111 function block device to enable 1154 */ 1155 void sa1111_enable_device(struct sa1111_dev *sadev) 1156 { 1157 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1158 unsigned long flags; 1159 unsigned int val; 1160 1161 spin_lock_irqsave(&sachip->lock, flags); 1162 val = sa1111_readl(sachip->base + SA1111_SKPCR); 1163 sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR); 1164 spin_unlock_irqrestore(&sachip->lock, flags); 1165 } 1166 1167 /** 1168 * sa1111_disable_device - disable an on-chip SA1111 function block 1169 * @sadev: SA1111 function block device to disable 1170 */ 1171 void sa1111_disable_device(struct sa1111_dev *sadev) 1172 { 1173 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1174 unsigned long flags; 1175 unsigned int val; 1176 1177 spin_lock_irqsave(&sachip->lock, flags); 1178 val = sa1111_readl(sachip->base + SA1111_SKPCR); 1179 sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR); 1180 spin_unlock_irqrestore(&sachip->lock, flags); 1181 } 1182 1183 /* 1184 * SA1111 "Register Access Bus." 1185 * 1186 * We model this as a regular bus type, and hang devices directly 1187 * off this. 1188 */ 1189 static int sa1111_match(struct device *_dev, struct device_driver *_drv) 1190 { 1191 struct sa1111_dev *dev = SA1111_DEV(_dev); 1192 struct sa1111_driver *drv = SA1111_DRV(_drv); 1193 1194 return dev->devid == drv->devid; 1195 } 1196 1197 static int sa1111_bus_suspend(struct device *dev, pm_message_t state) 1198 { 1199 struct sa1111_dev *sadev = SA1111_DEV(dev); 1200 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1201 int ret = 0; 1202 1203 if (drv && drv->suspend) 1204 ret = drv->suspend(sadev, state); 1205 return ret; 1206 } 1207 1208 static int sa1111_bus_resume(struct device *dev) 1209 { 1210 struct sa1111_dev *sadev = SA1111_DEV(dev); 1211 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1212 int ret = 0; 1213 1214 if (drv && drv->resume) 1215 ret = drv->resume(sadev); 1216 return ret; 1217 } 1218 1219 static int sa1111_bus_probe(struct device *dev) 1220 { 1221 struct sa1111_dev *sadev = SA1111_DEV(dev); 1222 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1223 int ret = -ENODEV; 1224 1225 if (drv->probe) 1226 ret = drv->probe(sadev); 1227 return ret; 1228 } 1229 1230 static int sa1111_bus_remove(struct device *dev) 1231 { 1232 struct sa1111_dev *sadev = SA1111_DEV(dev); 1233 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1234 int ret = 0; 1235 1236 if (drv->remove) 1237 ret = drv->remove(sadev); 1238 return ret; 1239 } 1240 1241 struct bus_type sa1111_bus_type = { 1242 .name = "sa1111-rab", 1243 .match = sa1111_match, 1244 .suspend = sa1111_bus_suspend, 1245 .resume = sa1111_bus_resume, 1246 }; 1247 1248 int sa1111_driver_register(struct sa1111_driver *driver) 1249 { 1250 driver->drv.probe = sa1111_bus_probe; 1251 driver->drv.remove = sa1111_bus_remove; 1252 driver->drv.bus = &sa1111_bus_type; 1253 return driver_register(&driver->drv); 1254 } 1255 1256 void sa1111_driver_unregister(struct sa1111_driver *driver) 1257 { 1258 driver_unregister(&driver->drv); 1259 } 1260 1261 static int __init sa1111_init(void) 1262 { 1263 int ret = bus_register(&sa1111_bus_type); 1264 if (ret == 0) 1265 driver_register(&sa1111_device_driver); 1266 return ret; 1267 } 1268 1269 static void __exit sa1111_exit(void) 1270 { 1271 driver_unregister(&sa1111_device_driver); 1272 bus_unregister(&sa1111_bus_type); 1273 } 1274 1275 module_init(sa1111_init); 1276 module_exit(sa1111_exit); 1277 1278 MODULE_DESCRIPTION("Intel Corporation SA1111 core driver"); 1279 MODULE_LICENSE("GPL"); 1280 1281 EXPORT_SYMBOL(sa1111_select_audio_mode); 1282 EXPORT_SYMBOL(sa1111_set_audio_rate); 1283 EXPORT_SYMBOL(sa1111_get_audio_rate); 1284 EXPORT_SYMBOL(sa1111_set_io_dir); 1285 EXPORT_SYMBOL(sa1111_set_io); 1286 EXPORT_SYMBOL(sa1111_set_sleep_io); 1287 EXPORT_SYMBOL(sa1111_enable_device); 1288 EXPORT_SYMBOL(sa1111_disable_device); 1289 EXPORT_SYMBOL(sa1111_pll_clock); 1290 EXPORT_SYMBOL(sa1111_bus_type); 1291 EXPORT_SYMBOL(sa1111_driver_register); 1292 EXPORT_SYMBOL(sa1111_driver_unregister); 1293