11c33be57SNicolas Pitre /* 21c33be57SNicolas Pitre * arch/arm/common/bL_switcher.c -- big.LITTLE cluster switcher core driver 31c33be57SNicolas Pitre * 41c33be57SNicolas Pitre * Created by: Nicolas Pitre, March 2012 51c33be57SNicolas Pitre * Copyright: (C) 2012-2013 Linaro Limited 61c33be57SNicolas Pitre * 71c33be57SNicolas Pitre * This program is free software; you can redistribute it and/or modify 81c33be57SNicolas Pitre * it under the terms of the GNU General Public License version 2 as 91c33be57SNicolas Pitre * published by the Free Software Foundation. 101c33be57SNicolas Pitre */ 111c33be57SNicolas Pitre 121c33be57SNicolas Pitre #include <linux/init.h> 131c33be57SNicolas Pitre #include <linux/kernel.h> 141c33be57SNicolas Pitre #include <linux/module.h> 151c33be57SNicolas Pitre #include <linux/sched.h> 161c33be57SNicolas Pitre #include <linux/interrupt.h> 171c33be57SNicolas Pitre #include <linux/cpu_pm.h> 1871ce1deeSNicolas Pitre #include <linux/cpu.h> 193f09d479SLorenzo Pieralisi #include <linux/cpumask.h> 2071ce1deeSNicolas Pitre #include <linux/kthread.h> 2171ce1deeSNicolas Pitre #include <linux/wait.h> 223f09d479SLorenzo Pieralisi #include <linux/clockchips.h> 233f09d479SLorenzo Pieralisi #include <linux/hrtimer.h> 243f09d479SLorenzo Pieralisi #include <linux/tick.h> 251c33be57SNicolas Pitre #include <linux/mm.h> 261c33be57SNicolas Pitre #include <linux/string.h> 271c33be57SNicolas Pitre #include <linux/irqchip/arm-gic.h> 281c33be57SNicolas Pitre 291c33be57SNicolas Pitre #include <asm/smp_plat.h> 301c33be57SNicolas Pitre #include <asm/suspend.h> 311c33be57SNicolas Pitre #include <asm/mcpm.h> 321c33be57SNicolas Pitre #include <asm/bL_switcher.h> 331c33be57SNicolas Pitre 341c33be57SNicolas Pitre 351c33be57SNicolas Pitre /* 361c33be57SNicolas Pitre * Use our own MPIDR accessors as the generic ones in asm/cputype.h have 371c33be57SNicolas Pitre * __attribute_const__ and we don't want the compiler to assume any 381c33be57SNicolas Pitre * constness here as the value _does_ change along some code paths. 391c33be57SNicolas Pitre */ 401c33be57SNicolas Pitre 411c33be57SNicolas Pitre static int read_mpidr(void) 421c33be57SNicolas Pitre { 431c33be57SNicolas Pitre unsigned int id; 441c33be57SNicolas Pitre asm volatile ("mrc p15, 0, %0, c0, c0, 5" : "=r" (id)); 451c33be57SNicolas Pitre return id & MPIDR_HWID_BITMASK; 461c33be57SNicolas Pitre } 471c33be57SNicolas Pitre 481c33be57SNicolas Pitre /* 491c33be57SNicolas Pitre * bL switcher core code. 501c33be57SNicolas Pitre */ 511c33be57SNicolas Pitre 521c33be57SNicolas Pitre static void bL_do_switch(void *_unused) 531c33be57SNicolas Pitre { 541c33be57SNicolas Pitre unsigned mpidr, cpuid, clusterid, ob_cluster, ib_cluster; 551c33be57SNicolas Pitre 561c33be57SNicolas Pitre pr_debug("%s\n", __func__); 571c33be57SNicolas Pitre 581c33be57SNicolas Pitre mpidr = read_mpidr(); 591c33be57SNicolas Pitre cpuid = MPIDR_AFFINITY_LEVEL(mpidr, 0); 601c33be57SNicolas Pitre clusterid = MPIDR_AFFINITY_LEVEL(mpidr, 1); 611c33be57SNicolas Pitre ob_cluster = clusterid; 621c33be57SNicolas Pitre ib_cluster = clusterid ^ 1; 631c33be57SNicolas Pitre 641c33be57SNicolas Pitre /* 651c33be57SNicolas Pitre * Our state has been saved at this point. Let's release our 661c33be57SNicolas Pitre * inbound CPU. 671c33be57SNicolas Pitre */ 681c33be57SNicolas Pitre mcpm_set_entry_vector(cpuid, ib_cluster, cpu_resume); 691c33be57SNicolas Pitre sev(); 701c33be57SNicolas Pitre 711c33be57SNicolas Pitre /* 721c33be57SNicolas Pitre * From this point, we must assume that our counterpart CPU might 731c33be57SNicolas Pitre * have taken over in its parallel world already, as if execution 741c33be57SNicolas Pitre * just returned from cpu_suspend(). It is therefore important to 751c33be57SNicolas Pitre * be very careful not to make any change the other guy is not 761c33be57SNicolas Pitre * expecting. This is why we need stack isolation. 771c33be57SNicolas Pitre * 781c33be57SNicolas Pitre * Fancy under cover tasks could be performed here. For now 791c33be57SNicolas Pitre * we have none. 801c33be57SNicolas Pitre */ 811c33be57SNicolas Pitre 821c33be57SNicolas Pitre /* Let's put ourself down. */ 831c33be57SNicolas Pitre mcpm_cpu_power_down(); 841c33be57SNicolas Pitre 851c33be57SNicolas Pitre /* should never get here */ 861c33be57SNicolas Pitre BUG(); 871c33be57SNicolas Pitre } 881c33be57SNicolas Pitre 891c33be57SNicolas Pitre /* 90*c052de26SNicolas Pitre * Stack isolation. To ensure 'current' remains valid, we just use another 91*c052de26SNicolas Pitre * piece of our thread's stack space which should be fairly lightly used. 92*c052de26SNicolas Pitre * The selected area starts just above the thread_info structure located 93*c052de26SNicolas Pitre * at the very bottom of the stack, aligned to a cache line, and indexed 94*c052de26SNicolas Pitre * with the cluster number. 951c33be57SNicolas Pitre */ 96*c052de26SNicolas Pitre #define STACK_SIZE 512 971c33be57SNicolas Pitre extern void call_with_stack(void (*fn)(void *), void *arg, void *sp); 981c33be57SNicolas Pitre static int bL_switchpoint(unsigned long _arg) 991c33be57SNicolas Pitre { 1001c33be57SNicolas Pitre unsigned int mpidr = read_mpidr(); 1011c33be57SNicolas Pitre unsigned int clusterid = MPIDR_AFFINITY_LEVEL(mpidr, 1); 102*c052de26SNicolas Pitre void *stack = current_thread_info() + 1; 1031c33be57SNicolas Pitre stack = PTR_ALIGN(stack, L1_CACHE_BYTES); 104*c052de26SNicolas Pitre stack += clusterid * STACK_SIZE + STACK_SIZE; 1051c33be57SNicolas Pitre call_with_stack(bL_do_switch, (void *)_arg, stack); 1061c33be57SNicolas Pitre BUG(); 1071c33be57SNicolas Pitre } 1081c33be57SNicolas Pitre 1091c33be57SNicolas Pitre /* 1101c33be57SNicolas Pitre * Generic switcher interface 1111c33be57SNicolas Pitre */ 1121c33be57SNicolas Pitre 1131c33be57SNicolas Pitre /* 1141c33be57SNicolas Pitre * bL_switch_to - Switch to a specific cluster for the current CPU 1151c33be57SNicolas Pitre * @new_cluster_id: the ID of the cluster to switch to. 1161c33be57SNicolas Pitre * 1171c33be57SNicolas Pitre * This function must be called on the CPU to be switched. 1181c33be57SNicolas Pitre * Returns 0 on success, else a negative status code. 1191c33be57SNicolas Pitre */ 1201c33be57SNicolas Pitre static int bL_switch_to(unsigned int new_cluster_id) 1211c33be57SNicolas Pitre { 1221c33be57SNicolas Pitre unsigned int mpidr, cpuid, clusterid, ob_cluster, ib_cluster, this_cpu; 1233f09d479SLorenzo Pieralisi struct tick_device *tdev; 1243f09d479SLorenzo Pieralisi enum clock_event_mode tdev_mode; 1251c33be57SNicolas Pitre int ret; 1261c33be57SNicolas Pitre 1271c33be57SNicolas Pitre mpidr = read_mpidr(); 1281c33be57SNicolas Pitre cpuid = MPIDR_AFFINITY_LEVEL(mpidr, 0); 1291c33be57SNicolas Pitre clusterid = MPIDR_AFFINITY_LEVEL(mpidr, 1); 1301c33be57SNicolas Pitre ob_cluster = clusterid; 1311c33be57SNicolas Pitre ib_cluster = clusterid ^ 1; 1321c33be57SNicolas Pitre 1331c33be57SNicolas Pitre if (new_cluster_id == clusterid) 1341c33be57SNicolas Pitre return 0; 1351c33be57SNicolas Pitre 1361c33be57SNicolas Pitre pr_debug("before switch: CPU %d in cluster %d\n", cpuid, clusterid); 1371c33be57SNicolas Pitre 1381c33be57SNicolas Pitre /* Close the gate for our entry vectors */ 1391c33be57SNicolas Pitre mcpm_set_entry_vector(cpuid, ob_cluster, NULL); 1401c33be57SNicolas Pitre mcpm_set_entry_vector(cpuid, ib_cluster, NULL); 1411c33be57SNicolas Pitre 1421c33be57SNicolas Pitre /* 1431c33be57SNicolas Pitre * Let's wake up the inbound CPU now in case it requires some delay 1441c33be57SNicolas Pitre * to come online, but leave it gated in our entry vector code. 1451c33be57SNicolas Pitre */ 1461c33be57SNicolas Pitre ret = mcpm_cpu_power_up(cpuid, ib_cluster); 1471c33be57SNicolas Pitre if (ret) { 1481c33be57SNicolas Pitre pr_err("%s: mcpm_cpu_power_up() returned %d\n", __func__, ret); 1491c33be57SNicolas Pitre return ret; 1501c33be57SNicolas Pitre } 1511c33be57SNicolas Pitre 1521c33be57SNicolas Pitre /* 1531c33be57SNicolas Pitre * From this point we are entering the switch critical zone 1541c33be57SNicolas Pitre * and can't take any interrupts anymore. 1551c33be57SNicolas Pitre */ 1561c33be57SNicolas Pitre local_irq_disable(); 1571c33be57SNicolas Pitre local_fiq_disable(); 1581c33be57SNicolas Pitre 1591c33be57SNicolas Pitre this_cpu = smp_processor_id(); 1601c33be57SNicolas Pitre 1611c33be57SNicolas Pitre /* redirect GIC's SGIs to our counterpart */ 1621c33be57SNicolas Pitre gic_migrate_target(cpuid + ib_cluster*4); 1631c33be57SNicolas Pitre 1641c33be57SNicolas Pitre /* 1651c33be57SNicolas Pitre * Raise a SGI on the inbound CPU to make sure it doesn't stall 1661c33be57SNicolas Pitre * in a possible WFI, such as in mcpm_power_down(). 1671c33be57SNicolas Pitre */ 1681c33be57SNicolas Pitre arch_send_wakeup_ipi_mask(cpumask_of(this_cpu)); 1691c33be57SNicolas Pitre 1703f09d479SLorenzo Pieralisi tdev = tick_get_device(this_cpu); 1713f09d479SLorenzo Pieralisi if (tdev && !cpumask_equal(tdev->evtdev->cpumask, cpumask_of(this_cpu))) 1723f09d479SLorenzo Pieralisi tdev = NULL; 1733f09d479SLorenzo Pieralisi if (tdev) { 1743f09d479SLorenzo Pieralisi tdev_mode = tdev->evtdev->mode; 1753f09d479SLorenzo Pieralisi clockevents_set_mode(tdev->evtdev, CLOCK_EVT_MODE_SHUTDOWN); 1763f09d479SLorenzo Pieralisi } 1773f09d479SLorenzo Pieralisi 1781c33be57SNicolas Pitre ret = cpu_pm_enter(); 1791c33be57SNicolas Pitre 1801c33be57SNicolas Pitre /* we can not tolerate errors at this point */ 1811c33be57SNicolas Pitre if (ret) 1821c33be57SNicolas Pitre panic("%s: cpu_pm_enter() returned %d\n", __func__, ret); 1831c33be57SNicolas Pitre 1841c33be57SNicolas Pitre /* Flip the cluster in the CPU logical map for this CPU. */ 1851c33be57SNicolas Pitre cpu_logical_map(this_cpu) ^= (1 << 8); 1861c33be57SNicolas Pitre 1871c33be57SNicolas Pitre /* Let's do the actual CPU switch. */ 1881c33be57SNicolas Pitre ret = cpu_suspend(0, bL_switchpoint); 1891c33be57SNicolas Pitre if (ret > 0) 1901c33be57SNicolas Pitre panic("%s: cpu_suspend() returned %d\n", __func__, ret); 1911c33be57SNicolas Pitre 1921c33be57SNicolas Pitre /* We are executing on the inbound CPU at this point */ 1931c33be57SNicolas Pitre mpidr = read_mpidr(); 1941c33be57SNicolas Pitre cpuid = MPIDR_AFFINITY_LEVEL(mpidr, 0); 1951c33be57SNicolas Pitre clusterid = MPIDR_AFFINITY_LEVEL(mpidr, 1); 1961c33be57SNicolas Pitre pr_debug("after switch: CPU %d in cluster %d\n", cpuid, clusterid); 1971c33be57SNicolas Pitre BUG_ON(clusterid != ib_cluster); 1981c33be57SNicolas Pitre 1991c33be57SNicolas Pitre mcpm_cpu_powered_up(); 2001c33be57SNicolas Pitre 2011c33be57SNicolas Pitre ret = cpu_pm_exit(); 2021c33be57SNicolas Pitre 2033f09d479SLorenzo Pieralisi if (tdev) { 2043f09d479SLorenzo Pieralisi clockevents_set_mode(tdev->evtdev, tdev_mode); 2053f09d479SLorenzo Pieralisi clockevents_program_event(tdev->evtdev, 2063f09d479SLorenzo Pieralisi tdev->evtdev->next_event, 1); 2073f09d479SLorenzo Pieralisi } 2083f09d479SLorenzo Pieralisi 2091c33be57SNicolas Pitre local_fiq_enable(); 2101c33be57SNicolas Pitre local_irq_enable(); 2111c33be57SNicolas Pitre 2121c33be57SNicolas Pitre if (ret) 2131c33be57SNicolas Pitre pr_err("%s exiting with error %d\n", __func__, ret); 2141c33be57SNicolas Pitre return ret; 2151c33be57SNicolas Pitre } 2161c33be57SNicolas Pitre 21771ce1deeSNicolas Pitre struct bL_thread { 21871ce1deeSNicolas Pitre struct task_struct *task; 21971ce1deeSNicolas Pitre wait_queue_head_t wq; 22071ce1deeSNicolas Pitre int wanted_cluster; 2211c33be57SNicolas Pitre }; 2221c33be57SNicolas Pitre 22371ce1deeSNicolas Pitre static struct bL_thread bL_threads[NR_CPUS]; 22471ce1deeSNicolas Pitre 22571ce1deeSNicolas Pitre static int bL_switcher_thread(void *arg) 2261c33be57SNicolas Pitre { 22771ce1deeSNicolas Pitre struct bL_thread *t = arg; 22871ce1deeSNicolas Pitre struct sched_param param = { .sched_priority = 1 }; 22971ce1deeSNicolas Pitre int cluster; 23071ce1deeSNicolas Pitre 23171ce1deeSNicolas Pitre sched_setscheduler_nocheck(current, SCHED_FIFO, ¶m); 23271ce1deeSNicolas Pitre 23371ce1deeSNicolas Pitre do { 23471ce1deeSNicolas Pitre if (signal_pending(current)) 23571ce1deeSNicolas Pitre flush_signals(current); 23671ce1deeSNicolas Pitre wait_event_interruptible(t->wq, 23771ce1deeSNicolas Pitre t->wanted_cluster != -1 || 23871ce1deeSNicolas Pitre kthread_should_stop()); 23971ce1deeSNicolas Pitre cluster = xchg(&t->wanted_cluster, -1); 24071ce1deeSNicolas Pitre if (cluster != -1) 24171ce1deeSNicolas Pitre bL_switch_to(cluster); 24271ce1deeSNicolas Pitre } while (!kthread_should_stop()); 24371ce1deeSNicolas Pitre 24471ce1deeSNicolas Pitre return 0; 24571ce1deeSNicolas Pitre } 24671ce1deeSNicolas Pitre 24771ce1deeSNicolas Pitre static struct task_struct * __init bL_switcher_thread_create(int cpu, void *arg) 24871ce1deeSNicolas Pitre { 24971ce1deeSNicolas Pitre struct task_struct *task; 25071ce1deeSNicolas Pitre 25171ce1deeSNicolas Pitre task = kthread_create_on_node(bL_switcher_thread, arg, 25271ce1deeSNicolas Pitre cpu_to_node(cpu), "kswitcher_%d", cpu); 25371ce1deeSNicolas Pitre if (!IS_ERR(task)) { 25471ce1deeSNicolas Pitre kthread_bind(task, cpu); 25571ce1deeSNicolas Pitre wake_up_process(task); 25671ce1deeSNicolas Pitre } else 25771ce1deeSNicolas Pitre pr_err("%s failed for CPU %d\n", __func__, cpu); 25871ce1deeSNicolas Pitre return task; 2591c33be57SNicolas Pitre } 2601c33be57SNicolas Pitre 2611c33be57SNicolas Pitre /* 2621c33be57SNicolas Pitre * bL_switch_request - Switch to a specific cluster for the given CPU 2631c33be57SNicolas Pitre * 2641c33be57SNicolas Pitre * @cpu: the CPU to switch 2651c33be57SNicolas Pitre * @new_cluster_id: the ID of the cluster to switch to. 2661c33be57SNicolas Pitre * 26771ce1deeSNicolas Pitre * This function causes a cluster switch on the given CPU by waking up 26871ce1deeSNicolas Pitre * the appropriate switcher thread. This function may or may not return 26971ce1deeSNicolas Pitre * before the switch has occurred. 2701c33be57SNicolas Pitre */ 27171ce1deeSNicolas Pitre int bL_switch_request(unsigned int cpu, unsigned int new_cluster_id) 2721c33be57SNicolas Pitre { 27371ce1deeSNicolas Pitre struct bL_thread *t; 2741c33be57SNicolas Pitre 27571ce1deeSNicolas Pitre if (cpu >= ARRAY_SIZE(bL_threads)) { 27671ce1deeSNicolas Pitre pr_err("%s: cpu %d out of bounds\n", __func__, cpu); 27771ce1deeSNicolas Pitre return -EINVAL; 2781c33be57SNicolas Pitre } 2791c33be57SNicolas Pitre 28071ce1deeSNicolas Pitre t = &bL_threads[cpu]; 28171ce1deeSNicolas Pitre if (IS_ERR(t->task)) 28271ce1deeSNicolas Pitre return PTR_ERR(t->task); 28371ce1deeSNicolas Pitre if (!t->task) 28471ce1deeSNicolas Pitre return -ESRCH; 28571ce1deeSNicolas Pitre 28671ce1deeSNicolas Pitre t->wanted_cluster = new_cluster_id; 28771ce1deeSNicolas Pitre wake_up(&t->wq); 28871ce1deeSNicolas Pitre return 0; 2891c33be57SNicolas Pitre } 2901c33be57SNicolas Pitre EXPORT_SYMBOL_GPL(bL_switch_request); 29171ce1deeSNicolas Pitre 29271ce1deeSNicolas Pitre static int __init bL_switcher_init(void) 29371ce1deeSNicolas Pitre { 29471ce1deeSNicolas Pitre int cpu; 29571ce1deeSNicolas Pitre 29671ce1deeSNicolas Pitre pr_info("big.LITTLE switcher initializing\n"); 29771ce1deeSNicolas Pitre 29871ce1deeSNicolas Pitre for_each_online_cpu(cpu) { 29971ce1deeSNicolas Pitre struct bL_thread *t = &bL_threads[cpu]; 30071ce1deeSNicolas Pitre init_waitqueue_head(&t->wq); 30171ce1deeSNicolas Pitre t->wanted_cluster = -1; 30271ce1deeSNicolas Pitre t->task = bL_switcher_thread_create(cpu, t); 30371ce1deeSNicolas Pitre } 30471ce1deeSNicolas Pitre 30571ce1deeSNicolas Pitre pr_info("big.LITTLE switcher initialized\n"); 30671ce1deeSNicolas Pitre return 0; 30771ce1deeSNicolas Pitre } 30871ce1deeSNicolas Pitre 30971ce1deeSNicolas Pitre late_initcall(bL_switcher_init); 310