11c33be57SNicolas Pitre /* 21c33be57SNicolas Pitre * arch/arm/common/bL_switcher.c -- big.LITTLE cluster switcher core driver 31c33be57SNicolas Pitre * 41c33be57SNicolas Pitre * Created by: Nicolas Pitre, March 2012 51c33be57SNicolas Pitre * Copyright: (C) 2012-2013 Linaro Limited 61c33be57SNicolas Pitre * 71c33be57SNicolas Pitre * This program is free software; you can redistribute it and/or modify 81c33be57SNicolas Pitre * it under the terms of the GNU General Public License version 2 as 91c33be57SNicolas Pitre * published by the Free Software Foundation. 101c33be57SNicolas Pitre */ 111c33be57SNicolas Pitre 121c33be57SNicolas Pitre #include <linux/init.h> 131c33be57SNicolas Pitre #include <linux/kernel.h> 141c33be57SNicolas Pitre #include <linux/module.h> 151c33be57SNicolas Pitre #include <linux/sched.h> 161c33be57SNicolas Pitre #include <linux/interrupt.h> 171c33be57SNicolas Pitre #include <linux/cpu_pm.h> 18*3f09d479SLorenzo Pieralisi #include <linux/cpumask.h> 191c33be57SNicolas Pitre #include <linux/workqueue.h> 20*3f09d479SLorenzo Pieralisi #include <linux/clockchips.h> 21*3f09d479SLorenzo Pieralisi #include <linux/hrtimer.h> 22*3f09d479SLorenzo Pieralisi #include <linux/tick.h> 231c33be57SNicolas Pitre #include <linux/mm.h> 241c33be57SNicolas Pitre #include <linux/string.h> 251c33be57SNicolas Pitre #include <linux/irqchip/arm-gic.h> 261c33be57SNicolas Pitre 271c33be57SNicolas Pitre #include <asm/smp_plat.h> 281c33be57SNicolas Pitre #include <asm/suspend.h> 291c33be57SNicolas Pitre #include <asm/mcpm.h> 301c33be57SNicolas Pitre #include <asm/bL_switcher.h> 311c33be57SNicolas Pitre 321c33be57SNicolas Pitre 331c33be57SNicolas Pitre /* 341c33be57SNicolas Pitre * Use our own MPIDR accessors as the generic ones in asm/cputype.h have 351c33be57SNicolas Pitre * __attribute_const__ and we don't want the compiler to assume any 361c33be57SNicolas Pitre * constness here as the value _does_ change along some code paths. 371c33be57SNicolas Pitre */ 381c33be57SNicolas Pitre 391c33be57SNicolas Pitre static int read_mpidr(void) 401c33be57SNicolas Pitre { 411c33be57SNicolas Pitre unsigned int id; 421c33be57SNicolas Pitre asm volatile ("mrc p15, 0, %0, c0, c0, 5" : "=r" (id)); 431c33be57SNicolas Pitre return id & MPIDR_HWID_BITMASK; 441c33be57SNicolas Pitre } 451c33be57SNicolas Pitre 461c33be57SNicolas Pitre /* 471c33be57SNicolas Pitre * bL switcher core code. 481c33be57SNicolas Pitre */ 491c33be57SNicolas Pitre 501c33be57SNicolas Pitre static void bL_do_switch(void *_unused) 511c33be57SNicolas Pitre { 521c33be57SNicolas Pitre unsigned mpidr, cpuid, clusterid, ob_cluster, ib_cluster; 531c33be57SNicolas Pitre 541c33be57SNicolas Pitre /* 551c33be57SNicolas Pitre * We now have a piece of stack borrowed from the init task's. 561c33be57SNicolas Pitre * Let's also switch to init_mm right away to match it. 571c33be57SNicolas Pitre */ 581c33be57SNicolas Pitre cpu_switch_mm(init_mm.pgd, &init_mm); 591c33be57SNicolas Pitre 601c33be57SNicolas Pitre pr_debug("%s\n", __func__); 611c33be57SNicolas Pitre 621c33be57SNicolas Pitre mpidr = read_mpidr(); 631c33be57SNicolas Pitre cpuid = MPIDR_AFFINITY_LEVEL(mpidr, 0); 641c33be57SNicolas Pitre clusterid = MPIDR_AFFINITY_LEVEL(mpidr, 1); 651c33be57SNicolas Pitre ob_cluster = clusterid; 661c33be57SNicolas Pitre ib_cluster = clusterid ^ 1; 671c33be57SNicolas Pitre 681c33be57SNicolas Pitre /* 691c33be57SNicolas Pitre * Our state has been saved at this point. Let's release our 701c33be57SNicolas Pitre * inbound CPU. 711c33be57SNicolas Pitre */ 721c33be57SNicolas Pitre mcpm_set_entry_vector(cpuid, ib_cluster, cpu_resume); 731c33be57SNicolas Pitre sev(); 741c33be57SNicolas Pitre 751c33be57SNicolas Pitre /* 761c33be57SNicolas Pitre * From this point, we must assume that our counterpart CPU might 771c33be57SNicolas Pitre * have taken over in its parallel world already, as if execution 781c33be57SNicolas Pitre * just returned from cpu_suspend(). It is therefore important to 791c33be57SNicolas Pitre * be very careful not to make any change the other guy is not 801c33be57SNicolas Pitre * expecting. This is why we need stack isolation. 811c33be57SNicolas Pitre * 821c33be57SNicolas Pitre * Fancy under cover tasks could be performed here. For now 831c33be57SNicolas Pitre * we have none. 841c33be57SNicolas Pitre */ 851c33be57SNicolas Pitre 861c33be57SNicolas Pitre /* Let's put ourself down. */ 871c33be57SNicolas Pitre mcpm_cpu_power_down(); 881c33be57SNicolas Pitre 891c33be57SNicolas Pitre /* should never get here */ 901c33be57SNicolas Pitre BUG(); 911c33be57SNicolas Pitre } 921c33be57SNicolas Pitre 931c33be57SNicolas Pitre /* 941c33be57SNicolas Pitre * Stack isolation. To ensure 'current' remains valid, we just borrow 951c33be57SNicolas Pitre * a slice of the init/idle task which should be fairly lightly used. 961c33be57SNicolas Pitre * The borrowed area starts just above the thread_info structure located 971c33be57SNicolas Pitre * at the very bottom of the stack, aligned to a cache line. 981c33be57SNicolas Pitre */ 991c33be57SNicolas Pitre #define STACK_SIZE 256 1001c33be57SNicolas Pitre extern void call_with_stack(void (*fn)(void *), void *arg, void *sp); 1011c33be57SNicolas Pitre static int bL_switchpoint(unsigned long _arg) 1021c33be57SNicolas Pitre { 1031c33be57SNicolas Pitre unsigned int mpidr = read_mpidr(); 1041c33be57SNicolas Pitre unsigned int cpuid = MPIDR_AFFINITY_LEVEL(mpidr, 0); 1051c33be57SNicolas Pitre unsigned int clusterid = MPIDR_AFFINITY_LEVEL(mpidr, 1); 1061c33be57SNicolas Pitre unsigned int cpu_index = cpuid + clusterid * MAX_CPUS_PER_CLUSTER; 1071c33be57SNicolas Pitre void *stack = &init_thread_info + 1; 1081c33be57SNicolas Pitre stack = PTR_ALIGN(stack, L1_CACHE_BYTES); 1091c33be57SNicolas Pitre stack += cpu_index * STACK_SIZE + STACK_SIZE; 1101c33be57SNicolas Pitre call_with_stack(bL_do_switch, (void *)_arg, stack); 1111c33be57SNicolas Pitre BUG(); 1121c33be57SNicolas Pitre } 1131c33be57SNicolas Pitre 1141c33be57SNicolas Pitre /* 1151c33be57SNicolas Pitre * Generic switcher interface 1161c33be57SNicolas Pitre */ 1171c33be57SNicolas Pitre 1181c33be57SNicolas Pitre /* 1191c33be57SNicolas Pitre * bL_switch_to - Switch to a specific cluster for the current CPU 1201c33be57SNicolas Pitre * @new_cluster_id: the ID of the cluster to switch to. 1211c33be57SNicolas Pitre * 1221c33be57SNicolas Pitre * This function must be called on the CPU to be switched. 1231c33be57SNicolas Pitre * Returns 0 on success, else a negative status code. 1241c33be57SNicolas Pitre */ 1251c33be57SNicolas Pitre static int bL_switch_to(unsigned int new_cluster_id) 1261c33be57SNicolas Pitre { 1271c33be57SNicolas Pitre unsigned int mpidr, cpuid, clusterid, ob_cluster, ib_cluster, this_cpu; 128*3f09d479SLorenzo Pieralisi struct tick_device *tdev; 129*3f09d479SLorenzo Pieralisi enum clock_event_mode tdev_mode; 1301c33be57SNicolas Pitre int ret; 1311c33be57SNicolas Pitre 1321c33be57SNicolas Pitre mpidr = read_mpidr(); 1331c33be57SNicolas Pitre cpuid = MPIDR_AFFINITY_LEVEL(mpidr, 0); 1341c33be57SNicolas Pitre clusterid = MPIDR_AFFINITY_LEVEL(mpidr, 1); 1351c33be57SNicolas Pitre ob_cluster = clusterid; 1361c33be57SNicolas Pitre ib_cluster = clusterid ^ 1; 1371c33be57SNicolas Pitre 1381c33be57SNicolas Pitre if (new_cluster_id == clusterid) 1391c33be57SNicolas Pitre return 0; 1401c33be57SNicolas Pitre 1411c33be57SNicolas Pitre pr_debug("before switch: CPU %d in cluster %d\n", cpuid, clusterid); 1421c33be57SNicolas Pitre 1431c33be57SNicolas Pitre /* Close the gate for our entry vectors */ 1441c33be57SNicolas Pitre mcpm_set_entry_vector(cpuid, ob_cluster, NULL); 1451c33be57SNicolas Pitre mcpm_set_entry_vector(cpuid, ib_cluster, NULL); 1461c33be57SNicolas Pitre 1471c33be57SNicolas Pitre /* 1481c33be57SNicolas Pitre * Let's wake up the inbound CPU now in case it requires some delay 1491c33be57SNicolas Pitre * to come online, but leave it gated in our entry vector code. 1501c33be57SNicolas Pitre */ 1511c33be57SNicolas Pitre ret = mcpm_cpu_power_up(cpuid, ib_cluster); 1521c33be57SNicolas Pitre if (ret) { 1531c33be57SNicolas Pitre pr_err("%s: mcpm_cpu_power_up() returned %d\n", __func__, ret); 1541c33be57SNicolas Pitre return ret; 1551c33be57SNicolas Pitre } 1561c33be57SNicolas Pitre 1571c33be57SNicolas Pitre /* 1581c33be57SNicolas Pitre * From this point we are entering the switch critical zone 1591c33be57SNicolas Pitre * and can't take any interrupts anymore. 1601c33be57SNicolas Pitre */ 1611c33be57SNicolas Pitre local_irq_disable(); 1621c33be57SNicolas Pitre local_fiq_disable(); 1631c33be57SNicolas Pitre 1641c33be57SNicolas Pitre this_cpu = smp_processor_id(); 1651c33be57SNicolas Pitre 1661c33be57SNicolas Pitre /* redirect GIC's SGIs to our counterpart */ 1671c33be57SNicolas Pitre gic_migrate_target(cpuid + ib_cluster*4); 1681c33be57SNicolas Pitre 1691c33be57SNicolas Pitre /* 1701c33be57SNicolas Pitre * Raise a SGI on the inbound CPU to make sure it doesn't stall 1711c33be57SNicolas Pitre * in a possible WFI, such as in mcpm_power_down(). 1721c33be57SNicolas Pitre */ 1731c33be57SNicolas Pitre arch_send_wakeup_ipi_mask(cpumask_of(this_cpu)); 1741c33be57SNicolas Pitre 175*3f09d479SLorenzo Pieralisi tdev = tick_get_device(this_cpu); 176*3f09d479SLorenzo Pieralisi if (tdev && !cpumask_equal(tdev->evtdev->cpumask, cpumask_of(this_cpu))) 177*3f09d479SLorenzo Pieralisi tdev = NULL; 178*3f09d479SLorenzo Pieralisi if (tdev) { 179*3f09d479SLorenzo Pieralisi tdev_mode = tdev->evtdev->mode; 180*3f09d479SLorenzo Pieralisi clockevents_set_mode(tdev->evtdev, CLOCK_EVT_MODE_SHUTDOWN); 181*3f09d479SLorenzo Pieralisi } 182*3f09d479SLorenzo Pieralisi 1831c33be57SNicolas Pitre ret = cpu_pm_enter(); 1841c33be57SNicolas Pitre 1851c33be57SNicolas Pitre /* we can not tolerate errors at this point */ 1861c33be57SNicolas Pitre if (ret) 1871c33be57SNicolas Pitre panic("%s: cpu_pm_enter() returned %d\n", __func__, ret); 1881c33be57SNicolas Pitre 1891c33be57SNicolas Pitre /* Flip the cluster in the CPU logical map for this CPU. */ 1901c33be57SNicolas Pitre cpu_logical_map(this_cpu) ^= (1 << 8); 1911c33be57SNicolas Pitre 1921c33be57SNicolas Pitre /* Let's do the actual CPU switch. */ 1931c33be57SNicolas Pitre ret = cpu_suspend(0, bL_switchpoint); 1941c33be57SNicolas Pitre if (ret > 0) 1951c33be57SNicolas Pitre panic("%s: cpu_suspend() returned %d\n", __func__, ret); 1961c33be57SNicolas Pitre 1971c33be57SNicolas Pitre /* We are executing on the inbound CPU at this point */ 1981c33be57SNicolas Pitre mpidr = read_mpidr(); 1991c33be57SNicolas Pitre cpuid = MPIDR_AFFINITY_LEVEL(mpidr, 0); 2001c33be57SNicolas Pitre clusterid = MPIDR_AFFINITY_LEVEL(mpidr, 1); 2011c33be57SNicolas Pitre pr_debug("after switch: CPU %d in cluster %d\n", cpuid, clusterid); 2021c33be57SNicolas Pitre BUG_ON(clusterid != ib_cluster); 2031c33be57SNicolas Pitre 2041c33be57SNicolas Pitre mcpm_cpu_powered_up(); 2051c33be57SNicolas Pitre 2061c33be57SNicolas Pitre ret = cpu_pm_exit(); 2071c33be57SNicolas Pitre 208*3f09d479SLorenzo Pieralisi if (tdev) { 209*3f09d479SLorenzo Pieralisi clockevents_set_mode(tdev->evtdev, tdev_mode); 210*3f09d479SLorenzo Pieralisi clockevents_program_event(tdev->evtdev, 211*3f09d479SLorenzo Pieralisi tdev->evtdev->next_event, 1); 212*3f09d479SLorenzo Pieralisi } 213*3f09d479SLorenzo Pieralisi 2141c33be57SNicolas Pitre local_fiq_enable(); 2151c33be57SNicolas Pitre local_irq_enable(); 2161c33be57SNicolas Pitre 2171c33be57SNicolas Pitre if (ret) 2181c33be57SNicolas Pitre pr_err("%s exiting with error %d\n", __func__, ret); 2191c33be57SNicolas Pitre return ret; 2201c33be57SNicolas Pitre } 2211c33be57SNicolas Pitre 2221c33be57SNicolas Pitre struct switch_args { 2231c33be57SNicolas Pitre unsigned int cluster; 2241c33be57SNicolas Pitre struct work_struct work; 2251c33be57SNicolas Pitre }; 2261c33be57SNicolas Pitre 2271c33be57SNicolas Pitre static void __bL_switch_to(struct work_struct *work) 2281c33be57SNicolas Pitre { 2291c33be57SNicolas Pitre struct switch_args *args = container_of(work, struct switch_args, work); 2301c33be57SNicolas Pitre bL_switch_to(args->cluster); 2311c33be57SNicolas Pitre } 2321c33be57SNicolas Pitre 2331c33be57SNicolas Pitre /* 2341c33be57SNicolas Pitre * bL_switch_request - Switch to a specific cluster for the given CPU 2351c33be57SNicolas Pitre * 2361c33be57SNicolas Pitre * @cpu: the CPU to switch 2371c33be57SNicolas Pitre * @new_cluster_id: the ID of the cluster to switch to. 2381c33be57SNicolas Pitre * 2391c33be57SNicolas Pitre * This function causes a cluster switch on the given CPU. If the given 2401c33be57SNicolas Pitre * CPU is the same as the calling CPU then the switch happens right away. 2411c33be57SNicolas Pitre * Otherwise the request is put on a work queue to be scheduled on the 2421c33be57SNicolas Pitre * remote CPU. 2431c33be57SNicolas Pitre */ 2441c33be57SNicolas Pitre void bL_switch_request(unsigned int cpu, unsigned int new_cluster_id) 2451c33be57SNicolas Pitre { 2461c33be57SNicolas Pitre unsigned int this_cpu = get_cpu(); 2471c33be57SNicolas Pitre struct switch_args args; 2481c33be57SNicolas Pitre 2491c33be57SNicolas Pitre if (cpu == this_cpu) { 2501c33be57SNicolas Pitre bL_switch_to(new_cluster_id); 2511c33be57SNicolas Pitre put_cpu(); 2521c33be57SNicolas Pitre return; 2531c33be57SNicolas Pitre } 2541c33be57SNicolas Pitre put_cpu(); 2551c33be57SNicolas Pitre 2561c33be57SNicolas Pitre args.cluster = new_cluster_id; 2571c33be57SNicolas Pitre INIT_WORK_ONSTACK(&args.work, __bL_switch_to); 2581c33be57SNicolas Pitre schedule_work_on(cpu, &args.work); 2591c33be57SNicolas Pitre flush_work(&args.work); 2601c33be57SNicolas Pitre } 2611c33be57SNicolas Pitre EXPORT_SYMBOL_GPL(bL_switch_request); 262