1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 4*724ba675SRob Herring */ 5*724ba675SRob Herring 6*724ba675SRob Herring&twl { 7*724ba675SRob Herring /* 8*724ba675SRob Herring * On most OMAP4 platforms, the twl6030 IRQ line is connected 9*724ba675SRob Herring * to the SYS_NIRQ1 line on OMAP and the twl6030 MSECURE line is 10*724ba675SRob Herring * connected to the fref_clk0_out.sys_drm_msecure line. 11*724ba675SRob Herring * Therefore, configure the defaults for the SYS_NIRQ1 and 12*724ba675SRob Herring * fref_clk0_out.sys_drm_msecure pins here. 13*724ba675SRob Herring */ 14*724ba675SRob Herring pinctrl-names = "default"; 15*724ba675SRob Herring pinctrl-0 = < 16*724ba675SRob Herring &twl6030_pins 17*724ba675SRob Herring &twl6030_wkup_pins 18*724ba675SRob Herring >; 19*724ba675SRob Herring}; 20*724ba675SRob Herring 21*724ba675SRob Herring&omap4_pmx_wkup { 22*724ba675SRob Herring twl6030_wkup_pins: twl6030-wkup-pins { 23*724ba675SRob Herring pinctrl-single,pins = < 24*724ba675SRob Herring OMAP4_IOPAD(0x054, PIN_OUTPUT | MUX_MODE2) /* fref_clk0_out.sys_drm_msecure */ 25*724ba675SRob Herring >; 26*724ba675SRob Herring }; 27*724ba675SRob Herring}; 28*724ba675SRob Herring 29*724ba675SRob Herring&omap4_pmx_core { 30*724ba675SRob Herring twl6030_pins: twl6030-pins { 31*724ba675SRob Herring pinctrl-single,pins = < 32*724ba675SRob Herring OMAP4_IOPAD(0x19e, WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1.sys_nirq1 */ 33*724ba675SRob Herring >; 34*724ba675SRob Herring }; 35*724ba675SRob Herring}; 36