1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 2724ba675SRob Herring/* 3724ba675SRob Herring * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 4724ba675SRob Herring * 5724ba675SRob Herring * Author: Robert Nelson <robertcnelson@gmail.com> 6724ba675SRob Herring */ 7724ba675SRob Herring 8724ba675SRob Herring/ { 9724ba675SRob Herring cpus { 10724ba675SRob Herring cpu@0 { 11724ba675SRob Herring cpu0-supply = <&dcdc2_reg>; 12724ba675SRob Herring }; 13724ba675SRob Herring }; 14724ba675SRob Herring 15724ba675SRob Herring memory@80000000 { 16724ba675SRob Herring device_type = "memory"; 17724ba675SRob Herring reg = <0x80000000 0x20000000>; /* 512 MB */ 18724ba675SRob Herring }; 19724ba675SRob Herring}; 20724ba675SRob Herring 21724ba675SRob Herring&cpu0_opp_table { 22724ba675SRob Herring /* 23724ba675SRob Herring * Octavo Systems: 24724ba675SRob Herring * The EFUSE_SMA register is not programmed for any of the AM335x wafers 25724ba675SRob Herring * we get and we are not programming them during our production test. 26724ba675SRob Herring * Therefore, from a DEVICE_ID revision point of view, the silicon looks 27724ba675SRob Herring * like it is Revision 2.1. However, from an EFUSE_SMA point of view for 28724ba675SRob Herring * the HW OPP table, the silicon looks like it is Revision 1.0 (ie the 29724ba675SRob Herring * EFUSE_SMA register reads as all zeros). 30724ba675SRob Herring */ 31*5821d766SNishanth Menon opp-1000000000 { 32*5821d766SNishanth Menon /* OPP Nitro */ 33724ba675SRob Herring opp-supported-hw = <0x06 0x0100>; 34724ba675SRob Herring }; 35724ba675SRob Herring}; 36724ba675SRob Herring 37724ba675SRob Herring&am33xx_pinmux { 38724ba675SRob Herring i2c0_pins: pinmux-i2c0-pins { 39724ba675SRob Herring pinctrl-single,pins = < 40724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0) 41724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0) 42724ba675SRob Herring >; 43724ba675SRob Herring }; 44724ba675SRob Herring}; 45724ba675SRob Herring 46724ba675SRob Herring&i2c0 { 47724ba675SRob Herring pinctrl-names = "default"; 48724ba675SRob Herring pinctrl-0 = <&i2c0_pins>; 49724ba675SRob Herring 50724ba675SRob Herring status = "okay"; 51724ba675SRob Herring clock-frequency = <400000>; 52724ba675SRob Herring 53724ba675SRob Herring tps: tps@24 { 54724ba675SRob Herring reg = <0x24>; 55724ba675SRob Herring }; 56724ba675SRob Herring}; 57724ba675SRob Herring 58724ba675SRob Herring/include/ "../../tps65217.dtsi" 59724ba675SRob Herring 60724ba675SRob Herring&tps { 61724ba675SRob Herring interrupts = <7>; /* NMI */ 62724ba675SRob Herring interrupt-parent = <&intc>; 63724ba675SRob Herring 64724ba675SRob Herring ti,pmic-shutdown-controller; 65724ba675SRob Herring 66724ba675SRob Herring pwrbutton { 67724ba675SRob Herring interrupts = <2>; 68724ba675SRob Herring status = "okay"; 69724ba675SRob Herring }; 70724ba675SRob Herring 71724ba675SRob Herring regulators { 72724ba675SRob Herring dcdc1_reg: regulator@0 { 73724ba675SRob Herring regulator-name = "vdds_dpr"; 74724ba675SRob Herring regulator-always-on; 75724ba675SRob Herring }; 76724ba675SRob Herring 77724ba675SRob Herring dcdc2_reg: regulator@1 { 78724ba675SRob Herring /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ 79724ba675SRob Herring regulator-name = "vdd_mpu"; 80724ba675SRob Herring regulator-min-microvolt = <925000>; 81724ba675SRob Herring regulator-max-microvolt = <1351500>; 82724ba675SRob Herring regulator-boot-on; 83724ba675SRob Herring regulator-always-on; 84724ba675SRob Herring }; 85724ba675SRob Herring 86724ba675SRob Herring dcdc3_reg: regulator@2 { 87724ba675SRob Herring /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ 88724ba675SRob Herring regulator-name = "vdd_core"; 89724ba675SRob Herring regulator-min-microvolt = <925000>; 90724ba675SRob Herring regulator-max-microvolt = <1150000>; 91724ba675SRob Herring regulator-boot-on; 92724ba675SRob Herring regulator-always-on; 93724ba675SRob Herring }; 94724ba675SRob Herring 95724ba675SRob Herring ldo1_reg: regulator@3 { 96724ba675SRob Herring regulator-name = "vio,vrtc,vdds"; 97724ba675SRob Herring regulator-always-on; 98724ba675SRob Herring }; 99724ba675SRob Herring 100724ba675SRob Herring ldo2_reg: regulator@4 { 101724ba675SRob Herring regulator-name = "vdd_3v3aux"; 102724ba675SRob Herring regulator-always-on; 103724ba675SRob Herring }; 104724ba675SRob Herring 105724ba675SRob Herring ldo3_reg: regulator@5 { 106724ba675SRob Herring regulator-name = "vdd_1v8"; 107724ba675SRob Herring regulator-min-microvolt = <1800000>; 108724ba675SRob Herring regulator-max-microvolt = <1800000>; 109724ba675SRob Herring regulator-always-on; 110724ba675SRob Herring }; 111724ba675SRob Herring 112724ba675SRob Herring ldo4_reg: regulator@6 { 113724ba675SRob Herring regulator-name = "vdd_3v3a"; 114724ba675SRob Herring regulator-always-on; 115724ba675SRob Herring }; 116724ba675SRob Herring }; 117724ba675SRob Herring}; 118724ba675SRob Herring 119724ba675SRob Herring&aes { 120724ba675SRob Herring status = "okay"; 121724ba675SRob Herring}; 122724ba675SRob Herring 123724ba675SRob Herring&sham { 124724ba675SRob Herring status = "okay"; 125724ba675SRob Herring}; 126