xref: /openbmc/linux/arch/arm/boot/dts/ti/omap/am335x-icev2.dts (revision 2612e3bbc0386368a850140a6c9b990cd496a5ec)
1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
4*724ba675SRob Herring */
5*724ba675SRob Herring
6*724ba675SRob Herring/*
7*724ba675SRob Herring * AM335x ICE V2 board
8*724ba675SRob Herring * http://www.ti.com/tool/tmdsice3359
9*724ba675SRob Herring */
10*724ba675SRob Herring
11*724ba675SRob Herring/dts-v1/;
12*724ba675SRob Herring
13*724ba675SRob Herring#include "am33xx.dtsi"
14*724ba675SRob Herring
15*724ba675SRob Herring/ {
16*724ba675SRob Herring	model = "TI AM3359 ICE-V2";
17*724ba675SRob Herring	compatible = "ti,am3359-icev2", "ti,am33xx";
18*724ba675SRob Herring
19*724ba675SRob Herring	memory@80000000 {
20*724ba675SRob Herring		device_type = "memory";
21*724ba675SRob Herring		reg = <0x80000000 0x10000000>; /* 256 MB */
22*724ba675SRob Herring	};
23*724ba675SRob Herring
24*724ba675SRob Herring	chosen {
25*724ba675SRob Herring		stdout-path = &uart3;
26*724ba675SRob Herring	};
27*724ba675SRob Herring
28*724ba675SRob Herring	vbat: fixedregulator0 {
29*724ba675SRob Herring		compatible = "regulator-fixed";
30*724ba675SRob Herring		regulator-name = "vbat";
31*724ba675SRob Herring		regulator-min-microvolt = <5000000>;
32*724ba675SRob Herring		regulator-max-microvolt = <5000000>;
33*724ba675SRob Herring		regulator-boot-on;
34*724ba675SRob Herring	};
35*724ba675SRob Herring
36*724ba675SRob Herring	vtt_fixed: fixedregulator1 {
37*724ba675SRob Herring		compatible = "regulator-fixed";
38*724ba675SRob Herring		regulator-name = "vtt";
39*724ba675SRob Herring		regulator-min-microvolt = <1500000>;
40*724ba675SRob Herring		regulator-max-microvolt = <1500000>;
41*724ba675SRob Herring		gpio = <&gpio0 18 GPIO_ACTIVE_HIGH>;
42*724ba675SRob Herring		regulator-always-on;
43*724ba675SRob Herring		regulator-boot-on;
44*724ba675SRob Herring		enable-active-high;
45*724ba675SRob Herring	};
46*724ba675SRob Herring
47*724ba675SRob Herring	leds-iio {
48*724ba675SRob Herring		status = "disabled";
49*724ba675SRob Herring		compatible = "gpio-leds";
50*724ba675SRob Herring		led-out0 {
51*724ba675SRob Herring			label = "out0";
52*724ba675SRob Herring			gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
53*724ba675SRob Herring			default-state = "off";
54*724ba675SRob Herring		};
55*724ba675SRob Herring
56*724ba675SRob Herring		led-out1 {
57*724ba675SRob Herring			label = "out1";
58*724ba675SRob Herring			gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>;
59*724ba675SRob Herring			default-state = "off";
60*724ba675SRob Herring		};
61*724ba675SRob Herring
62*724ba675SRob Herring		led-out2 {
63*724ba675SRob Herring			label = "out2";
64*724ba675SRob Herring			gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>;
65*724ba675SRob Herring			default-state = "off";
66*724ba675SRob Herring		};
67*724ba675SRob Herring
68*724ba675SRob Herring		led-out3 {
69*724ba675SRob Herring			label = "out3";
70*724ba675SRob Herring			gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>;
71*724ba675SRob Herring			default-state = "off";
72*724ba675SRob Herring		};
73*724ba675SRob Herring
74*724ba675SRob Herring		led-out4 {
75*724ba675SRob Herring			label = "out4";
76*724ba675SRob Herring			gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>;
77*724ba675SRob Herring			default-state = "off";
78*724ba675SRob Herring		};
79*724ba675SRob Herring
80*724ba675SRob Herring		led-out5 {
81*724ba675SRob Herring			label = "out5";
82*724ba675SRob Herring			gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>;
83*724ba675SRob Herring			default-state = "off";
84*724ba675SRob Herring		};
85*724ba675SRob Herring
86*724ba675SRob Herring		led-out6 {
87*724ba675SRob Herring			label = "out6";
88*724ba675SRob Herring			gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>;
89*724ba675SRob Herring			default-state = "off";
90*724ba675SRob Herring		};
91*724ba675SRob Herring
92*724ba675SRob Herring		led-out7 {
93*724ba675SRob Herring			label = "out7";
94*724ba675SRob Herring			gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>;
95*724ba675SRob Herring			default-state = "off";
96*724ba675SRob Herring		};
97*724ba675SRob Herring	};
98*724ba675SRob Herring
99*724ba675SRob Herring	/* Tricolor status LEDs */
100*724ba675SRob Herring	leds1 {
101*724ba675SRob Herring		compatible = "gpio-leds";
102*724ba675SRob Herring		pinctrl-names = "default";
103*724ba675SRob Herring		pinctrl-0 = <&user_leds>;
104*724ba675SRob Herring
105*724ba675SRob Herring		led0 {
106*724ba675SRob Herring			label = "status0:red:cpu0";
107*724ba675SRob Herring			gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
108*724ba675SRob Herring			default-state = "off";
109*724ba675SRob Herring			linux,default-trigger = "cpu0";
110*724ba675SRob Herring		};
111*724ba675SRob Herring
112*724ba675SRob Herring		led1 {
113*724ba675SRob Herring			label = "status0:green:usr";
114*724ba675SRob Herring			gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
115*724ba675SRob Herring			default-state = "off";
116*724ba675SRob Herring		};
117*724ba675SRob Herring
118*724ba675SRob Herring		led2 {
119*724ba675SRob Herring			label = "status0:yellow:usr";
120*724ba675SRob Herring			gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>;
121*724ba675SRob Herring			default-state = "off";
122*724ba675SRob Herring		};
123*724ba675SRob Herring
124*724ba675SRob Herring		led3 {
125*724ba675SRob Herring			label = "status1:red:mmc0";
126*724ba675SRob Herring			gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
127*724ba675SRob Herring			default-state = "off";
128*724ba675SRob Herring			linux,default-trigger = "mmc0";
129*724ba675SRob Herring		};
130*724ba675SRob Herring
131*724ba675SRob Herring		led4 {
132*724ba675SRob Herring			label = "status1:green:usr";
133*724ba675SRob Herring			gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
134*724ba675SRob Herring			default-state = "off";
135*724ba675SRob Herring		};
136*724ba675SRob Herring
137*724ba675SRob Herring		led5 {
138*724ba675SRob Herring			label = "status1:yellow:usr";
139*724ba675SRob Herring			gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
140*724ba675SRob Herring			default-state = "off";
141*724ba675SRob Herring		};
142*724ba675SRob Herring	};
143*724ba675SRob Herring	gpio-decoder {
144*724ba675SRob Herring		compatible = "gpio-decoder";
145*724ba675SRob Herring		gpios = <&pca9536 3 GPIO_ACTIVE_HIGH>,
146*724ba675SRob Herring			<&pca9536 2 GPIO_ACTIVE_HIGH>,
147*724ba675SRob Herring			<&pca9536 1 GPIO_ACTIVE_HIGH>,
148*724ba675SRob Herring			<&pca9536 0 GPIO_ACTIVE_HIGH>;
149*724ba675SRob Herring		linux,axis = <0>; /* ABS_X */
150*724ba675SRob Herring		decoder-max-value = <9>;
151*724ba675SRob Herring	};
152*724ba675SRob Herring};
153*724ba675SRob Herring
154*724ba675SRob Herring&am33xx_pinmux {
155*724ba675SRob Herring	user_leds: user-leds-pins {
156*724ba675SRob Herring		pinctrl-single,pins = <
157*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT, MUX_MODE7) /* (J18) gmii1_txd3.gpio0[16] */
158*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT, MUX_MODE7) /* (K15) gmii1_txd2.gpio0[17] */
159*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT, MUX_MODE7) /* (A15) xdma_event_intr0.gpio0[19] */
160*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT, MUX_MODE7) /* (D14) xdma_event_intr1.gpio0[20] */
161*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_OUTPUT, MUX_MODE7) /* (U9) gpmc_csn1.gpio1[30] */
162*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT, MUX_MODE7) /* (K18) gmii1_txclk.gpio3[9] */
163*724ba675SRob Herring		>;
164*724ba675SRob Herring	};
165*724ba675SRob Herring
166*724ba675SRob Herring	mmc0_pins_default: mmc0-default-pins {
167*724ba675SRob Herring		pinctrl-single,pins = <
168*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
169*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
170*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
171*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
172*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
173*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
174*724ba675SRob Herring		>;
175*724ba675SRob Herring	};
176*724ba675SRob Herring
177*724ba675SRob Herring	i2c0_pins_default: i2c0-default-pins {
178*724ba675SRob Herring		pinctrl-single,pins = <
179*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT, MUX_MODE0)
180*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT, MUX_MODE0)
181*724ba675SRob Herring		>;
182*724ba675SRob Herring	};
183*724ba675SRob Herring
184*724ba675SRob Herring	spi0_pins_default: spi0-default-pins {
185*724ba675SRob Herring		pinctrl-single,pins = <
186*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0)
187*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0)
188*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0)
189*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0)
190*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT_PULLUP, MUX_MODE0)
191*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLUP, MUX_MODE7) /* (B12) mcasp0_aclkr.gpio3[18] */
192*724ba675SRob Herring		>;
193*724ba675SRob Herring	};
194*724ba675SRob Herring
195*724ba675SRob Herring	uart3_pins_default: uart3-default-pins {
196*724ba675SRob Herring		pinctrl-single,pins = <
197*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE1) /* (L17) gmii1_rxd3.uart3_rxd */
198*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_OUTPUT_PULLUP, MUX_MODE1) /* (L16) gmii1_rxd2.uart3_txd */
199*724ba675SRob Herring		>;
200*724ba675SRob Herring	};
201*724ba675SRob Herring
202*724ba675SRob Herring	cpsw_default: cpsw-default-pins {
203*724ba675SRob Herring		pinctrl-single,pins = <
204*724ba675SRob Herring			/* Slave 1, RMII mode */
205*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLUP, MUX_MODE1)	/* mii1_crs.rmii1_crs_dv */
206*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
207*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE1)
208*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE1)
209*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE1)	/* mii1_rxerr.rmii1_rxerr */
210*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE1)	/* mii1_txd0.rmii1_txd0 */
211*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE1)	/* mii1_txd1.rmii1_txd1 */
212*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE1)	/* mii1_txen.rmii1_txen */
213*724ba675SRob Herring			/* Slave 2, RMII mode */
214*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_wait0.rmii2_crs_dv */
215*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLUP, MUX_MODE1)	/* mii1_col.rmii2_refclk */
216*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_a11.rmii2_rxd0 */
217*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_a10.rmii2_rxd1 */
218*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_wpn.rmii2_rxerr */
219*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE3)	/* gpmc_a5.rmii2_txd0 */
220*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE3)	/* gpmc_a4.rmii2_txd1 */
221*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)	/* gpmc_a0.rmii2_txen */
222*724ba675SRob Herring		>;
223*724ba675SRob Herring	};
224*724ba675SRob Herring
225*724ba675SRob Herring	cpsw_sleep: cpsw-sleep-pins {
226*724ba675SRob Herring		pinctrl-single,pins = <
227*724ba675SRob Herring			/* Slave 1 reset value */
228*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7)
229*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
230*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
231*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
232*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
233*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
234*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
235*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
236*724ba675SRob Herring
237*724ba675SRob Herring			/* Slave 2 reset value */
238*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLDOWN, MUX_MODE7)
239*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE7)
240*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE7)
241*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE7)
242*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLDOWN, MUX_MODE7)
243*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_INPUT_PULLDOWN, MUX_MODE7)
244*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_INPUT_PULLDOWN, MUX_MODE7)
245*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT_PULLDOWN, MUX_MODE7)
246*724ba675SRob Herring		>;
247*724ba675SRob Herring	};
248*724ba675SRob Herring
249*724ba675SRob Herring	davinci_mdio_default: davinci-mdio-default-pins {
250*724ba675SRob Herring		pinctrl-single,pins = <
251*724ba675SRob Herring			/* MDIO */
252*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
253*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
254*724ba675SRob Herring		>;
255*724ba675SRob Herring	};
256*724ba675SRob Herring
257*724ba675SRob Herring	davinci_mdio_sleep: davinci-mdio-sleep-pins {
258*724ba675SRob Herring		pinctrl-single,pins = <
259*724ba675SRob Herring			/* MDIO reset value */
260*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
261*724ba675SRob Herring			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
262*724ba675SRob Herring		>;
263*724ba675SRob Herring	};
264*724ba675SRob Herring};
265*724ba675SRob Herring
266*724ba675SRob Herring&i2c0 {
267*724ba675SRob Herring	pinctrl-names = "default";
268*724ba675SRob Herring	pinctrl-0 = <&i2c0_pins_default>;
269*724ba675SRob Herring
270*724ba675SRob Herring	status = "okay";
271*724ba675SRob Herring	clock-frequency = <400000>;
272*724ba675SRob Herring
273*724ba675SRob Herring	tps: power-controller@2d {
274*724ba675SRob Herring		reg = <0x2d>;
275*724ba675SRob Herring	};
276*724ba675SRob Herring
277*724ba675SRob Herring	tpic2810: gpio@60 {
278*724ba675SRob Herring		compatible = "ti,tpic2810";
279*724ba675SRob Herring		reg = <0x60>;
280*724ba675SRob Herring		gpio-controller;
281*724ba675SRob Herring		#gpio-cells = <2>;
282*724ba675SRob Herring	};
283*724ba675SRob Herring
284*724ba675SRob Herring	pca9536: gpio@41 {
285*724ba675SRob Herring		compatible = "ti,pca9536";
286*724ba675SRob Herring		reg = <0x41>;
287*724ba675SRob Herring		gpio-controller;
288*724ba675SRob Herring		#gpio-cells = <2>;
289*724ba675SRob Herring	};
290*724ba675SRob Herring
291*724ba675SRob Herring	/* osd9616p0899-10 */
292*724ba675SRob Herring	display@3c {
293*724ba675SRob Herring		compatible = "solomon,ssd1306fb-i2c";
294*724ba675SRob Herring		reg = <0x3c>;
295*724ba675SRob Herring		solomon,height = <16>;
296*724ba675SRob Herring		solomon,width = <96>;
297*724ba675SRob Herring		solomon,com-seq;
298*724ba675SRob Herring		solomon,com-invdir;
299*724ba675SRob Herring		solomon,page-offset = <0>;
300*724ba675SRob Herring		solomon,prechargep1 = <2>;
301*724ba675SRob Herring		solomon,prechargep2 = <13>;
302*724ba675SRob Herring	};
303*724ba675SRob Herring};
304*724ba675SRob Herring
305*724ba675SRob Herring&spi0 {
306*724ba675SRob Herring	status = "okay";
307*724ba675SRob Herring	pinctrl-names = "default";
308*724ba675SRob Herring	pinctrl-0 = <&spi0_pins_default>;
309*724ba675SRob Herring
310*724ba675SRob Herring	sn65hvs882@1 {
311*724ba675SRob Herring		compatible = "pisosr-gpio";
312*724ba675SRob Herring		gpio-controller;
313*724ba675SRob Herring		#gpio-cells = <2>;
314*724ba675SRob Herring
315*724ba675SRob Herring		load-gpios = <&gpio3 18 GPIO_ACTIVE_LOW>;
316*724ba675SRob Herring
317*724ba675SRob Herring		reg = <1>;
318*724ba675SRob Herring		spi-max-frequency = <1000000>;
319*724ba675SRob Herring		spi-cpol;
320*724ba675SRob Herring	};
321*724ba675SRob Herring
322*724ba675SRob Herring	spi_nor: flash@0 {
323*724ba675SRob Herring		#address-cells = <1>;
324*724ba675SRob Herring		#size-cells = <1>;
325*724ba675SRob Herring		compatible = "winbond,w25q64", "jedec,spi-nor";
326*724ba675SRob Herring		spi-max-frequency = <80000000>;
327*724ba675SRob Herring		m25p,fast-read;
328*724ba675SRob Herring		reg = <0>;
329*724ba675SRob Herring
330*724ba675SRob Herring		partition@0 {
331*724ba675SRob Herring			label = "u-boot-spl";
332*724ba675SRob Herring			reg = <0x0 0x80000>;
333*724ba675SRob Herring			read-only;
334*724ba675SRob Herring		};
335*724ba675SRob Herring
336*724ba675SRob Herring		partition@1 {
337*724ba675SRob Herring			label = "u-boot";
338*724ba675SRob Herring			reg = <0x80000 0x100000>;
339*724ba675SRob Herring			read-only;
340*724ba675SRob Herring		};
341*724ba675SRob Herring
342*724ba675SRob Herring		partition@2 {
343*724ba675SRob Herring			label = "u-boot-env";
344*724ba675SRob Herring			reg = <0x180000 0x20000>;
345*724ba675SRob Herring			read-only;
346*724ba675SRob Herring		};
347*724ba675SRob Herring
348*724ba675SRob Herring		partition@3 {
349*724ba675SRob Herring			label = "misc";
350*724ba675SRob Herring			reg = <0x1A0000 0x660000>;
351*724ba675SRob Herring		};
352*724ba675SRob Herring	};
353*724ba675SRob Herring
354*724ba675SRob Herring};
355*724ba675SRob Herring
356*724ba675SRob Herring&tscadc {
357*724ba675SRob Herring	status = "okay";
358*724ba675SRob Herring	adc {
359*724ba675SRob Herring		ti,adc-channels = <1 2 3 4 5 6 7>;
360*724ba675SRob Herring	};
361*724ba675SRob Herring};
362*724ba675SRob Herring
363*724ba675SRob Herring#include "../../tps65910.dtsi"
364*724ba675SRob Herring
365*724ba675SRob Herring&tps {
366*724ba675SRob Herring	vcc1-supply = <&vbat>;
367*724ba675SRob Herring	vcc2-supply = <&vbat>;
368*724ba675SRob Herring	vcc3-supply = <&vbat>;
369*724ba675SRob Herring	vcc4-supply = <&vbat>;
370*724ba675SRob Herring	vcc5-supply = <&vbat>;
371*724ba675SRob Herring	vcc6-supply = <&vbat>;
372*724ba675SRob Herring	vcc7-supply = <&vbat>;
373*724ba675SRob Herring	vccio-supply = <&vbat>;
374*724ba675SRob Herring
375*724ba675SRob Herring	regulators {
376*724ba675SRob Herring		vrtc_reg: regulator@0 {
377*724ba675SRob Herring			regulator-always-on;
378*724ba675SRob Herring		};
379*724ba675SRob Herring
380*724ba675SRob Herring		vio_reg: regulator@1 {
381*724ba675SRob Herring			regulator-always-on;
382*724ba675SRob Herring		};
383*724ba675SRob Herring
384*724ba675SRob Herring		vdd1_reg: regulator@2 {
385*724ba675SRob Herring			regulator-name = "vdd_mpu";
386*724ba675SRob Herring			regulator-min-microvolt = <912500>;
387*724ba675SRob Herring			regulator-max-microvolt = <1326000>;
388*724ba675SRob Herring			regulator-boot-on;
389*724ba675SRob Herring			regulator-always-on;
390*724ba675SRob Herring		};
391*724ba675SRob Herring
392*724ba675SRob Herring		vdd2_reg: regulator@3 {
393*724ba675SRob Herring			regulator-name = "vdd_core";
394*724ba675SRob Herring			regulator-min-microvolt = <912500>;
395*724ba675SRob Herring			regulator-max-microvolt = <1144000>;
396*724ba675SRob Herring			regulator-boot-on;
397*724ba675SRob Herring			regulator-always-on;
398*724ba675SRob Herring		};
399*724ba675SRob Herring
400*724ba675SRob Herring		vdd3_reg: regulator@4 {
401*724ba675SRob Herring			regulator-always-on;
402*724ba675SRob Herring		};
403*724ba675SRob Herring
404*724ba675SRob Herring		vdig1_reg: regulator@5 {
405*724ba675SRob Herring			regulator-always-on;
406*724ba675SRob Herring		};
407*724ba675SRob Herring
408*724ba675SRob Herring		vdig2_reg: regulator@6 {
409*724ba675SRob Herring			regulator-always-on;
410*724ba675SRob Herring		};
411*724ba675SRob Herring
412*724ba675SRob Herring		vpll_reg: regulator@7 {
413*724ba675SRob Herring			regulator-always-on;
414*724ba675SRob Herring		};
415*724ba675SRob Herring
416*724ba675SRob Herring		vdac_reg: regulator@8 {
417*724ba675SRob Herring			regulator-always-on;
418*724ba675SRob Herring		};
419*724ba675SRob Herring
420*724ba675SRob Herring		vaux1_reg: regulator@9 {
421*724ba675SRob Herring			regulator-always-on;
422*724ba675SRob Herring		};
423*724ba675SRob Herring
424*724ba675SRob Herring		vaux2_reg: regulator@10 {
425*724ba675SRob Herring			regulator-always-on;
426*724ba675SRob Herring		};
427*724ba675SRob Herring
428*724ba675SRob Herring		vaux33_reg: regulator@11 {
429*724ba675SRob Herring			regulator-always-on;
430*724ba675SRob Herring		};
431*724ba675SRob Herring
432*724ba675SRob Herring		vmmc_reg: regulator@12 {
433*724ba675SRob Herring			regulator-min-microvolt = <1800000>;
434*724ba675SRob Herring			regulator-max-microvolt = <3300000>;
435*724ba675SRob Herring			regulator-always-on;
436*724ba675SRob Herring		};
437*724ba675SRob Herring	};
438*724ba675SRob Herring};
439*724ba675SRob Herring
440*724ba675SRob Herring&mmc1 {
441*724ba675SRob Herring	status = "okay";
442*724ba675SRob Herring	vmmc-supply = <&vmmc_reg>;
443*724ba675SRob Herring	bus-width = <4>;
444*724ba675SRob Herring	pinctrl-names = "default";
445*724ba675SRob Herring	pinctrl-0 = <&mmc0_pins_default>;
446*724ba675SRob Herring};
447*724ba675SRob Herring
448*724ba675SRob Herring&gpio0_target {
449*724ba675SRob Herring	/* Do not idle the GPIO used for holding the VTT regulator */
450*724ba675SRob Herring	ti,no-reset-on-init;
451*724ba675SRob Herring	ti,no-idle-on-init;
452*724ba675SRob Herring};
453*724ba675SRob Herring
454*724ba675SRob Herring&uart3 {
455*724ba675SRob Herring	pinctrl-names = "default";
456*724ba675SRob Herring	pinctrl-0 = <&uart3_pins_default>;
457*724ba675SRob Herring	status = "okay";
458*724ba675SRob Herring};
459*724ba675SRob Herring
460*724ba675SRob Herring&gpio3 {
461*724ba675SRob Herring	pr1-mii-ctl-hog {
462*724ba675SRob Herring		gpio-hog;
463*724ba675SRob Herring		gpios = <4 GPIO_ACTIVE_HIGH>;
464*724ba675SRob Herring		output-high;
465*724ba675SRob Herring		line-name = "PR1_MII_CTRL";
466*724ba675SRob Herring	};
467*724ba675SRob Herring
468*724ba675SRob Herring	mux-mii-hog {
469*724ba675SRob Herring		gpio-hog;
470*724ba675SRob Herring		gpios = <10 GPIO_ACTIVE_HIGH>;
471*724ba675SRob Herring		/* ETH1 mux: Low for MII-PRU, high for RMII-CPSW */
472*724ba675SRob Herring		output-high;
473*724ba675SRob Herring		line-name = "MUX_MII_CTL1";
474*724ba675SRob Herring	};
475*724ba675SRob Herring};
476*724ba675SRob Herring
477*724ba675SRob Herring&cpsw_port1 {
478*724ba675SRob Herring	phy-handle = <&ethphy0>;
479*724ba675SRob Herring	phy-mode = "rmii";
480*724ba675SRob Herring	ti,dual-emac-pvid = <1>;
481*724ba675SRob Herring};
482*724ba675SRob Herring
483*724ba675SRob Herring&cpsw_port2 {
484*724ba675SRob Herring	phy-handle = <&ethphy1>;
485*724ba675SRob Herring	phy-mode = "rmii";
486*724ba675SRob Herring	ti,dual-emac-pvid = <2>;
487*724ba675SRob Herring};
488*724ba675SRob Herring
489*724ba675SRob Herring&mac_sw {
490*724ba675SRob Herring	pinctrl-names = "default", "sleep";
491*724ba675SRob Herring	pinctrl-0 = <&cpsw_default>;
492*724ba675SRob Herring	pinctrl-1 = <&cpsw_sleep>;
493*724ba675SRob Herring	status = "okay";
494*724ba675SRob Herring};
495*724ba675SRob Herring
496*724ba675SRob Herring&davinci_mdio_sw {
497*724ba675SRob Herring	pinctrl-names = "default", "sleep";
498*724ba675SRob Herring	pinctrl-0 = <&davinci_mdio_default>;
499*724ba675SRob Herring	pinctrl-1 = <&davinci_mdio_sleep>;
500*724ba675SRob Herring	reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
501*724ba675SRob Herring	reset-delay-us = <2>;   /* PHY datasheet states 1uS min */
502*724ba675SRob Herring
503*724ba675SRob Herring	ethphy0: ethernet-phy@1 {
504*724ba675SRob Herring		reg = <1>;
505*724ba675SRob Herring	};
506*724ba675SRob Herring
507*724ba675SRob Herring	ethphy1: ethernet-phy@3 {
508*724ba675SRob Herring		reg = <3>;
509*724ba675SRob Herring	};
510*724ba675SRob Herring};
511*724ba675SRob Herring
512*724ba675SRob Herring&pruss_tm {
513*724ba675SRob Herring	status = "okay";
514*724ba675SRob Herring};
515*724ba675SRob Herring
516*724ba675SRob Herring&rtc {
517*724ba675SRob Herring	system-power-controller;
518*724ba675SRob Herring};
519