xref: /openbmc/linux/arch/arm/boot/dts/ti/keystone/keystone-k2g.dtsi (revision 2612e3bbc0386368a850140a6c9b990cd496a5ec)
1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Device Tree Source for K2G SOC
4*724ba675SRob Herring *
5*724ba675SRob Herring * Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/
6*724ba675SRob Herring */
7*724ba675SRob Herring
8*724ba675SRob Herring#include <dt-bindings/interrupt-controller/arm-gic.h>
9*724ba675SRob Herring#include <dt-bindings/pinctrl/keystone.h>
10*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h>
11*724ba675SRob Herring
12*724ba675SRob Herring/ {
13*724ba675SRob Herring	compatible = "ti,k2g","ti,keystone";
14*724ba675SRob Herring	model = "Texas Instruments K2G SoC";
15*724ba675SRob Herring	#address-cells = <2>;
16*724ba675SRob Herring	#size-cells = <2>;
17*724ba675SRob Herring	interrupt-parent = <&gic>;
18*724ba675SRob Herring
19*724ba675SRob Herring	chosen { };
20*724ba675SRob Herring
21*724ba675SRob Herring	aliases {
22*724ba675SRob Herring		serial0 = &uart0;
23*724ba675SRob Herring		serial1 = &uart1;
24*724ba675SRob Herring		serial2 = &uart2;
25*724ba675SRob Herring		i2c0 = &i2c0;
26*724ba675SRob Herring		i2c1 = &i2c1;
27*724ba675SRob Herring		i2c2 = &i2c2;
28*724ba675SRob Herring		rproc0 = &dsp0;
29*724ba675SRob Herring	};
30*724ba675SRob Herring
31*724ba675SRob Herring	cpus {
32*724ba675SRob Herring		#address-cells = <1>;
33*724ba675SRob Herring		#size-cells = <0>;
34*724ba675SRob Herring
35*724ba675SRob Herring		cpu@0 {
36*724ba675SRob Herring			compatible = "arm,cortex-a15";
37*724ba675SRob Herring			device_type = "cpu";
38*724ba675SRob Herring			reg = <0>;
39*724ba675SRob Herring		};
40*724ba675SRob Herring	};
41*724ba675SRob Herring
42*724ba675SRob Herring	gic: interrupt-controller@2561000 {
43*724ba675SRob Herring		compatible = "arm,gic-400", "arm,cortex-a15-gic";
44*724ba675SRob Herring		#interrupt-cells = <3>;
45*724ba675SRob Herring		interrupt-controller;
46*724ba675SRob Herring		reg = <0x0 0x02561000 0x0 0x1000>,
47*724ba675SRob Herring		      <0x0 0x02562000 0x0 0x2000>,
48*724ba675SRob Herring		      <0x0 0x02564000 0x0 0x2000>,
49*724ba675SRob Herring		      <0x0 0x02566000 0x0 0x2000>;
50*724ba675SRob Herring		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
51*724ba675SRob Herring				IRQ_TYPE_LEVEL_HIGH)>;
52*724ba675SRob Herring	};
53*724ba675SRob Herring
54*724ba675SRob Herring	timer {
55*724ba675SRob Herring		compatible = "arm,armv7-timer";
56*724ba675SRob Herring		interrupts =
57*724ba675SRob Herring			<GIC_PPI 13
58*724ba675SRob Herring				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
59*724ba675SRob Herring			<GIC_PPI 14
60*724ba675SRob Herring				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
61*724ba675SRob Herring			<GIC_PPI 11
62*724ba675SRob Herring				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
63*724ba675SRob Herring			<GIC_PPI 10
64*724ba675SRob Herring				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
65*724ba675SRob Herring	};
66*724ba675SRob Herring
67*724ba675SRob Herring	pmu {
68*724ba675SRob Herring		compatible = "arm,cortex-a15-pmu";
69*724ba675SRob Herring		interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>;
70*724ba675SRob Herring	};
71*724ba675SRob Herring
72*724ba675SRob Herring	usbphy {
73*724ba675SRob Herring		#address-cells = <1>;
74*724ba675SRob Herring		#size-cells = <0>;
75*724ba675SRob Herring		compatible = "simple-bus";
76*724ba675SRob Herring
77*724ba675SRob Herring		usb0_phy: usb-phy@0 {
78*724ba675SRob Herring			compatible = "usb-nop-xceiv";
79*724ba675SRob Herring			reg = <0>;
80*724ba675SRob Herring			status = "disabled";
81*724ba675SRob Herring		};
82*724ba675SRob Herring
83*724ba675SRob Herring		usb1_phy: usb-phy@1 {
84*724ba675SRob Herring			compatible = "usb-nop-xceiv";
85*724ba675SRob Herring			reg = <1>;
86*724ba675SRob Herring			status = "disabled";
87*724ba675SRob Herring		};
88*724ba675SRob Herring	};
89*724ba675SRob Herring
90*724ba675SRob Herring	soc0: soc@0 {
91*724ba675SRob Herring		#address-cells = <1>;
92*724ba675SRob Herring		#size-cells = <1>;
93*724ba675SRob Herring		#pinctrl-cells = <1>;
94*724ba675SRob Herring		compatible = "ti,keystone","simple-bus";
95*724ba675SRob Herring		ranges = <0x0 0x0 0x0 0xc0000000>;
96*724ba675SRob Herring		dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
97*724ba675SRob Herring
98*724ba675SRob Herring		msm_ram: sram@c000000 {
99*724ba675SRob Herring			compatible = "mmio-sram";
100*724ba675SRob Herring			reg = <0x0c000000 0x100000>;
101*724ba675SRob Herring			ranges = <0x0 0x0c000000 0x100000>;
102*724ba675SRob Herring			#address-cells = <1>;
103*724ba675SRob Herring			#size-cells = <1>;
104*724ba675SRob Herring
105*724ba675SRob Herring			bm-sram@f7000 {
106*724ba675SRob Herring				reg = <0x000f7000 0x8000>;
107*724ba675SRob Herring			};
108*724ba675SRob Herring		};
109*724ba675SRob Herring
110*724ba675SRob Herring		k2g_pinctrl: pinmux@2621000 {
111*724ba675SRob Herring			compatible = "pinctrl-single";
112*724ba675SRob Herring			reg = <0x02621000 0x410>;
113*724ba675SRob Herring			pinctrl-single,register-width = <32>;
114*724ba675SRob Herring			pinctrl-single,function-mask = <0x001b0007>;
115*724ba675SRob Herring		};
116*724ba675SRob Herring
117*724ba675SRob Herring		devctrl: device-state-control@2620000 {
118*724ba675SRob Herring			compatible = "ti,keystone-devctrl", "syscon", "simple-mfd";
119*724ba675SRob Herring			reg = <0x02620000 0x1000>;
120*724ba675SRob Herring			#address-cells = <1>;
121*724ba675SRob Herring			#size-cells = <1>;
122*724ba675SRob Herring			ranges = <0x0 0x02620000 0x1000>;
123*724ba675SRob Herring
124*724ba675SRob Herring			kirq0: keystone_irq@2a0 {
125*724ba675SRob Herring				compatible = "ti,keystone-irq";
126*724ba675SRob Herring				reg = <0x2a0 0x10>;
127*724ba675SRob Herring				interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>;
128*724ba675SRob Herring				interrupt-controller;
129*724ba675SRob Herring				#interrupt-cells = <1>;
130*724ba675SRob Herring				ti,syscon-dev = <&devctrl 0x2a0>;
131*724ba675SRob Herring			};
132*724ba675SRob Herring
133*724ba675SRob Herring			dspgpio0: keystone_dsp_gpio@240 {
134*724ba675SRob Herring				compatible = "ti,keystone-dsp-gpio";
135*724ba675SRob Herring				reg = <0x240 0x4>;
136*724ba675SRob Herring				gpio-controller;
137*724ba675SRob Herring				#gpio-cells = <2>;
138*724ba675SRob Herring				gpio,syscon-dev = <&devctrl 0x240>;
139*724ba675SRob Herring			};
140*724ba675SRob Herring		};
141*724ba675SRob Herring
142*724ba675SRob Herring		uart0: serial@2530c00 {
143*724ba675SRob Herring			compatible = "ti,da830-uart", "ns16550a";
144*724ba675SRob Herring			current-speed = <115200>;
145*724ba675SRob Herring			reg-shift = <2>;
146*724ba675SRob Herring			reg-io-width = <4>;
147*724ba675SRob Herring			reg = <0x02530c00 0x100>;
148*724ba675SRob Herring			interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
149*724ba675SRob Herring			clocks = <&k2g_clks 0x2c 0>;
150*724ba675SRob Herring			power-domains = <&k2g_pds 0x2c>;
151*724ba675SRob Herring			status = "disabled";
152*724ba675SRob Herring		};
153*724ba675SRob Herring
154*724ba675SRob Herring		uart1: serial@2531000 {
155*724ba675SRob Herring			compatible = "ti,da830-uart", "ns16550a";
156*724ba675SRob Herring			current-speed = <115200>;
157*724ba675SRob Herring			reg-shift = <2>;
158*724ba675SRob Herring			reg-io-width = <4>;
159*724ba675SRob Herring			reg = <0x02531000 0x100>;
160*724ba675SRob Herring			interrupts = <GIC_SPI 165 IRQ_TYPE_EDGE_RISING>;
161*724ba675SRob Herring			clocks = <&k2g_clks 0x2d 0>;
162*724ba675SRob Herring			power-domains = <&k2g_pds 0x2d>;
163*724ba675SRob Herring			status = "disabled";
164*724ba675SRob Herring		};
165*724ba675SRob Herring
166*724ba675SRob Herring		uart2: serial@2531400 {
167*724ba675SRob Herring			compatible = "ti,da830-uart", "ns16550a";
168*724ba675SRob Herring			current-speed = <115200>;
169*724ba675SRob Herring			reg-shift = <2>;
170*724ba675SRob Herring			reg-io-width = <4>;
171*724ba675SRob Herring			reg = <0x02531400 0x100>;
172*724ba675SRob Herring			interrupts = <GIC_SPI 166 IRQ_TYPE_EDGE_RISING>;
173*724ba675SRob Herring			clocks = <&k2g_clks 0x2e 0>;
174*724ba675SRob Herring			power-domains = <&k2g_pds 0x2e>;
175*724ba675SRob Herring			status = "disabled";
176*724ba675SRob Herring		};
177*724ba675SRob Herring
178*724ba675SRob Herring		dcan0: can@260b200 {
179*724ba675SRob Herring			compatible = "ti,am4372-d_can", "ti,am3352-d_can";
180*724ba675SRob Herring			reg = <0x0260b200 0x200>;
181*724ba675SRob Herring			interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>;
182*724ba675SRob Herring			status = "disabled";
183*724ba675SRob Herring			power-domains = <&k2g_pds 0x0008>;
184*724ba675SRob Herring			clocks = <&k2g_clks 0x0008 1>;
185*724ba675SRob Herring		};
186*724ba675SRob Herring
187*724ba675SRob Herring		dcan1: can@260b400 {
188*724ba675SRob Herring			compatible = "ti,am4372-d_can", "ti,am3352-d_can";
189*724ba675SRob Herring			reg = <0x0260b400 0x200>;
190*724ba675SRob Herring			interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
191*724ba675SRob Herring			status = "disabled";
192*724ba675SRob Herring			power-domains = <&k2g_pds 0x0009>;
193*724ba675SRob Herring			clocks = <&k2g_clks 0x0009 1>;
194*724ba675SRob Herring		};
195*724ba675SRob Herring
196*724ba675SRob Herring		i2c0: i2c@2530000 {
197*724ba675SRob Herring			compatible = "ti,keystone-i2c";
198*724ba675SRob Herring			reg = <0x02530000 0x400>;
199*724ba675SRob Herring			clocks = <&k2g_clks 0x003a 0>;
200*724ba675SRob Herring			power-domains = <&k2g_pds 0x003a>;
201*724ba675SRob Herring			interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>;
202*724ba675SRob Herring			#address-cells = <1>;
203*724ba675SRob Herring			#size-cells = <0>;
204*724ba675SRob Herring			status = "disabled";
205*724ba675SRob Herring		};
206*724ba675SRob Herring
207*724ba675SRob Herring		i2c1: i2c@2530400 {
208*724ba675SRob Herring			compatible = "ti,keystone-i2c";
209*724ba675SRob Herring			reg = <0x02530400 0x400>;
210*724ba675SRob Herring			clocks = <&k2g_clks 0x003b 0>;
211*724ba675SRob Herring			power-domains = <&k2g_pds 0x003b>;
212*724ba675SRob Herring			interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>;
213*724ba675SRob Herring			#address-cells = <1>;
214*724ba675SRob Herring			#size-cells = <0>;
215*724ba675SRob Herring			status = "disabled";
216*724ba675SRob Herring		};
217*724ba675SRob Herring
218*724ba675SRob Herring		i2c2: i2c@2530800 {
219*724ba675SRob Herring			compatible = "ti,keystone-i2c";
220*724ba675SRob Herring			reg = <0x02530800 0x400>;
221*724ba675SRob Herring			clocks = <&k2g_clks 0x003c 0>;
222*724ba675SRob Herring			power-domains = <&k2g_pds 0x003c>;
223*724ba675SRob Herring			interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
224*724ba675SRob Herring			#address-cells = <1>;
225*724ba675SRob Herring			#size-cells = <0>;
226*724ba675SRob Herring			status = "disabled";
227*724ba675SRob Herring		};
228*724ba675SRob Herring
229*724ba675SRob Herring		dsp0: dsp@10800000 {
230*724ba675SRob Herring			compatible = "ti,k2g-dsp";
231*724ba675SRob Herring			reg = <0x10800000 0x00100000>,
232*724ba675SRob Herring			      <0x10e00000 0x00008000>,
233*724ba675SRob Herring			      <0x10f00000 0x00008000>;
234*724ba675SRob Herring			reg-names = "l2sram", "l1pram", "l1dram";
235*724ba675SRob Herring			power-domains = <&k2g_pds 0x0046>;
236*724ba675SRob Herring			ti,syscon-dev = <&devctrl 0x844>;
237*724ba675SRob Herring			resets = <&k2g_reset 0x0046 0x1>;
238*724ba675SRob Herring			interrupt-parent = <&kirq0>;
239*724ba675SRob Herring			interrupts = <0 8>;
240*724ba675SRob Herring			interrupt-names = "vring", "exception";
241*724ba675SRob Herring			kick-gpios = <&dspgpio0 27 0>;
242*724ba675SRob Herring			status = "disabled";
243*724ba675SRob Herring		};
244*724ba675SRob Herring
245*724ba675SRob Herring		msgmgr: mailbox@2a00000 {
246*724ba675SRob Herring			compatible = "ti,k2g-message-manager";
247*724ba675SRob Herring			#mbox-cells = <2>;
248*724ba675SRob Herring			reg-names = "queue_proxy_region",
249*724ba675SRob Herring				    "queue_state_debug_region";
250*724ba675SRob Herring			reg = <0x02a00000 0x400000>, <0x028c3400 0x400>;
251*724ba675SRob Herring			interrupt-names = "rx_005",
252*724ba675SRob Herring					  "rx_057";
253*724ba675SRob Herring			interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
254*724ba675SRob Herring				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>;
255*724ba675SRob Herring		};
256*724ba675SRob Herring
257*724ba675SRob Herring		pmmc: system-controller@2921c00 {
258*724ba675SRob Herring			compatible = "ti,k2g-sci";
259*724ba675SRob Herring			/*
260*724ba675SRob Herring			 * In case of rare platforms that does not use k2g as
261*724ba675SRob Herring			 * system master, use /delete-property/
262*724ba675SRob Herring			 */
263*724ba675SRob Herring			ti,system-reboot-controller;
264*724ba675SRob Herring			mbox-names = "rx", "tx";
265*724ba675SRob Herring			mboxes = <&msgmgr 5 2>,
266*724ba675SRob Herring				<&msgmgr 0 0>;
267*724ba675SRob Herring			reg-names = "debug_messages";
268*724ba675SRob Herring			reg = <0x02921c00 0x400>;
269*724ba675SRob Herring
270*724ba675SRob Herring			k2g_pds: power-controller {
271*724ba675SRob Herring				compatible = "ti,sci-pm-domain";
272*724ba675SRob Herring				#power-domain-cells = <1>;
273*724ba675SRob Herring			};
274*724ba675SRob Herring
275*724ba675SRob Herring			k2g_clks: clock-controller {
276*724ba675SRob Herring				compatible = "ti,k2g-sci-clk";
277*724ba675SRob Herring				#clock-cells = <2>;
278*724ba675SRob Herring			};
279*724ba675SRob Herring
280*724ba675SRob Herring			k2g_reset: reset-controller {
281*724ba675SRob Herring				compatible = "ti,sci-reset";
282*724ba675SRob Herring				#reset-cells = <2>;
283*724ba675SRob Herring			};
284*724ba675SRob Herring		};
285*724ba675SRob Herring
286*724ba675SRob Herring		gpio0: gpio@2603000 {
287*724ba675SRob Herring			compatible = "ti,k2g-gpio", "ti,keystone-gpio";
288*724ba675SRob Herring			reg = <0x02603000 0x100>;
289*724ba675SRob Herring			gpio-controller;
290*724ba675SRob Herring			#gpio-cells = <2>;
291*724ba675SRob Herring
292*724ba675SRob Herring			interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>,
293*724ba675SRob Herring					<GIC_SPI 433 IRQ_TYPE_EDGE_RISING>,
294*724ba675SRob Herring					<GIC_SPI 434 IRQ_TYPE_EDGE_RISING>,
295*724ba675SRob Herring					<GIC_SPI 435 IRQ_TYPE_EDGE_RISING>,
296*724ba675SRob Herring					<GIC_SPI 436 IRQ_TYPE_EDGE_RISING>,
297*724ba675SRob Herring					<GIC_SPI 437 IRQ_TYPE_EDGE_RISING>,
298*724ba675SRob Herring					<GIC_SPI 438 IRQ_TYPE_EDGE_RISING>,
299*724ba675SRob Herring					<GIC_SPI 439 IRQ_TYPE_EDGE_RISING>,
300*724ba675SRob Herring					<GIC_SPI 440 IRQ_TYPE_EDGE_RISING>;
301*724ba675SRob Herring			interrupt-controller;
302*724ba675SRob Herring			#interrupt-cells = <2>;
303*724ba675SRob Herring			ti,ngpio = <144>;
304*724ba675SRob Herring			ti,davinci-gpio-unbanked = <0>;
305*724ba675SRob Herring			clocks = <&k2g_clks 0x001b 0x0>;
306*724ba675SRob Herring			clock-names = "gpio";
307*724ba675SRob Herring		};
308*724ba675SRob Herring
309*724ba675SRob Herring		gpio1: gpio@260a000 {
310*724ba675SRob Herring			compatible = "ti,k2g-gpio", "ti,keystone-gpio";
311*724ba675SRob Herring			reg = <0x0260a000 0x100>;
312*724ba675SRob Herring			gpio-controller;
313*724ba675SRob Herring			#gpio-cells = <2>;
314*724ba675SRob Herring			interrupts = <GIC_SPI 442 IRQ_TYPE_EDGE_RISING>,
315*724ba675SRob Herring					<GIC_SPI 443 IRQ_TYPE_EDGE_RISING>,
316*724ba675SRob Herring					<GIC_SPI 444 IRQ_TYPE_EDGE_RISING>,
317*724ba675SRob Herring					<GIC_SPI 445 IRQ_TYPE_EDGE_RISING>,
318*724ba675SRob Herring					<GIC_SPI 446 IRQ_TYPE_EDGE_RISING>;
319*724ba675SRob Herring			interrupt-controller;
320*724ba675SRob Herring			#interrupt-cells = <2>;
321*724ba675SRob Herring			ti,ngpio = <68>;
322*724ba675SRob Herring			ti,davinci-gpio-unbanked = <0>;
323*724ba675SRob Herring			clocks = <&k2g_clks 0x001c 0x0>;
324*724ba675SRob Herring			clock-names = "gpio";
325*724ba675SRob Herring		};
326*724ba675SRob Herring
327*724ba675SRob Herring		dss: dss@02540000 {
328*724ba675SRob Herring			compatible = "ti,k2g-dss";
329*724ba675SRob Herring			reg = <0x02540000 0x400>,
330*724ba675SRob Herring				<0x02550000 0x1000>,
331*724ba675SRob Herring				<0x02557000 0x1000>,
332*724ba675SRob Herring				<0x0255a800 0x100>,
333*724ba675SRob Herring				<0x0255ac00 0x100>;
334*724ba675SRob Herring			reg-names = "cfg", "common", "vid1", "ovr1", "vp1";
335*724ba675SRob Herring			clocks = <&k2g_clks 0x2 0>,
336*724ba675SRob Herring					<&k2g_clks 0x2 1>;
337*724ba675SRob Herring			clock-names = "fck", "vp1";
338*724ba675SRob Herring			interrupts = <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>;
339*724ba675SRob Herring
340*724ba675SRob Herring			power-domains = <&k2g_pds 0x2>;
341*724ba675SRob Herring			status = "disabled";
342*724ba675SRob Herring			#address-cells = <1>;
343*724ba675SRob Herring			#size-cells = <1>;
344*724ba675SRob Herring			ranges;
345*724ba675SRob Herring
346*724ba675SRob Herring			max-memory-bandwidth = <230000000>;
347*724ba675SRob Herring		};
348*724ba675SRob Herring
349*724ba675SRob Herring		edma0: edma@2700000 {
350*724ba675SRob Herring			compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc";
351*724ba675SRob Herring			reg = <0x02700000 0x8000>;
352*724ba675SRob Herring			reg-names = "edma3_cc";
353*724ba675SRob Herring			interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>,
354*724ba675SRob Herring					<GIC_SPI 216 IRQ_TYPE_EDGE_RISING>,
355*724ba675SRob Herring					<GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
356*724ba675SRob Herring			interrupt-names = "edma3_ccint", "emda3_mperr",
357*724ba675SRob Herring					  "edma3_ccerrint";
358*724ba675SRob Herring			dma-requests = <64>;
359*724ba675SRob Herring			#dma-cells = <2>;
360*724ba675SRob Herring
361*724ba675SRob Herring			ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>;
362*724ba675SRob Herring
363*724ba675SRob Herring			ti,edma-memcpy-channels = <32 33 34 35>;
364*724ba675SRob Herring
365*724ba675SRob Herring			power-domains = <&k2g_pds 0x3f>;
366*724ba675SRob Herring		};
367*724ba675SRob Herring
368*724ba675SRob Herring		edma0_tptc0: tptc@2760000 {
369*724ba675SRob Herring			compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
370*724ba675SRob Herring			reg = <0x02760000 0x400>;
371*724ba675SRob Herring			power-domains = <&k2g_pds 0x3f>;
372*724ba675SRob Herring		};
373*724ba675SRob Herring
374*724ba675SRob Herring		edma0_tptc1: tptc@2768000 {
375*724ba675SRob Herring			compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
376*724ba675SRob Herring			reg = <0x02768000 0x400>;
377*724ba675SRob Herring			power-domains = <&k2g_pds 0x3f>;
378*724ba675SRob Herring		};
379*724ba675SRob Herring
380*724ba675SRob Herring		edma1: edma@2728000 {
381*724ba675SRob Herring			compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc";
382*724ba675SRob Herring			reg = <0x02728000 0x8000>;
383*724ba675SRob Herring			reg-names = "edma3_cc";
384*724ba675SRob Herring			interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
385*724ba675SRob Herring					<GIC_SPI 219 IRQ_TYPE_EDGE_RISING>,
386*724ba675SRob Herring					<GIC_SPI 220 IRQ_TYPE_EDGE_RISING>;
387*724ba675SRob Herring			interrupt-names = "edma3_ccint", "emda3_mperr",
388*724ba675SRob Herring					  "edma3_ccerrint";
389*724ba675SRob Herring			dma-requests = <64>;
390*724ba675SRob Herring			#dma-cells = <2>;
391*724ba675SRob Herring
392*724ba675SRob Herring			ti,tptcs = <&edma1_tptc0 7>, <&edma1_tptc1 0>;
393*724ba675SRob Herring
394*724ba675SRob Herring			/*
395*724ba675SRob Herring			 * memcpy is disabled, can be enabled with:
396*724ba675SRob Herring			 * ti,edma-memcpy-channels = <12 13 14 15>;
397*724ba675SRob Herring			 * for example.
398*724ba675SRob Herring			 */
399*724ba675SRob Herring
400*724ba675SRob Herring			power-domains = <&k2g_pds 0x4f>;
401*724ba675SRob Herring		};
402*724ba675SRob Herring
403*724ba675SRob Herring		edma1_tptc0: tptc@27b0000 {
404*724ba675SRob Herring			compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
405*724ba675SRob Herring			reg = <0x027b0000 0x400>;
406*724ba675SRob Herring			power-domains = <&k2g_pds 0x4f>;
407*724ba675SRob Herring		};
408*724ba675SRob Herring
409*724ba675SRob Herring		edma1_tptc1: tptc@27b8000 {
410*724ba675SRob Herring			compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
411*724ba675SRob Herring			reg = <0x027b8000 0x400>;
412*724ba675SRob Herring			power-domains = <&k2g_pds 0x4f>;
413*724ba675SRob Herring		};
414*724ba675SRob Herring
415*724ba675SRob Herring		mmc0: mmc@23000000 {
416*724ba675SRob Herring			compatible = "ti,k2g-sdhci";
417*724ba675SRob Herring			reg = <0x23000000 0x400>;
418*724ba675SRob Herring			interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>;
419*724ba675SRob Herring			bus-width = <4>;
420*724ba675SRob Herring			no-1-8-v;
421*724ba675SRob Herring			max-frequency = <96000000>;
422*724ba675SRob Herring			power-domains = <&k2g_pds 0xb>;
423*724ba675SRob Herring			clocks = <&k2g_clks 0xb 1>, <&k2g_clks 0xb 2>;
424*724ba675SRob Herring			clock-names = "fck", "mmchsdb_fck";
425*724ba675SRob Herring			status = "disabled";
426*724ba675SRob Herring		};
427*724ba675SRob Herring
428*724ba675SRob Herring		mmc1: mmc@23100000 {
429*724ba675SRob Herring			compatible = "ti,k2g-sdhci";
430*724ba675SRob Herring			reg = <0x23100000 0x400>;
431*724ba675SRob Herring			interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>;
432*724ba675SRob Herring			bus-width = <8>;
433*724ba675SRob Herring			no-1-8-v;
434*724ba675SRob Herring			non-removable;
435*724ba675SRob Herring			max-frequency = <96000000>;
436*724ba675SRob Herring			power-domains = <&k2g_pds 0xc>;
437*724ba675SRob Herring			clocks = <&k2g_clks 0xc 1>, <&k2g_clks 0xc 2>;
438*724ba675SRob Herring			clock-names = "fck", "mmchsdb_fck";
439*724ba675SRob Herring		};
440*724ba675SRob Herring
441*724ba675SRob Herring		qspi: spi@2940000 {
442*724ba675SRob Herring			compatible = "ti,k2g-qspi", "cdns,qspi-nor";
443*724ba675SRob Herring			#address-cells = <1>;
444*724ba675SRob Herring			#size-cells = <0>;
445*724ba675SRob Herring			reg = <0x02940000 0x1000>,
446*724ba675SRob Herring			      <0x24000000 0x4000000>;
447*724ba675SRob Herring			interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>;
448*724ba675SRob Herring			cdns,fifo-depth = <256>;
449*724ba675SRob Herring			cdns,fifo-width = <4>;
450*724ba675SRob Herring			cdns,trigger-address = <0x24000000>;
451*724ba675SRob Herring			clocks = <&k2g_clks 0x43 0x0>;
452*724ba675SRob Herring			power-domains = <&k2g_pds 0x43>;
453*724ba675SRob Herring			status = "disabled";
454*724ba675SRob Herring		};
455*724ba675SRob Herring
456*724ba675SRob Herring		mcasp0: mcasp@2340000 {
457*724ba675SRob Herring			compatible = "ti,am33xx-mcasp-audio";
458*724ba675SRob Herring			reg = <0x02340000 0x2000>,
459*724ba675SRob Herring			      <0x21804000 0x1000>;
460*724ba675SRob Herring			reg-names = "mpu","dat";
461*724ba675SRob Herring			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
462*724ba675SRob Herring				     <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
463*724ba675SRob Herring			interrupt-names = "tx", "rx";
464*724ba675SRob Herring			dmas = <&edma0 24 1>, <&edma0 25 1>;
465*724ba675SRob Herring			dma-names = "tx", "rx";
466*724ba675SRob Herring			power-domains = <&k2g_pds 0x4>;
467*724ba675SRob Herring			clocks = <&k2g_clks 0x4 0>;
468*724ba675SRob Herring			clock-names = "fck";
469*724ba675SRob Herring			status = "disabled";
470*724ba675SRob Herring		};
471*724ba675SRob Herring
472*724ba675SRob Herring		mcasp1: mcasp@2342000 {
473*724ba675SRob Herring			compatible = "ti,am33xx-mcasp-audio";
474*724ba675SRob Herring			reg = <0x02342000 0x2000>,
475*724ba675SRob Herring			      <0x21804400 0x1000>;
476*724ba675SRob Herring			reg-names = "mpu","dat";
477*724ba675SRob Herring			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
478*724ba675SRob Herring				     <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
479*724ba675SRob Herring			interrupt-names = "tx", "rx";
480*724ba675SRob Herring			dmas = <&edma1 48 1>, <&edma1 49 1>;
481*724ba675SRob Herring			dma-names = "tx", "rx";
482*724ba675SRob Herring			power-domains = <&k2g_pds 0x5>;
483*724ba675SRob Herring			clocks = <&k2g_clks 0x5 0>;
484*724ba675SRob Herring			clock-names = "fck";
485*724ba675SRob Herring			status = "disabled";
486*724ba675SRob Herring		};
487*724ba675SRob Herring
488*724ba675SRob Herring		mcasp2: mcasp@2344000 {
489*724ba675SRob Herring			compatible = "ti,am33xx-mcasp-audio";
490*724ba675SRob Herring			reg = <0x02344000 0x2000>,
491*724ba675SRob Herring			      <0x21804800 0x1000>;
492*724ba675SRob Herring			reg-names = "mpu","dat";
493*724ba675SRob Herring			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
494*724ba675SRob Herring				     <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
495*724ba675SRob Herring			interrupt-names = "tx", "rx";
496*724ba675SRob Herring			dmas = <&edma1 50 1>, <&edma1 51 1>;
497*724ba675SRob Herring			dma-names = "tx", "rx";
498*724ba675SRob Herring			power-domains = <&k2g_pds 0x6>;
499*724ba675SRob Herring			clocks = <&k2g_clks 0x6 0>;
500*724ba675SRob Herring			clock-names = "fck";
501*724ba675SRob Herring			status = "disabled";
502*724ba675SRob Herring		};
503*724ba675SRob Herring
504*724ba675SRob Herring		keystone_usb0: keystone-dwc3@2680000 {
505*724ba675SRob Herring			compatible = "ti,keystone-dwc3";
506*724ba675SRob Herring			#address-cells = <1>;
507*724ba675SRob Herring			#size-cells = <1>;
508*724ba675SRob Herring			reg = <0x2680000 0x10000>;
509*724ba675SRob Herring			interrupts = <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>;
510*724ba675SRob Herring			ranges;
511*724ba675SRob Herring			dma-coherent;
512*724ba675SRob Herring			dma-ranges;
513*724ba675SRob Herring			status = "disabled";
514*724ba675SRob Herring			power-domains = <&k2g_pds 0x0016>;
515*724ba675SRob Herring
516*724ba675SRob Herring			usb0: usb@2690000 {
517*724ba675SRob Herring				compatible = "snps,dwc3";
518*724ba675SRob Herring				reg = <0x2690000 0x10000>;
519*724ba675SRob Herring				interrupts = <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>;
520*724ba675SRob Herring				maximum-speed = "high-speed";
521*724ba675SRob Herring				dr_mode = "otg";
522*724ba675SRob Herring				usb-phy = <&usb0_phy>;
523*724ba675SRob Herring				status = "disabled";
524*724ba675SRob Herring			};
525*724ba675SRob Herring		};
526*724ba675SRob Herring
527*724ba675SRob Herring		keystone_usb1: keystone-dwc3@2580000 {
528*724ba675SRob Herring			compatible = "ti,keystone-dwc3";
529*724ba675SRob Herring			#address-cells = <1>;
530*724ba675SRob Herring			#size-cells = <1>;
531*724ba675SRob Herring			reg = <0x2580000 0x10000>;
532*724ba675SRob Herring			interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>;
533*724ba675SRob Herring			ranges;
534*724ba675SRob Herring			dma-coherent;
535*724ba675SRob Herring			dma-ranges;
536*724ba675SRob Herring			status = "disabled";
537*724ba675SRob Herring			power-domains = <&k2g_pds 0x0017>;
538*724ba675SRob Herring
539*724ba675SRob Herring			usb1: usb@2590000 {
540*724ba675SRob Herring				compatible = "snps,dwc3";
541*724ba675SRob Herring				reg = <0x2590000 0x10000>;
542*724ba675SRob Herring				interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>;
543*724ba675SRob Herring				maximum-speed = "high-speed";
544*724ba675SRob Herring				dr_mode = "otg";
545*724ba675SRob Herring				usb-phy = <&usb1_phy>;
546*724ba675SRob Herring				status = "disabled";
547*724ba675SRob Herring			};
548*724ba675SRob Herring		};
549*724ba675SRob Herring
550*724ba675SRob Herring		ecap0: pwm@21d1800 {
551*724ba675SRob Herring			compatible = "ti,k2g-ecap", "ti,am3352-ecap";
552*724ba675SRob Herring			#pwm-cells = <3>;
553*724ba675SRob Herring			reg = <0x021d1800 0x60>;
554*724ba675SRob Herring			power-domains = <&k2g_pds 0x38>;
555*724ba675SRob Herring			clocks = <&k2g_clks 0x38 0>;
556*724ba675SRob Herring			clock-names = "fck";
557*724ba675SRob Herring			status = "disabled";
558*724ba675SRob Herring		};
559*724ba675SRob Herring
560*724ba675SRob Herring		ecap1: pwm@21d1c00 {
561*724ba675SRob Herring			compatible = "ti,k2g-ecap", "ti,am3352-ecap";
562*724ba675SRob Herring			#pwm-cells = <3>;
563*724ba675SRob Herring			reg = <0x021d1c00 0x60>;
564*724ba675SRob Herring			power-domains = <&k2g_pds 0x39>;
565*724ba675SRob Herring			clocks = <&k2g_clks 0x39 0x0>;
566*724ba675SRob Herring			clock-names = "fck";
567*724ba675SRob Herring			status = "disabled";
568*724ba675SRob Herring		};
569*724ba675SRob Herring
570*724ba675SRob Herring		spi0: spi@21805400 {
571*724ba675SRob Herring			compatible = "ti,keystone-spi";
572*724ba675SRob Herring			reg = <0x21805400 0x200>;
573*724ba675SRob Herring			num-cs = <4>;
574*724ba675SRob Herring			ti,davinci-spi-intr-line = <0>;
575*724ba675SRob Herring			interrupts = <GIC_SPI 64 IRQ_TYPE_EDGE_RISING>;
576*724ba675SRob Herring			#address-cells = <1>;
577*724ba675SRob Herring			#size-cells = <0>;
578*724ba675SRob Herring			power-domains = <&k2g_pds 0x0010>;
579*724ba675SRob Herring			clocks = <&k2g_clks 0x0010 0>;
580*724ba675SRob Herring		};
581*724ba675SRob Herring
582*724ba675SRob Herring		spi1: spi@21805800 {
583*724ba675SRob Herring			compatible = "ti,keystone-spi";
584*724ba675SRob Herring			reg = <0x21805800 0x200>;
585*724ba675SRob Herring			num-cs = <4>;
586*724ba675SRob Herring			ti,davinci-spi-intr-line = <0>;
587*724ba675SRob Herring			interrupts = <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>;
588*724ba675SRob Herring			#address-cells = <1>;
589*724ba675SRob Herring			#size-cells = <0>;
590*724ba675SRob Herring			power-domains = <&k2g_pds 0x0011>;
591*724ba675SRob Herring			clocks = <&k2g_clks 0x0011 0>;
592*724ba675SRob Herring		};
593*724ba675SRob Herring
594*724ba675SRob Herring		spi2: spi@21805c00 {
595*724ba675SRob Herring			compatible = "ti,keystone-spi";
596*724ba675SRob Herring			reg = <0x21805c00 0x200>;
597*724ba675SRob Herring			num-cs = <4>;
598*724ba675SRob Herring			ti,davinci-spi-intr-line = <0>;
599*724ba675SRob Herring			interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>;
600*724ba675SRob Herring			#address-cells = <1>;
601*724ba675SRob Herring			#size-cells = <0>;
602*724ba675SRob Herring			power-domains = <&k2g_pds 0x0012>;
603*724ba675SRob Herring			clocks = <&k2g_clks 0x0012 0>;
604*724ba675SRob Herring		};
605*724ba675SRob Herring
606*724ba675SRob Herring		spi3: spi@21806000 {
607*724ba675SRob Herring			compatible = "ti,keystone-spi";
608*724ba675SRob Herring			reg = <0x21806000 0x200>;
609*724ba675SRob Herring			num-cs = <4>;
610*724ba675SRob Herring			ti,davinci-spi-intr-line = <0>;
611*724ba675SRob Herring			interrupts = <GIC_SPI 70 IRQ_TYPE_EDGE_RISING>;
612*724ba675SRob Herring			#address-cells = <1>;
613*724ba675SRob Herring			#size-cells = <0>;
614*724ba675SRob Herring			power-domains = <&k2g_pds 0x0013>;
615*724ba675SRob Herring			clocks = <&k2g_clks 0x0013 0>;
616*724ba675SRob Herring		};
617*724ba675SRob Herring
618*724ba675SRob Herring		wdt: wdt@02250000 {
619*724ba675SRob Herring			compatible = "ti,keystone-wdt", "ti,davinci-wdt";
620*724ba675SRob Herring			reg = <0x02250000 0x80>;
621*724ba675SRob Herring			power-domains = <&k2g_pds 0x22>;
622*724ba675SRob Herring			clocks = <&k2g_clks 0x22 0>;
623*724ba675SRob Herring		};
624*724ba675SRob Herring
625*724ba675SRob Herring		emif: emif@21010000 {
626*724ba675SRob Herring			compatible = "ti,emif-keystone";
627*724ba675SRob Herring			reg = <0x21010000 0x200>;
628*724ba675SRob Herring			interrupts = <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>;
629*724ba675SRob Herring		};
630*724ba675SRob Herring
631*724ba675SRob Herring		mdio: mdio@4200f00 {
632*724ba675SRob Herring			compatible = "ti,keystone_mdio", "ti,davinci_mdio";
633*724ba675SRob Herring			reg = <0x04200f00 0x100>;
634*724ba675SRob Herring			#address-cells = <1>;
635*724ba675SRob Herring			#size-cells = <0>;
636*724ba675SRob Herring			clocks = <&k2g_clks 0x0018 3>;
637*724ba675SRob Herring			clock-names = "fck";
638*724ba675SRob Herring			power-domains = <&k2g_pds 0x0018>;
639*724ba675SRob Herring			status = "disabled";
640*724ba675SRob Herring			bus_freq = <2500000>;
641*724ba675SRob Herring		};
642*724ba675SRob Herring		#include "keystone-k2g-netcp.dtsi"
643*724ba675SRob Herring	};
644*724ba675SRob Herring};
645