xref: /openbmc/linux/arch/arm/boot/dts/st/spear3xx.dtsi (revision 2612e3bbc0386368a850140a6c9b990cd496a5ec)
1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later
2*724ba675SRob Herring/*
3*724ba675SRob Herring * DTS file for all SPEAr3xx SoCs
4*724ba675SRob Herring *
5*724ba675SRob Herring * Copyright 2012 Viresh Kumar <vireshk@kernel.org>
6*724ba675SRob Herring */
7*724ba675SRob Herring
8*724ba675SRob Herring/ {
9*724ba675SRob Herring	#address-cells = <1>;
10*724ba675SRob Herring	#size-cells = <1>;
11*724ba675SRob Herring	interrupt-parent = <&vic>;
12*724ba675SRob Herring
13*724ba675SRob Herring	cpus {
14*724ba675SRob Herring		#address-cells = <0>;
15*724ba675SRob Herring		#size-cells = <0>;
16*724ba675SRob Herring
17*724ba675SRob Herring		cpu {
18*724ba675SRob Herring			compatible = "arm,arm926ej-s";
19*724ba675SRob Herring			device_type = "cpu";
20*724ba675SRob Herring		};
21*724ba675SRob Herring	};
22*724ba675SRob Herring
23*724ba675SRob Herring	memory {
24*724ba675SRob Herring		device_type = "memory";
25*724ba675SRob Herring		reg = <0 0x40000000>;
26*724ba675SRob Herring	};
27*724ba675SRob Herring
28*724ba675SRob Herring	ahb {
29*724ba675SRob Herring		#address-cells = <1>;
30*724ba675SRob Herring		#size-cells = <1>;
31*724ba675SRob Herring		compatible = "simple-bus";
32*724ba675SRob Herring		ranges = <0xd0000000 0xd0000000 0x30000000>;
33*724ba675SRob Herring
34*724ba675SRob Herring		vic: interrupt-controller@f1100000 {
35*724ba675SRob Herring			compatible = "arm,pl190-vic";
36*724ba675SRob Herring			interrupt-controller;
37*724ba675SRob Herring			reg = <0xf1100000 0x1000>;
38*724ba675SRob Herring			#interrupt-cells = <1>;
39*724ba675SRob Herring		};
40*724ba675SRob Herring
41*724ba675SRob Herring		dma@fc400000 {
42*724ba675SRob Herring			compatible = "arm,pl080", "arm,primecell";
43*724ba675SRob Herring			reg = <0xfc400000 0x1000>;
44*724ba675SRob Herring			interrupt-parent = <&vic>;
45*724ba675SRob Herring			interrupts = <8>;
46*724ba675SRob Herring			status = "disabled";
47*724ba675SRob Herring		};
48*724ba675SRob Herring
49*724ba675SRob Herring		gmac: eth@e0800000 {
50*724ba675SRob Herring			compatible = "snps,dwmac-3.40a";
51*724ba675SRob Herring			reg = <0xe0800000 0x8000>;
52*724ba675SRob Herring			interrupts = <23 22>;
53*724ba675SRob Herring			interrupt-names = "macirq", "eth_wake_irq";
54*724ba675SRob Herring			phy-mode = "mii";
55*724ba675SRob Herring			status = "disabled";
56*724ba675SRob Herring		};
57*724ba675SRob Herring
58*724ba675SRob Herring		smi: flash@fc000000 {
59*724ba675SRob Herring			compatible = "st,spear600-smi";
60*724ba675SRob Herring			#address-cells = <1>;
61*724ba675SRob Herring			#size-cells = <1>;
62*724ba675SRob Herring			reg = <0xfc000000 0x1000>;
63*724ba675SRob Herring			interrupts = <9>;
64*724ba675SRob Herring			status = "disabled";
65*724ba675SRob Herring		};
66*724ba675SRob Herring
67*724ba675SRob Herring		spi0: spi@d0100000 {
68*724ba675SRob Herring			compatible = "arm,pl022", "arm,primecell";
69*724ba675SRob Herring			reg = <0xd0100000 0x1000>;
70*724ba675SRob Herring			interrupts = <20>;
71*724ba675SRob Herring			#address-cells = <1>;
72*724ba675SRob Herring			#size-cells = <0>;
73*724ba675SRob Herring			status = "disabled";
74*724ba675SRob Herring		};
75*724ba675SRob Herring
76*724ba675SRob Herring		ehci@e1800000 {
77*724ba675SRob Herring			compatible = "st,spear600-ehci", "usb-ehci";
78*724ba675SRob Herring			reg = <0xe1800000 0x1000>;
79*724ba675SRob Herring			interrupts = <26>;
80*724ba675SRob Herring			status = "disabled";
81*724ba675SRob Herring		};
82*724ba675SRob Herring
83*724ba675SRob Herring		ohci@e1900000 {
84*724ba675SRob Herring			compatible = "st,spear600-ohci", "usb-ohci";
85*724ba675SRob Herring			reg = <0xe1900000 0x1000>;
86*724ba675SRob Herring			interrupts = <25>;
87*724ba675SRob Herring			status = "disabled";
88*724ba675SRob Herring		};
89*724ba675SRob Herring
90*724ba675SRob Herring		ohci@e2100000 {
91*724ba675SRob Herring			compatible = "st,spear600-ohci", "usb-ohci";
92*724ba675SRob Herring			reg = <0xe2100000 0x1000>;
93*724ba675SRob Herring			interrupts = <27>;
94*724ba675SRob Herring			status = "disabled";
95*724ba675SRob Herring		};
96*724ba675SRob Herring
97*724ba675SRob Herring		apb {
98*724ba675SRob Herring			#address-cells = <1>;
99*724ba675SRob Herring			#size-cells = <1>;
100*724ba675SRob Herring			compatible = "simple-bus";
101*724ba675SRob Herring			ranges = <0xd0000000 0xd0000000 0x30000000>;
102*724ba675SRob Herring
103*724ba675SRob Herring			gpio0: gpio@fc980000 {
104*724ba675SRob Herring				compatible = "arm,pl061", "arm,primecell";
105*724ba675SRob Herring				reg = <0xfc980000 0x1000>;
106*724ba675SRob Herring				interrupts = <11>;
107*724ba675SRob Herring				gpio-controller;
108*724ba675SRob Herring				#gpio-cells = <2>;
109*724ba675SRob Herring				interrupt-controller;
110*724ba675SRob Herring				#interrupt-cells = <2>;
111*724ba675SRob Herring				status = "disabled";
112*724ba675SRob Herring			};
113*724ba675SRob Herring
114*724ba675SRob Herring			i2c0: i2c@d0180000 {
115*724ba675SRob Herring				#address-cells = <1>;
116*724ba675SRob Herring				#size-cells = <0>;
117*724ba675SRob Herring				compatible = "snps,designware-i2c";
118*724ba675SRob Herring				reg = <0xd0180000 0x1000>;
119*724ba675SRob Herring				interrupts = <21>;
120*724ba675SRob Herring				status = "disabled";
121*724ba675SRob Herring			};
122*724ba675SRob Herring
123*724ba675SRob Herring			rtc@fc900000 {
124*724ba675SRob Herring				compatible = "st,spear600-rtc";
125*724ba675SRob Herring				reg = <0xfc900000 0x1000>;
126*724ba675SRob Herring				interrupts = <10>;
127*724ba675SRob Herring				status = "disabled";
128*724ba675SRob Herring			};
129*724ba675SRob Herring
130*724ba675SRob Herring			serial@d0000000 {
131*724ba675SRob Herring				compatible = "arm,pl011", "arm,primecell";
132*724ba675SRob Herring				reg = <0xd0000000 0x1000>;
133*724ba675SRob Herring				interrupts = <19>;
134*724ba675SRob Herring				status = "disabled";
135*724ba675SRob Herring			};
136*724ba675SRob Herring
137*724ba675SRob Herring			wdt@fc880000 {
138*724ba675SRob Herring				compatible = "arm,sp805", "arm,primecell";
139*724ba675SRob Herring				reg = <0xfc880000 0x1000>;
140*724ba675SRob Herring				interrupts = <12>;
141*724ba675SRob Herring				status = "disabled";
142*724ba675SRob Herring			};
143*724ba675SRob Herring
144*724ba675SRob Herring			timer@f0000000 {
145*724ba675SRob Herring				compatible = "st,spear-timer";
146*724ba675SRob Herring				reg = <0xf0000000 0x400>;
147*724ba675SRob Herring				interrupts = <2>;
148*724ba675SRob Herring			};
149*724ba675SRob Herring		};
150*724ba675SRob Herring	};
151*724ba675SRob Herring};
152