1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later 2724ba675SRob Herring/* 3724ba675SRob Herring * DTS file for all SPEAr1340 SoCs 4724ba675SRob Herring * 5724ba675SRob Herring * Copyright 2012 Viresh Kumar <vireshk@kernel.org> 6724ba675SRob Herring */ 7724ba675SRob Herring 8724ba675SRob Herring/include/ "spear13xx.dtsi" 9724ba675SRob Herring 10724ba675SRob Herring/ { 11724ba675SRob Herring compatible = "st,spear1340"; 12724ba675SRob Herring 13724ba675SRob Herring ahb { 14724ba675SRob Herring 15724ba675SRob Herring spics: spics@e0700000 { 16724ba675SRob Herring compatible = "st,spear-spics-gpio"; 17724ba675SRob Herring reg = <0xe0700000 0x1000>; 18724ba675SRob Herring st-spics,peripcfg-reg = <0x42c>; 19724ba675SRob Herring st-spics,sw-enable-bit = <21>; 20724ba675SRob Herring st-spics,cs-value-bit = <20>; 21724ba675SRob Herring st-spics,cs-enable-mask = <3>; 22724ba675SRob Herring st-spics,cs-enable-shift = <18>; 23724ba675SRob Herring gpio-controller; 24724ba675SRob Herring #gpio-cells = <2>; 25724ba675SRob Herring status = "disabled"; 26724ba675SRob Herring }; 27724ba675SRob Herring 28724ba675SRob Herring miphy0: miphy@eb800000 { 29724ba675SRob Herring compatible = "st,spear1340-miphy"; 30724ba675SRob Herring reg = <0xeb800000 0x4000>; 31724ba675SRob Herring misc = <&misc>; 32724ba675SRob Herring #phy-cells = <1>; 33724ba675SRob Herring status = "disabled"; 34724ba675SRob Herring }; 35724ba675SRob Herring 36724ba675SRob Herring ahci0: ahci@b1000000 { 37724ba675SRob Herring compatible = "snps,spear-ahci"; 38724ba675SRob Herring reg = <0xb1000000 0x10000>; 39724ba675SRob Herring interrupts = <0 72 0x4>; 40724ba675SRob Herring phys = <&miphy0 0>; 41724ba675SRob Herring phy-names = "sata-phy"; 42724ba675SRob Herring status = "disabled"; 43724ba675SRob Herring }; 44724ba675SRob Herring 45724ba675SRob Herring pcie0: pcie@b1000000 { 46724ba675SRob Herring compatible = "st,spear1340-pcie", "snps,dw-pcie"; 47724ba675SRob Herring reg = <0xb1000000 0x4000>, <0x80000000 0x20000>; 48724ba675SRob Herring reg-names = "dbi", "config"; 49724ba675SRob Herring interrupts = <0 68 0x4>; 50724ba675SRob Herring num-lanes = <1>; 51724ba675SRob Herring phys = <&miphy0 1>; 52724ba675SRob Herring phy-names = "pcie-phy"; 53724ba675SRob Herring #address-cells = <3>; 54724ba675SRob Herring #size-cells = <2>; 55724ba675SRob Herring device_type = "pci"; 56724ba675SRob Herring ranges = <0x81000000 0 0 0x80020000 0 0x00010000 /* downstream I/O */ 57724ba675SRob Herring 0x82000000 0 0x80030000 0xc0030000 0 0x0ffd0000>; /* non-prefetchable memory */ 58724ba675SRob Herring bus-range = <0x00 0xff>; 59724ba675SRob Herring status = "disabled"; 60724ba675SRob Herring }; 61724ba675SRob Herring 62724ba675SRob Herring i2s-play@b2400000 { 63724ba675SRob Herring compatible = "snps,designware-i2s"; 64724ba675SRob Herring reg = <0xb2400000 0x10000>; 65724ba675SRob Herring interrupt-names = "play_irq"; 66*a3265be8SKrzysztof Kozlowski interrupts = <0 98 0x4>, 67*a3265be8SKrzysztof Kozlowski <0 99 0x4>; 68724ba675SRob Herring play; 69724ba675SRob Herring channel = <8>; 70724ba675SRob Herring status = "disabled"; 71724ba675SRob Herring }; 72724ba675SRob Herring 73724ba675SRob Herring i2s-rec@b2000000 { 74724ba675SRob Herring compatible = "snps,designware-i2s"; 75724ba675SRob Herring reg = <0xb2000000 0x10000>; 76724ba675SRob Herring interrupt-names = "record_irq"; 77*a3265be8SKrzysztof Kozlowski interrupts = <0 100 0x4>, 78*a3265be8SKrzysztof Kozlowski <0 101 0x4>; 79724ba675SRob Herring record; 80724ba675SRob Herring channel = <8>; 81724ba675SRob Herring status = "disabled"; 82724ba675SRob Herring }; 83724ba675SRob Herring 84724ba675SRob Herring pinmux: pinmux@e0700000 { 85724ba675SRob Herring compatible = "st,spear1340-pinmux"; 86724ba675SRob Herring reg = <0xe0700000 0x1000>; 87724ba675SRob Herring #gpio-range-cells = <3>; 88724ba675SRob Herring }; 89724ba675SRob Herring 90724ba675SRob Herring pwm: pwm@e0180000 { 91724ba675SRob Herring compatible = "st,spear13xx-pwm"; 92724ba675SRob Herring reg = <0xe0180000 0x1000>; 93724ba675SRob Herring #pwm-cells = <2>; 94724ba675SRob Herring status = "disabled"; 95724ba675SRob Herring }; 96724ba675SRob Herring 97724ba675SRob Herring spdif-in@d0100000 { 98724ba675SRob Herring compatible = "st,spdif-in"; 99724ba675SRob Herring reg = < 0xd0100000 0x20000 100724ba675SRob Herring 0xd0110000 0x10000 >; 101724ba675SRob Herring interrupts = <0 84 0x4>; 102724ba675SRob Herring status = "disabled"; 103724ba675SRob Herring }; 104724ba675SRob Herring 105724ba675SRob Herring spdif-out@d0000000 { 106724ba675SRob Herring compatible = "st,spdif-out"; 107724ba675SRob Herring reg = <0xd0000000 0x20000>; 108724ba675SRob Herring interrupts = <0 85 0x4>; 109724ba675SRob Herring status = "disabled"; 110724ba675SRob Herring }; 111724ba675SRob Herring 112724ba675SRob Herring spi1: spi@5d400000 { 113724ba675SRob Herring compatible = "arm,pl022", "arm,primecell"; 114724ba675SRob Herring reg = <0x5d400000 0x1000>; 115724ba675SRob Herring #address-cells = <1>; 116724ba675SRob Herring #size-cells = <0>; 117724ba675SRob Herring interrupts = <0 99 0x4>; 118724ba675SRob Herring status = "disabled"; 119724ba675SRob Herring }; 120724ba675SRob Herring 121724ba675SRob Herring apb { 122724ba675SRob Herring i2c1: i2c@b4000000 { 123724ba675SRob Herring #address-cells = <1>; 124724ba675SRob Herring #size-cells = <0>; 125724ba675SRob Herring compatible = "snps,designware-i2c"; 126724ba675SRob Herring reg = <0xb4000000 0x1000>; 127724ba675SRob Herring interrupts = <0 104 0x4>; 128724ba675SRob Herring write-16bit; 129724ba675SRob Herring status = "disabled"; 130724ba675SRob Herring }; 131724ba675SRob Herring 132724ba675SRob Herring serial@b4100000 { 133724ba675SRob Herring compatible = "arm,pl011", "arm,primecell"; 134724ba675SRob Herring reg = <0xb4100000 0x1000>; 135724ba675SRob Herring interrupts = <0 105 0x4>; 136724ba675SRob Herring status = "disabled"; 137724ba675SRob Herring dmas = <&dwdma0 13 0 1>, 138724ba675SRob Herring <&dwdma0 12 1 0>; 139724ba675SRob Herring dma-names = "rx", "tx"; 140724ba675SRob Herring }; 141724ba675SRob Herring 142724ba675SRob Herring thermal@e07008c4 { 143724ba675SRob Herring st,thermal-flags = <0x2a00>; 144724ba675SRob Herring }; 145724ba675SRob Herring 146724ba675SRob Herring gpiopinctrl: gpio@e2800000 { 147724ba675SRob Herring compatible = "st,spear-plgpio"; 148724ba675SRob Herring reg = <0xe2800000 0x1000>; 149724ba675SRob Herring interrupts = <0 107 0x4>; 150724ba675SRob Herring #interrupt-cells = <1>; 151724ba675SRob Herring interrupt-controller; 152724ba675SRob Herring gpio-controller; 153724ba675SRob Herring #gpio-cells = <2>; 154724ba675SRob Herring gpio-ranges = <&pinmux 0 0 252>; 155724ba675SRob Herring status = "disabled"; 156724ba675SRob Herring 157724ba675SRob Herring st-plgpio,ngpio = <250>; 158724ba675SRob Herring st-plgpio,wdata-reg = <0x40>; 159724ba675SRob Herring st-plgpio,dir-reg = <0x00>; 160724ba675SRob Herring st-plgpio,ie-reg = <0x80>; 161724ba675SRob Herring st-plgpio,rdata-reg = <0x20>; 162724ba675SRob Herring st-plgpio,mis-reg = <0xa0>; 163724ba675SRob Herring st-plgpio,eit-reg = <0x60>; 164724ba675SRob Herring }; 165724ba675SRob Herring }; 166724ba675SRob Herring }; 167724ba675SRob Herring}; 168