xref: /openbmc/linux/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-drc02.dts (revision 2612e3bbc0386368a850140a6c9b990cd496a5ec)
1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Copyright (C) 2023 DH electronics GmbH
4*724ba675SRob Herring *
5*724ba675SRob Herring * DHCOM iMX6ULL variant:
6*724ba675SRob Herring * DHCM-iMX6ULL-C080-R051-F0409-SPI-E2-CAN2-SD-RTC-ADC-I-01D2
7*724ba675SRob Herring * DHCOR PCB number: 578-200 or newer
8*724ba675SRob Herring * DHCOM PCB number: 579-200 or newer
9*724ba675SRob Herring * DRC02 PCB number: 568-100 or newer (2nd ethernet by SoM)
10*724ba675SRob Herring */
11*724ba675SRob Herring/dts-v1/;
12*724ba675SRob Herring
13*724ba675SRob Herring#include "imx6ull-dhcom-som.dtsi"
14*724ba675SRob Herring#include "imx6ull-dhcom-som-cfg-sdcard.dtsi"
15*724ba675SRob Herring
16*724ba675SRob Herring/ {
17*724ba675SRob Herring	model = "DH electronics i.MX6ULL DHCOM on DRC02";
18*724ba675SRob Herring	compatible = "dh,imx6ull-dhcom-drc02", "dh,imx6ull-dhcom-som",
19*724ba675SRob Herring		     "dh,imx6ull-dhcor-som", "fsl,imx6ull";
20*724ba675SRob Herring};
21*724ba675SRob Herring
22*724ba675SRob Herring/*
23*724ba675SRob Herring * The signals for CAN2 TX and RX are routed to the DHCOM UART1 RTS/CTS pins.
24*724ba675SRob Herring * Therefore the UART RTS/CTS must be output on other DHCOM pins, see uart1
25*724ba675SRob Herring * node below.
26*724ba675SRob Herring */
27*724ba675SRob Herring&can2 {
28*724ba675SRob Herring	status = "okay";
29*724ba675SRob Herring};
30*724ba675SRob Herring
31*724ba675SRob Herring&gpio1 {
32*724ba675SRob Herring	gpio-line-names =
33*724ba675SRob Herring		"", "", "", "",
34*724ba675SRob Herring		"", "", "", "",
35*724ba675SRob Herring		"", "", "", "DRC02-In2",
36*724ba675SRob Herring		"", "", "", "",
37*724ba675SRob Herring		"", "", "DHCOM-I", "",
38*724ba675SRob Herring		"", "", "", "",
39*724ba675SRob Herring		"", "", "", "",
40*724ba675SRob Herring		"", "", "", "";
41*724ba675SRob Herring};
42*724ba675SRob Herring
43*724ba675SRob Herring&gpio4 {
44*724ba675SRob Herring	gpio-line-names =
45*724ba675SRob Herring		"", "", "", "",
46*724ba675SRob Herring		"", "", "", "",
47*724ba675SRob Herring		"", "", "", "",
48*724ba675SRob Herring		"", "", "", "",
49*724ba675SRob Herring		"", "DRC02-HW0", "DRC02-HW1", "DHCOM-M",
50*724ba675SRob Herring		"DRC02-HW2", "DHCOM-U", "DHCOM-T", "DHCOM-S",
51*724ba675SRob Herring		"DHCOM-R", "DHCOM-Q", "DHCOM-P", "DHCOM-O",
52*724ba675SRob Herring		"DHCOM-N", "", "", "";
53*724ba675SRob Herring	/*
54*724ba675SRob Herring	 * NOTE: On DRC02, the RS485_RX_En is controlled by a separate
55*724ba675SRob Herring	 * GPIO line, however the i.MX6ULL UART driver assumes RX happens
56*724ba675SRob Herring	 * during TX anyway and that it only controls drive enable DE
57*724ba675SRob Herring	 * line. Hence, the RX is always enabled here.
58*724ba675SRob Herring	 */
59*724ba675SRob Herring	rs485-rx-en-hog {
60*724ba675SRob Herring		gpio-hog;
61*724ba675SRob Herring		gpios = <25 0>; /* GPIO Q */
62*724ba675SRob Herring		line-name = "rs485-rx-en";
63*724ba675SRob Herring		output-low;
64*724ba675SRob Herring	};
65*724ba675SRob Herring};
66*724ba675SRob Herring
67*724ba675SRob Herring&gpio5 {
68*724ba675SRob Herring	gpio-line-names =
69*724ba675SRob Herring		"DHCOM-A", "DHCOM-B", "DHCOM-C", "DRC02-Out2",
70*724ba675SRob Herring		"DHCOM-E", "", "", "DRC02-Out1",
71*724ba675SRob Herring		"DRC02-In1", "DHCOM-H", "", "",
72*724ba675SRob Herring		"", "", "", "",
73*724ba675SRob Herring		"", "", "", "",
74*724ba675SRob Herring		"", "", "", "",
75*724ba675SRob Herring		"", "", "", "",
76*724ba675SRob Herring		"", "", "", "";
77*724ba675SRob Herring};
78*724ba675SRob Herring
79*724ba675SRob Herring/* DHCOM I2C2 */
80*724ba675SRob Herring&i2c1 {
81*724ba675SRob Herring	eeprom@56 {
82*724ba675SRob Herring		compatible = "atmel,24c04";
83*724ba675SRob Herring		reg = <0x56>;
84*724ba675SRob Herring		pagesize = <16>;
85*724ba675SRob Herring	};
86*724ba675SRob Herring};
87*724ba675SRob Herring
88*724ba675SRob Herring&uart1 {
89*724ba675SRob Herring	/delete-property/ uart-has-rtscts;
90*724ba675SRob Herring	rts-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>; /* GPIO I */
91*724ba675SRob Herring	cts-gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>; /* GPIO M */
92*724ba675SRob Herring};
93*724ba675SRob Herring
94*724ba675SRob Herring/* Use UART as RS485 */
95*724ba675SRob Herring&uart2 {
96*724ba675SRob Herring	/delete-property/ uart-has-rtscts;
97*724ba675SRob Herring	linux,rs485-enabled-at-boot-time;
98*724ba675SRob Herring	rts-gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; /* GPIO P */
99*724ba675SRob Herring};
100