xref: /openbmc/linux/arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi (revision 2612e3bbc0386368a850140a6c9b990cd496a5ec)
1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0+
2*724ba675SRob Herring//
3*724ba675SRob Herring// Copyright 2012 Freescale Semiconductor, Inc.
4*724ba675SRob Herring// Copyright 2011 Linaro Ltd.
5*724ba675SRob Herring
6*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h>
7*724ba675SRob Herring#include <dt-bindings/input/input.h>
8*724ba675SRob Herring
9*724ba675SRob Herring/ {
10*724ba675SRob Herring	chosen {
11*724ba675SRob Herring		stdout-path = &uart4;
12*724ba675SRob Herring	};
13*724ba675SRob Herring
14*724ba675SRob Herring	memory@10000000 {
15*724ba675SRob Herring		device_type = "memory";
16*724ba675SRob Herring		reg = <0x10000000 0x80000000>;
17*724ba675SRob Herring	};
18*724ba675SRob Herring
19*724ba675SRob Herring	leds {
20*724ba675SRob Herring		compatible = "gpio-leds";
21*724ba675SRob Herring		pinctrl-names = "default";
22*724ba675SRob Herring		pinctrl-0 = <&pinctrl_gpio_leds>;
23*724ba675SRob Herring
24*724ba675SRob Herring		led-user {
25*724ba675SRob Herring			label = "debug";
26*724ba675SRob Herring			gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>;
27*724ba675SRob Herring		};
28*724ba675SRob Herring	};
29*724ba675SRob Herring
30*724ba675SRob Herring	gpio-keys {
31*724ba675SRob Herring		compatible = "gpio-keys";
32*724ba675SRob Herring		pinctrl-names = "default";
33*724ba675SRob Herring		pinctrl-0 = <&pinctrl_gpio_keys>;
34*724ba675SRob Herring
35*724ba675SRob Herring		home {
36*724ba675SRob Herring			label = "Home";
37*724ba675SRob Herring			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
38*724ba675SRob Herring			linux,code = <KEY_HOME>;
39*724ba675SRob Herring			wakeup-source;
40*724ba675SRob Herring		};
41*724ba675SRob Herring
42*724ba675SRob Herring		back {
43*724ba675SRob Herring			label = "Back";
44*724ba675SRob Herring			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
45*724ba675SRob Herring			linux,code = <KEY_BACK>;
46*724ba675SRob Herring			wakeup-source;
47*724ba675SRob Herring		};
48*724ba675SRob Herring
49*724ba675SRob Herring		program {
50*724ba675SRob Herring			label = "Program";
51*724ba675SRob Herring			gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
52*724ba675SRob Herring			linux,code = <KEY_PROGRAM>;
53*724ba675SRob Herring			wakeup-source;
54*724ba675SRob Herring		};
55*724ba675SRob Herring
56*724ba675SRob Herring		volume-up {
57*724ba675SRob Herring			label = "Volume Up";
58*724ba675SRob Herring			gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
59*724ba675SRob Herring			linux,code = <KEY_VOLUMEUP>;
60*724ba675SRob Herring			wakeup-source;
61*724ba675SRob Herring		};
62*724ba675SRob Herring
63*724ba675SRob Herring		volume-down {
64*724ba675SRob Herring			label = "Volume Down";
65*724ba675SRob Herring			gpios = <&gpio5 14 GPIO_ACTIVE_LOW>;
66*724ba675SRob Herring			linux,code = <KEY_VOLUMEDOWN>;
67*724ba675SRob Herring			wakeup-source;
68*724ba675SRob Herring		};
69*724ba675SRob Herring	};
70*724ba675SRob Herring
71*724ba675SRob Herring	clocks {
72*724ba675SRob Herring		codec_osc: anaclk2 {
73*724ba675SRob Herring			compatible = "fixed-clock";
74*724ba675SRob Herring			#clock-cells = <0>;
75*724ba675SRob Herring			clock-frequency = <24576000>;
76*724ba675SRob Herring		};
77*724ba675SRob Herring	};
78*724ba675SRob Herring
79*724ba675SRob Herring	reg_audio: regulator-audio {
80*724ba675SRob Herring		compatible = "regulator-fixed";
81*724ba675SRob Herring		regulator-name = "cs42888_supply";
82*724ba675SRob Herring		regulator-min-microvolt = <3300000>;
83*724ba675SRob Herring		regulator-max-microvolt = <3300000>;
84*724ba675SRob Herring		regulator-always-on;
85*724ba675SRob Herring	};
86*724ba675SRob Herring
87*724ba675SRob Herring	reg_usb_h1_vbus: regulator-usb-h1-vbus {
88*724ba675SRob Herring		compatible = "regulator-fixed";
89*724ba675SRob Herring		regulator-name = "usb_h1_vbus";
90*724ba675SRob Herring		regulator-min-microvolt = <5000000>;
91*724ba675SRob Herring		regulator-max-microvolt = <5000000>;
92*724ba675SRob Herring		gpio = <&max7310_b 7 GPIO_ACTIVE_HIGH>;
93*724ba675SRob Herring		enable-active-high;
94*724ba675SRob Herring	};
95*724ba675SRob Herring
96*724ba675SRob Herring	reg_usb_otg_vbus: regulator-usb-otg-vbus {
97*724ba675SRob Herring		compatible = "regulator-fixed";
98*724ba675SRob Herring		regulator-name = "usb_otg_vbus";
99*724ba675SRob Herring		regulator-min-microvolt = <5000000>;
100*724ba675SRob Herring		regulator-max-microvolt = <5000000>;
101*724ba675SRob Herring		gpio = <&max7310_c 1 GPIO_ACTIVE_HIGH>;
102*724ba675SRob Herring		enable-active-high;
103*724ba675SRob Herring	};
104*724ba675SRob Herring
105*724ba675SRob Herring	reg_can_en: regulator-can-en {
106*724ba675SRob Herring		compatible = "regulator-fixed";
107*724ba675SRob Herring		regulator-name = "can-en";
108*724ba675SRob Herring		regulator-min-microvolt = <3300000>;
109*724ba675SRob Herring		regulator-max-microvolt = <3300000>;
110*724ba675SRob Herring		gpio = <&max7310_b 6 GPIO_ACTIVE_HIGH>;
111*724ba675SRob Herring		enable-active-high;
112*724ba675SRob Herring	};
113*724ba675SRob Herring
114*724ba675SRob Herring	reg_can_stby: regulator-can-stby {
115*724ba675SRob Herring		compatible = "regulator-fixed";
116*724ba675SRob Herring		regulator-name = "can-stby";
117*724ba675SRob Herring		regulator-min-microvolt = <3300000>;
118*724ba675SRob Herring		regulator-max-microvolt = <3300000>;
119*724ba675SRob Herring		gpio = <&max7310_b 5 GPIO_ACTIVE_HIGH>;
120*724ba675SRob Herring		enable-active-high;
121*724ba675SRob Herring		vin-supply = <&reg_can_en>;
122*724ba675SRob Herring	};
123*724ba675SRob Herring
124*724ba675SRob Herring	sound-cs42888 {
125*724ba675SRob Herring		compatible = "fsl,imx6-sabreauto-cs42888",
126*724ba675SRob Herring			"fsl,imx-audio-cs42888";
127*724ba675SRob Herring		model = "imx-cs42888";
128*724ba675SRob Herring		audio-cpu = <&esai>;
129*724ba675SRob Herring		audio-asrc = <&asrc>;
130*724ba675SRob Herring		audio-codec = <&codec>;
131*724ba675SRob Herring		audio-routing =
132*724ba675SRob Herring			"Line Out Jack", "AOUT1L",
133*724ba675SRob Herring			"Line Out Jack", "AOUT1R",
134*724ba675SRob Herring			"Line Out Jack", "AOUT2L",
135*724ba675SRob Herring			"Line Out Jack", "AOUT2R",
136*724ba675SRob Herring			"Line Out Jack", "AOUT3L",
137*724ba675SRob Herring			"Line Out Jack", "AOUT3R",
138*724ba675SRob Herring			"Line Out Jack", "AOUT4L",
139*724ba675SRob Herring			"Line Out Jack", "AOUT4R",
140*724ba675SRob Herring			"AIN1L", "Line In Jack",
141*724ba675SRob Herring			"AIN1R", "Line In Jack",
142*724ba675SRob Herring			"AIN2L", "Line In Jack",
143*724ba675SRob Herring			"AIN2R", "Line In Jack";
144*724ba675SRob Herring	};
145*724ba675SRob Herring
146*724ba675SRob Herring	sound-spdif {
147*724ba675SRob Herring		compatible = "fsl,imx-audio-spdif",
148*724ba675SRob Herring			   "fsl,imx-sabreauto-spdif";
149*724ba675SRob Herring		model = "imx-spdif";
150*724ba675SRob Herring		spdif-controller = <&spdif>;
151*724ba675SRob Herring		spdif-in;
152*724ba675SRob Herring	};
153*724ba675SRob Herring
154*724ba675SRob Herring	backlight {
155*724ba675SRob Herring		compatible = "pwm-backlight";
156*724ba675SRob Herring		pwms = <&pwm3 0 5000000>;
157*724ba675SRob Herring		brightness-levels = <0 4 8 16 32 64 128 255>;
158*724ba675SRob Herring		default-brightness-level = <7>;
159*724ba675SRob Herring		status = "okay";
160*724ba675SRob Herring	};
161*724ba675SRob Herring
162*724ba675SRob Herring	i2cmux {
163*724ba675SRob Herring		compatible = "i2c-mux-gpio";
164*724ba675SRob Herring		#address-cells = <1>;
165*724ba675SRob Herring		#size-cells = <0>;
166*724ba675SRob Herring		pinctrl-names = "default";
167*724ba675SRob Herring		pinctrl-0 = <&pinctrl_i2c3mux>;
168*724ba675SRob Herring		mux-gpios = <&gpio5 4 0>;
169*724ba675SRob Herring		i2c-parent = <&i2c3>;
170*724ba675SRob Herring		idle-state = <0>;
171*724ba675SRob Herring
172*724ba675SRob Herring		i2c@1 {
173*724ba675SRob Herring			#address-cells = <1>;
174*724ba675SRob Herring			#size-cells = <0>;
175*724ba675SRob Herring			reg = <1>;
176*724ba675SRob Herring
177*724ba675SRob Herring			adv7180: camera@21 {
178*724ba675SRob Herring				compatible = "adi,adv7180";
179*724ba675SRob Herring				reg = <0x21>;
180*724ba675SRob Herring				powerdown-gpios = <&max7310_b 2 GPIO_ACTIVE_LOW>;
181*724ba675SRob Herring				interrupt-parent = <&gpio1>;
182*724ba675SRob Herring				interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
183*724ba675SRob Herring
184*724ba675SRob Herring				port {
185*724ba675SRob Herring					adv7180_to_ipu1_csi0_mux: endpoint {
186*724ba675SRob Herring						remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
187*724ba675SRob Herring						bus-width = <8>;
188*724ba675SRob Herring					};
189*724ba675SRob Herring				};
190*724ba675SRob Herring			};
191*724ba675SRob Herring
192*724ba675SRob Herring			max7310_a: gpio@30 {
193*724ba675SRob Herring				compatible = "maxim,max7310";
194*724ba675SRob Herring				reg = <0x30>;
195*724ba675SRob Herring				gpio-controller;
196*724ba675SRob Herring				#gpio-cells = <2>;
197*724ba675SRob Herring			};
198*724ba675SRob Herring
199*724ba675SRob Herring			max7310_b: gpio@32 {
200*724ba675SRob Herring				compatible = "maxim,max7310";
201*724ba675SRob Herring				reg = <0x32>;
202*724ba675SRob Herring				gpio-controller;
203*724ba675SRob Herring				#gpio-cells = <2>;
204*724ba675SRob Herring				pinctrl-names = "default";
205*724ba675SRob Herring				pinctrl-0 = <&pinctrl_max7310>;
206*724ba675SRob Herring				reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
207*724ba675SRob Herring			};
208*724ba675SRob Herring
209*724ba675SRob Herring			max7310_c: gpio@34 {
210*724ba675SRob Herring				compatible = "maxim,max7310";
211*724ba675SRob Herring				reg = <0x34>;
212*724ba675SRob Herring				gpio-controller;
213*724ba675SRob Herring				#gpio-cells = <2>;
214*724ba675SRob Herring			};
215*724ba675SRob Herring
216*724ba675SRob Herring			light-sensor@44 {
217*724ba675SRob Herring				compatible = "isil,isl29023";
218*724ba675SRob Herring				reg = <0x44>;
219*724ba675SRob Herring				interrupt-parent = <&gpio5>;
220*724ba675SRob Herring				interrupts = <17 IRQ_TYPE_EDGE_FALLING>;
221*724ba675SRob Herring			};
222*724ba675SRob Herring
223*724ba675SRob Herring			magnetometer@e {
224*724ba675SRob Herring				compatible = "fsl,mag3110";
225*724ba675SRob Herring				reg = <0x0e>;
226*724ba675SRob Herring				interrupt-parent = <&gpio2>;
227*724ba675SRob Herring				interrupts = <29 IRQ_TYPE_EDGE_RISING>;
228*724ba675SRob Herring			};
229*724ba675SRob Herring
230*724ba675SRob Herring			accelerometer@1c {
231*724ba675SRob Herring				compatible = "fsl,mma8451";
232*724ba675SRob Herring				reg = <0x1c>;
233*724ba675SRob Herring				pinctrl-names = "default";
234*724ba675SRob Herring				pinctrl-0 = <&pinctrl_mma8451_int>;
235*724ba675SRob Herring				interrupt-parent = <&gpio6>;
236*724ba675SRob Herring				interrupts = <31 IRQ_TYPE_LEVEL_LOW>;
237*724ba675SRob Herring			};
238*724ba675SRob Herring		};
239*724ba675SRob Herring	};
240*724ba675SRob Herring};
241*724ba675SRob Herring
242*724ba675SRob Herring&ipu1_csi0_from_ipu1_csi0_mux {
243*724ba675SRob Herring	bus-width = <8>;
244*724ba675SRob Herring};
245*724ba675SRob Herring
246*724ba675SRob Herring&ipu1_csi0_mux_from_parallel_sensor {
247*724ba675SRob Herring	remote-endpoint = <&adv7180_to_ipu1_csi0_mux>;
248*724ba675SRob Herring	bus-width = <8>;
249*724ba675SRob Herring};
250*724ba675SRob Herring
251*724ba675SRob Herring&ipu1_csi0 {
252*724ba675SRob Herring	pinctrl-names = "default";
253*724ba675SRob Herring	pinctrl-0 = <&pinctrl_ipu1_csi0>;
254*724ba675SRob Herring};
255*724ba675SRob Herring
256*724ba675SRob Herring&clks {
257*724ba675SRob Herring	assigned-clocks = <&clks IMX6QDL_PLL4_BYPASS_SRC>,
258*724ba675SRob Herring			  <&clks IMX6QDL_PLL4_BYPASS>,
259*724ba675SRob Herring			  <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
260*724ba675SRob Herring			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
261*724ba675SRob Herring			  <&clks IMX6QDL_CLK_PLL4_POST_DIV>;
262*724ba675SRob Herring	assigned-clock-parents = <&clks IMX6QDL_CLK_LVDS2_IN>,
263*724ba675SRob Herring				 <&clks IMX6QDL_PLL4_BYPASS_SRC>,
264*724ba675SRob Herring				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
265*724ba675SRob Herring				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
266*724ba675SRob Herring	assigned-clock-rates = <0>, <0>, <0>, <0>, <24576000>;
267*724ba675SRob Herring};
268*724ba675SRob Herring
269*724ba675SRob Herring&ecspi1 {
270*724ba675SRob Herring	cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
271*724ba675SRob Herring	pinctrl-names = "default";
272*724ba675SRob Herring	pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
273*724ba675SRob Herring	status = "disabled"; /* pin conflict with WEIM NOR */
274*724ba675SRob Herring
275*724ba675SRob Herring	flash: flash@0 {
276*724ba675SRob Herring		#address-cells = <1>;
277*724ba675SRob Herring		#size-cells = <1>;
278*724ba675SRob Herring		compatible = "st,m25p32", "jedec,spi-nor";
279*724ba675SRob Herring		spi-max-frequency = <20000000>;
280*724ba675SRob Herring		reg = <0>;
281*724ba675SRob Herring	};
282*724ba675SRob Herring};
283*724ba675SRob Herring
284*724ba675SRob Herring&esai {
285*724ba675SRob Herring	pinctrl-names = "default";
286*724ba675SRob Herring	pinctrl-0 = <&pinctrl_esai>;
287*724ba675SRob Herring	assigned-clocks = <&clks IMX6QDL_CLK_ESAI_SEL>,
288*724ba675SRob Herring			  <&clks IMX6QDL_CLK_ESAI_EXTAL>;
289*724ba675SRob Herring	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
290*724ba675SRob Herring	assigned-clock-rates = <0>, <24576000>;
291*724ba675SRob Herring	status = "okay";
292*724ba675SRob Herring};
293*724ba675SRob Herring
294*724ba675SRob Herring&fec {
295*724ba675SRob Herring	pinctrl-names = "default";
296*724ba675SRob Herring	pinctrl-0 = <&pinctrl_enet>;
297*724ba675SRob Herring	phy-mode = "rgmii-id";
298*724ba675SRob Herring	/delete-property/ interrupts;
299*724ba675SRob Herring	interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
300*724ba675SRob Herring			      <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
301*724ba675SRob Herring	fsl,err006687-workaround-present;
302*724ba675SRob Herring	fsl,magic-packet;
303*724ba675SRob Herring	status = "okay";
304*724ba675SRob Herring};
305*724ba675SRob Herring
306*724ba675SRob Herring&can1 {
307*724ba675SRob Herring	pinctrl-names = "default";
308*724ba675SRob Herring	pinctrl-0 = <&pinctrl_flexcan1>;
309*724ba675SRob Herring	xceiver-supply = <&reg_can_stby>;
310*724ba675SRob Herring	status = "disabled"; /* pin conflict with fec */
311*724ba675SRob Herring};
312*724ba675SRob Herring
313*724ba675SRob Herring&can2 {
314*724ba675SRob Herring	pinctrl-names = "default";
315*724ba675SRob Herring	pinctrl-0 = <&pinctrl_flexcan2>;
316*724ba675SRob Herring	xceiver-supply = <&reg_can_stby>;
317*724ba675SRob Herring	status = "okay";
318*724ba675SRob Herring};
319*724ba675SRob Herring
320*724ba675SRob Herring&gpmi {
321*724ba675SRob Herring	pinctrl-names = "default";
322*724ba675SRob Herring	pinctrl-0 = <&pinctrl_gpmi_nand>;
323*724ba675SRob Herring	status = "okay";
324*724ba675SRob Herring};
325*724ba675SRob Herring
326*724ba675SRob Herring&hdmi {
327*724ba675SRob Herring	pinctrl-names = "default";
328*724ba675SRob Herring	pinctrl-0 = <&pinctrl_hdmi_cec>;
329*724ba675SRob Herring	ddc-i2c-bus = <&i2c2>;
330*724ba675SRob Herring	status = "okay";
331*724ba675SRob Herring};
332*724ba675SRob Herring
333*724ba675SRob Herring&i2c2 {
334*724ba675SRob Herring	clock-frequency = <100000>;
335*724ba675SRob Herring	pinctrl-names = "default";
336*724ba675SRob Herring	pinctrl-0 = <&pinctrl_i2c2>;
337*724ba675SRob Herring	status = "okay";
338*724ba675SRob Herring
339*724ba675SRob Herring	pmic: pmic@8 {
340*724ba675SRob Herring		compatible = "fsl,pfuze100";
341*724ba675SRob Herring		reg = <0x08>;
342*724ba675SRob Herring
343*724ba675SRob Herring		regulators {
344*724ba675SRob Herring			sw1a_reg: sw1ab {
345*724ba675SRob Herring				regulator-min-microvolt = <300000>;
346*724ba675SRob Herring				regulator-max-microvolt = <1875000>;
347*724ba675SRob Herring				regulator-boot-on;
348*724ba675SRob Herring				regulator-always-on;
349*724ba675SRob Herring				regulator-ramp-delay = <6250>;
350*724ba675SRob Herring			};
351*724ba675SRob Herring
352*724ba675SRob Herring			sw1c_reg: sw1c {
353*724ba675SRob Herring				regulator-min-microvolt = <300000>;
354*724ba675SRob Herring				regulator-max-microvolt = <1875000>;
355*724ba675SRob Herring				regulator-boot-on;
356*724ba675SRob Herring				regulator-always-on;
357*724ba675SRob Herring				regulator-ramp-delay = <6250>;
358*724ba675SRob Herring			};
359*724ba675SRob Herring
360*724ba675SRob Herring			sw2_reg: sw2 {
361*724ba675SRob Herring				regulator-min-microvolt = <800000>;
362*724ba675SRob Herring				regulator-max-microvolt = <3300000>;
363*724ba675SRob Herring				regulator-boot-on;
364*724ba675SRob Herring				regulator-always-on;
365*724ba675SRob Herring			};
366*724ba675SRob Herring
367*724ba675SRob Herring			sw3a_reg: sw3a {
368*724ba675SRob Herring				regulator-min-microvolt = <400000>;
369*724ba675SRob Herring				regulator-max-microvolt = <1975000>;
370*724ba675SRob Herring				regulator-boot-on;
371*724ba675SRob Herring				regulator-always-on;
372*724ba675SRob Herring			};
373*724ba675SRob Herring
374*724ba675SRob Herring			sw3b_reg: sw3b {
375*724ba675SRob Herring				regulator-min-microvolt = <400000>;
376*724ba675SRob Herring				regulator-max-microvolt = <1975000>;
377*724ba675SRob Herring				regulator-boot-on;
378*724ba675SRob Herring				regulator-always-on;
379*724ba675SRob Herring			};
380*724ba675SRob Herring
381*724ba675SRob Herring			sw4_reg: sw4 {
382*724ba675SRob Herring				regulator-min-microvolt = <800000>;
383*724ba675SRob Herring				regulator-max-microvolt = <3300000>;
384*724ba675SRob Herring			};
385*724ba675SRob Herring
386*724ba675SRob Herring			swbst_reg: swbst {
387*724ba675SRob Herring				regulator-min-microvolt = <5000000>;
388*724ba675SRob Herring				regulator-max-microvolt = <5150000>;
389*724ba675SRob Herring			};
390*724ba675SRob Herring
391*724ba675SRob Herring			snvs_reg: vsnvs {
392*724ba675SRob Herring				regulator-min-microvolt = <1000000>;
393*724ba675SRob Herring				regulator-max-microvolt = <3000000>;
394*724ba675SRob Herring				regulator-boot-on;
395*724ba675SRob Herring				regulator-always-on;
396*724ba675SRob Herring			};
397*724ba675SRob Herring
398*724ba675SRob Herring			vref_reg: vrefddr {
399*724ba675SRob Herring				regulator-boot-on;
400*724ba675SRob Herring				regulator-always-on;
401*724ba675SRob Herring			};
402*724ba675SRob Herring
403*724ba675SRob Herring			vgen1_reg: vgen1 {
404*724ba675SRob Herring				regulator-min-microvolt = <800000>;
405*724ba675SRob Herring				regulator-max-microvolt = <1550000>;
406*724ba675SRob Herring			};
407*724ba675SRob Herring
408*724ba675SRob Herring			vgen2_reg: vgen2 {
409*724ba675SRob Herring				regulator-min-microvolt = <800000>;
410*724ba675SRob Herring				regulator-max-microvolt = <1550000>;
411*724ba675SRob Herring			};
412*724ba675SRob Herring
413*724ba675SRob Herring			vgen3_reg: vgen3 {
414*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
415*724ba675SRob Herring				regulator-max-microvolt = <3300000>;
416*724ba675SRob Herring			};
417*724ba675SRob Herring
418*724ba675SRob Herring			vgen4_reg: vgen4 {
419*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
420*724ba675SRob Herring				regulator-max-microvolt = <3300000>;
421*724ba675SRob Herring				regulator-always-on;
422*724ba675SRob Herring			};
423*724ba675SRob Herring
424*724ba675SRob Herring			vgen5_reg: vgen5 {
425*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
426*724ba675SRob Herring				regulator-max-microvolt = <3300000>;
427*724ba675SRob Herring				regulator-always-on;
428*724ba675SRob Herring			};
429*724ba675SRob Herring
430*724ba675SRob Herring			vgen6_reg: vgen6 {
431*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
432*724ba675SRob Herring				regulator-max-microvolt = <3300000>;
433*724ba675SRob Herring				regulator-always-on;
434*724ba675SRob Herring			};
435*724ba675SRob Herring		};
436*724ba675SRob Herring	};
437*724ba675SRob Herring
438*724ba675SRob Herring	codec: cs42888@48 {
439*724ba675SRob Herring		compatible = "cirrus,cs42888";
440*724ba675SRob Herring		reg = <0x48>;
441*724ba675SRob Herring		clocks = <&codec_osc>;
442*724ba675SRob Herring		clock-names = "mclk";
443*724ba675SRob Herring		VA-supply = <&reg_audio>;
444*724ba675SRob Herring		VD-supply = <&reg_audio>;
445*724ba675SRob Herring		VLS-supply = <&reg_audio>;
446*724ba675SRob Herring		VLC-supply = <&reg_audio>;
447*724ba675SRob Herring	};
448*724ba675SRob Herring
449*724ba675SRob Herring	touchscreen@4 {
450*724ba675SRob Herring		compatible = "eeti,egalax_ts";
451*724ba675SRob Herring		reg = <0x04>;
452*724ba675SRob Herring		pinctrl-names = "default";
453*724ba675SRob Herring		pinctrl-0 = <&pinctrl_egalax_int>;
454*724ba675SRob Herring		interrupt-parent = <&gpio2>;
455*724ba675SRob Herring		interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
456*724ba675SRob Herring		wakeup-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
457*724ba675SRob Herring	};
458*724ba675SRob Herring};
459*724ba675SRob Herring
460*724ba675SRob Herring&i2c3 {
461*724ba675SRob Herring	pinctrl-names = "default";
462*724ba675SRob Herring	pinctrl-0 = <&pinctrl_i2c3>;
463*724ba675SRob Herring	status = "okay";
464*724ba675SRob Herring};
465*724ba675SRob Herring
466*724ba675SRob Herring&iomuxc {
467*724ba675SRob Herring	pinctrl-names = "default";
468*724ba675SRob Herring	pinctrl-0 = <&pinctrl_hog>;
469*724ba675SRob Herring
470*724ba675SRob Herring	imx6qdl-sabreauto {
471*724ba675SRob Herring		pinctrl_hog: hoggrp {
472*724ba675SRob Herring			fsl,pins = <
473*724ba675SRob Herring				MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000
474*724ba675SRob Herring				MX6QDL_PAD_SD2_DAT2__GPIO1_IO13  0x80000000
475*724ba675SRob Herring				MX6QDL_PAD_GPIO_18__SD3_VSELECT 0x17059
476*724ba675SRob Herring			>;
477*724ba675SRob Herring		};
478*724ba675SRob Herring
479*724ba675SRob Herring		pinctrl_ecspi1: ecspi1grp {
480*724ba675SRob Herring			fsl,pins = <
481*724ba675SRob Herring				MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1
482*724ba675SRob Herring				MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1
483*724ba675SRob Herring				MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1
484*724ba675SRob Herring			>;
485*724ba675SRob Herring		};
486*724ba675SRob Herring
487*724ba675SRob Herring		pinctrl_ecspi1_cs: ecspi1cs {
488*724ba675SRob Herring			fsl,pins = <
489*724ba675SRob Herring				MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
490*724ba675SRob Herring			>;
491*724ba675SRob Herring		};
492*724ba675SRob Herring
493*724ba675SRob Herring		pinctrl_egalax_int: egalax-intgrp {
494*724ba675SRob Herring			fsl,pins = <
495*724ba675SRob Herring				MX6QDL_PAD_EIM_EB0__GPIO2_IO28		0xb0b1
496*724ba675SRob Herring			>;
497*724ba675SRob Herring		};
498*724ba675SRob Herring
499*724ba675SRob Herring		pinctrl_enet: enetgrp {
500*724ba675SRob Herring			fsl,pins = <
501*724ba675SRob Herring				MX6QDL_PAD_KEY_COL1__ENET_MDIO		0x1b0b0
502*724ba675SRob Herring				MX6QDL_PAD_KEY_COL2__ENET_MDC		0x1b0b0
503*724ba675SRob Herring				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
504*724ba675SRob Herring				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
505*724ba675SRob Herring				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
506*724ba675SRob Herring				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
507*724ba675SRob Herring				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
508*724ba675SRob Herring				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
509*724ba675SRob Herring				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
510*724ba675SRob Herring				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
511*724ba675SRob Herring				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
512*724ba675SRob Herring				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
513*724ba675SRob Herring				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
514*724ba675SRob Herring				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
515*724ba675SRob Herring				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
516*724ba675SRob Herring				MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1
517*724ba675SRob Herring			>;
518*724ba675SRob Herring		};
519*724ba675SRob Herring
520*724ba675SRob Herring		pinctrl_esai: esaigrp {
521*724ba675SRob Herring			fsl,pins = <
522*724ba675SRob Herring				MX6QDL_PAD_ENET_CRS_DV__ESAI_TX_CLK 0x1b030
523*724ba675SRob Herring				MX6QDL_PAD_ENET_RXD1__ESAI_TX_FS    0x1b030
524*724ba675SRob Herring				MX6QDL_PAD_ENET_TX_EN__ESAI_TX3_RX2 0x1b030
525*724ba675SRob Herring				MX6QDL_PAD_GPIO_5__ESAI_TX2_RX3     0x1b030
526*724ba675SRob Herring				MX6QDL_PAD_ENET_TXD0__ESAI_TX4_RX1  0x1b030
527*724ba675SRob Herring				MX6QDL_PAD_ENET_MDC__ESAI_TX5_RX0   0x1b030
528*724ba675SRob Herring				MX6QDL_PAD_GPIO_17__ESAI_TX0        0x1b030
529*724ba675SRob Herring				MX6QDL_PAD_NANDF_CS3__ESAI_TX1      0x1b030
530*724ba675SRob Herring				MX6QDL_PAD_ENET_MDIO__ESAI_RX_CLK   0x1b030
531*724ba675SRob Herring				MX6QDL_PAD_GPIO_9__ESAI_RX_FS       0x1b030
532*724ba675SRob Herring			>;
533*724ba675SRob Herring		};
534*724ba675SRob Herring
535*724ba675SRob Herring		pinctrl_flexcan1: flexcan1grp {
536*724ba675SRob Herring			fsl,pins = <
537*724ba675SRob Herring				MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x17059
538*724ba675SRob Herring				MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x17059
539*724ba675SRob Herring			>;
540*724ba675SRob Herring		};
541*724ba675SRob Herring
542*724ba675SRob Herring		pinctrl_flexcan2: flexcan2grp {
543*724ba675SRob Herring			fsl,pins = <
544*724ba675SRob Herring				MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX	0x17059
545*724ba675SRob Herring				MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX	0x17059
546*724ba675SRob Herring			>;
547*724ba675SRob Herring		};
548*724ba675SRob Herring
549*724ba675SRob Herring		pinctrl_gpio_keys: gpiokeysgrp {
550*724ba675SRob Herring			fsl,pins = <
551*724ba675SRob Herring				MX6QDL_PAD_SD2_CMD__GPIO1_IO11		0x1b0b0
552*724ba675SRob Herring				MX6QDL_PAD_SD2_DAT3__GPIO1_IO12		0x1b0b0
553*724ba675SRob Herring				MX6QDL_PAD_SD4_DAT4__GPIO2_IO12		0x1b0b0
554*724ba675SRob Herring				MX6QDL_PAD_SD4_DAT7__GPIO2_IO15		0x1b0b0
555*724ba675SRob Herring				MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14	0x1b0b0
556*724ba675SRob Herring			>;
557*724ba675SRob Herring		};
558*724ba675SRob Herring
559*724ba675SRob Herring		pinctrl_gpio_leds: gpioledsgrp {
560*724ba675SRob Herring			fsl,pins = <
561*724ba675SRob Herring				MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15	0x80000000
562*724ba675SRob Herring			>;
563*724ba675SRob Herring		};
564*724ba675SRob Herring
565*724ba675SRob Herring		pinctrl_gpmi_nand: gpminandgrp {
566*724ba675SRob Herring			fsl,pins = <
567*724ba675SRob Herring				MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
568*724ba675SRob Herring				MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
569*724ba675SRob Herring				MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
570*724ba675SRob Herring				MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
571*724ba675SRob Herring				MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
572*724ba675SRob Herring				MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	0xb0b1
573*724ba675SRob Herring				MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
574*724ba675SRob Herring				MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
575*724ba675SRob Herring				MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
576*724ba675SRob Herring				MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
577*724ba675SRob Herring				MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
578*724ba675SRob Herring				MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
579*724ba675SRob Herring				MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
580*724ba675SRob Herring				MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
581*724ba675SRob Herring				MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
582*724ba675SRob Herring				MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
583*724ba675SRob Herring				MX6QDL_PAD_SD4_DAT0__NAND_DQS		0x00b1
584*724ba675SRob Herring			>;
585*724ba675SRob Herring		};
586*724ba675SRob Herring
587*724ba675SRob Herring		pinctrl_hdmi_cec: hdmicecgrp {
588*724ba675SRob Herring			fsl,pins = <
589*724ba675SRob Herring				MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE	0x1f8b0
590*724ba675SRob Herring			>;
591*724ba675SRob Herring		};
592*724ba675SRob Herring
593*724ba675SRob Herring		pinctrl_i2c2: i2c2grp {
594*724ba675SRob Herring			fsl,pins = <
595*724ba675SRob Herring				MX6QDL_PAD_EIM_EB2__I2C2_SCL	0x4001b8b1
596*724ba675SRob Herring				MX6QDL_PAD_KEY_ROW3__I2C2_SDA	0x4001b8b1
597*724ba675SRob Herring			>;
598*724ba675SRob Herring		};
599*724ba675SRob Herring
600*724ba675SRob Herring		pinctrl_i2c3: i2c3grp {
601*724ba675SRob Herring			fsl,pins = <
602*724ba675SRob Herring				MX6QDL_PAD_GPIO_3__I2C3_SCL  0x4001b8b1
603*724ba675SRob Herring				MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
604*724ba675SRob Herring			>;
605*724ba675SRob Herring		};
606*724ba675SRob Herring
607*724ba675SRob Herring		pinctrl_i2c3mux: i2c3muxgrp {
608*724ba675SRob Herring			fsl,pins = <
609*724ba675SRob Herring				MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x0b0b1
610*724ba675SRob Herring			>;
611*724ba675SRob Herring		};
612*724ba675SRob Herring
613*724ba675SRob Herring		pinctrl_ipu1_csi0: ipu1csi0grp {
614*724ba675SRob Herring			fsl,pins = <
615*724ba675SRob Herring				MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12  0x1b0b0
616*724ba675SRob Herring				MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13  0x1b0b0
617*724ba675SRob Herring				MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14  0x1b0b0
618*724ba675SRob Herring				MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15  0x1b0b0
619*724ba675SRob Herring				MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16  0x1b0b0
620*724ba675SRob Herring				MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17  0x1b0b0
621*724ba675SRob Herring				MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18  0x1b0b0
622*724ba675SRob Herring				MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19  0x1b0b0
623*724ba675SRob Herring				MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
624*724ba675SRob Herring				MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC    0x1b0b0
625*724ba675SRob Herring				MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC   0x1b0b0
626*724ba675SRob Herring			>;
627*724ba675SRob Herring		};
628*724ba675SRob Herring
629*724ba675SRob Herring		pinctrl_max7310: max7310grp {
630*724ba675SRob Herring			fsl,pins = <
631*724ba675SRob Herring				MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x1b0b0
632*724ba675SRob Herring			>;
633*724ba675SRob Herring		};
634*724ba675SRob Herring
635*724ba675SRob Herring		pinctrl_mma8451_int: mma8451intgrp {
636*724ba675SRob Herring			fsl,pins = <
637*724ba675SRob Herring				MX6QDL_PAD_EIM_BCLK__GPIO6_IO31		0xb0b1
638*724ba675SRob Herring			>;
639*724ba675SRob Herring		};
640*724ba675SRob Herring
641*724ba675SRob Herring		pinctrl_pwm3: pwm1grp {
642*724ba675SRob Herring			fsl,pins = <
643*724ba675SRob Herring				MX6QDL_PAD_SD4_DAT1__PWM3_OUT		0x1b0b1
644*724ba675SRob Herring			>;
645*724ba675SRob Herring		};
646*724ba675SRob Herring
647*724ba675SRob Herring		pinctrl_gpt_input_capture0: gptinputcapture0grp {
648*724ba675SRob Herring			fsl,pins = <
649*724ba675SRob Herring				MX6QDL_PAD_SD1_DAT0__GPT_CAPTURE1	0x1b0b0
650*724ba675SRob Herring			>;
651*724ba675SRob Herring		};
652*724ba675SRob Herring
653*724ba675SRob Herring		pinctrl_gpt_input_capture1: gptinputcapture1grp {
654*724ba675SRob Herring			fsl,pins = <
655*724ba675SRob Herring				MX6QDL_PAD_SD1_DAT1__GPT_CAPTURE2	0x1b0b0
656*724ba675SRob Herring			>;
657*724ba675SRob Herring		};
658*724ba675SRob Herring
659*724ba675SRob Herring		pinctrl_spdif: spdifgrp {
660*724ba675SRob Herring			fsl,pins = <
661*724ba675SRob Herring				MX6QDL_PAD_KEY_COL3__SPDIF_IN 0x1b0b0
662*724ba675SRob Herring			>;
663*724ba675SRob Herring		};
664*724ba675SRob Herring
665*724ba675SRob Herring		pinctrl_uart4: uart4grp {
666*724ba675SRob Herring			fsl,pins = <
667*724ba675SRob Herring				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1
668*724ba675SRob Herring				MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1
669*724ba675SRob Herring			>;
670*724ba675SRob Herring		};
671*724ba675SRob Herring
672*724ba675SRob Herring		pinctrl_usbotg: usbotggrp {
673*724ba675SRob Herring			fsl,pins = <
674*724ba675SRob Herring				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
675*724ba675SRob Herring			>;
676*724ba675SRob Herring		};
677*724ba675SRob Herring
678*724ba675SRob Herring		pinctrl_usdhc3: usdhc3grp {
679*724ba675SRob Herring			fsl,pins = <
680*724ba675SRob Herring				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
681*724ba675SRob Herring				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
682*724ba675SRob Herring				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
683*724ba675SRob Herring				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
684*724ba675SRob Herring				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
685*724ba675SRob Herring				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
686*724ba675SRob Herring				MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059
687*724ba675SRob Herring				MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059
688*724ba675SRob Herring				MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059
689*724ba675SRob Herring				MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059
690*724ba675SRob Herring			>;
691*724ba675SRob Herring		};
692*724ba675SRob Herring
693*724ba675SRob Herring		pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
694*724ba675SRob Herring			fsl,pins = <
695*724ba675SRob Herring				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170b9
696*724ba675SRob Herring				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100b9
697*724ba675SRob Herring				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170b9
698*724ba675SRob Herring				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170b9
699*724ba675SRob Herring				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170b9
700*724ba675SRob Herring				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170b9
701*724ba675SRob Herring				MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x170b9
702*724ba675SRob Herring				MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x170b9
703*724ba675SRob Herring				MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x170b9
704*724ba675SRob Herring				MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x170b9
705*724ba675SRob Herring			>;
706*724ba675SRob Herring		};
707*724ba675SRob Herring
708*724ba675SRob Herring		pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
709*724ba675SRob Herring			fsl,pins = <
710*724ba675SRob Herring				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170f9
711*724ba675SRob Herring				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100f9
712*724ba675SRob Herring				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170f9
713*724ba675SRob Herring				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170f9
714*724ba675SRob Herring				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170f9
715*724ba675SRob Herring				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170f9
716*724ba675SRob Herring				MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x170f9
717*724ba675SRob Herring				MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x170f9
718*724ba675SRob Herring				MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x170f9
719*724ba675SRob Herring				MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x170f9
720*724ba675SRob Herring			>;
721*724ba675SRob Herring		};
722*724ba675SRob Herring
723*724ba675SRob Herring		pinctrl_weim_cs0: weimcs0grp {
724*724ba675SRob Herring			fsl,pins = <
725*724ba675SRob Herring				MX6QDL_PAD_EIM_CS0__EIM_CS0_B		0xb0b1
726*724ba675SRob Herring			>;
727*724ba675SRob Herring		};
728*724ba675SRob Herring
729*724ba675SRob Herring		pinctrl_weim_nor: weimnorgrp {
730*724ba675SRob Herring			fsl,pins = <
731*724ba675SRob Herring				MX6QDL_PAD_EIM_OE__EIM_OE_B		0xb0b1
732*724ba675SRob Herring				MX6QDL_PAD_EIM_RW__EIM_RW		0xb0b1
733*724ba675SRob Herring				MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B		0xb060
734*724ba675SRob Herring				MX6QDL_PAD_EIM_D16__EIM_DATA16		0x1b0b0
735*724ba675SRob Herring				MX6QDL_PAD_EIM_D17__EIM_DATA17		0x1b0b0
736*724ba675SRob Herring				MX6QDL_PAD_EIM_D18__EIM_DATA18		0x1b0b0
737*724ba675SRob Herring				MX6QDL_PAD_EIM_D19__EIM_DATA19		0x1b0b0
738*724ba675SRob Herring				MX6QDL_PAD_EIM_D20__EIM_DATA20		0x1b0b0
739*724ba675SRob Herring				MX6QDL_PAD_EIM_D21__EIM_DATA21		0x1b0b0
740*724ba675SRob Herring				MX6QDL_PAD_EIM_D22__EIM_DATA22		0x1b0b0
741*724ba675SRob Herring				MX6QDL_PAD_EIM_D23__EIM_DATA23		0x1b0b0
742*724ba675SRob Herring				MX6QDL_PAD_EIM_D24__EIM_DATA24		0x1b0b0
743*724ba675SRob Herring				MX6QDL_PAD_EIM_D25__EIM_DATA25		0x1b0b0
744*724ba675SRob Herring				MX6QDL_PAD_EIM_D26__EIM_DATA26		0x1b0b0
745*724ba675SRob Herring				MX6QDL_PAD_EIM_D27__EIM_DATA27		0x1b0b0
746*724ba675SRob Herring				MX6QDL_PAD_EIM_D28__EIM_DATA28		0x1b0b0
747*724ba675SRob Herring				MX6QDL_PAD_EIM_D29__EIM_DATA29		0x1b0b0
748*724ba675SRob Herring				MX6QDL_PAD_EIM_D30__EIM_DATA30		0x1b0b0
749*724ba675SRob Herring				MX6QDL_PAD_EIM_D31__EIM_DATA31		0x1b0b0
750*724ba675SRob Herring				MX6QDL_PAD_EIM_A23__EIM_ADDR23		0xb0b1
751*724ba675SRob Herring				MX6QDL_PAD_EIM_A22__EIM_ADDR22		0xb0b1
752*724ba675SRob Herring				MX6QDL_PAD_EIM_A21__EIM_ADDR21		0xb0b1
753*724ba675SRob Herring				MX6QDL_PAD_EIM_A20__EIM_ADDR20		0xb0b1
754*724ba675SRob Herring				MX6QDL_PAD_EIM_A19__EIM_ADDR19		0xb0b1
755*724ba675SRob Herring				MX6QDL_PAD_EIM_A18__EIM_ADDR18		0xb0b1
756*724ba675SRob Herring				MX6QDL_PAD_EIM_A17__EIM_ADDR17		0xb0b1
757*724ba675SRob Herring				MX6QDL_PAD_EIM_A16__EIM_ADDR16		0xb0b1
758*724ba675SRob Herring				MX6QDL_PAD_EIM_DA15__EIM_AD15		0xb0b1
759*724ba675SRob Herring				MX6QDL_PAD_EIM_DA14__EIM_AD14		0xb0b1
760*724ba675SRob Herring				MX6QDL_PAD_EIM_DA13__EIM_AD13		0xb0b1
761*724ba675SRob Herring				MX6QDL_PAD_EIM_DA12__EIM_AD12		0xb0b1
762*724ba675SRob Herring				MX6QDL_PAD_EIM_DA11__EIM_AD11		0xb0b1
763*724ba675SRob Herring				MX6QDL_PAD_EIM_DA10__EIM_AD10		0xb0b1
764*724ba675SRob Herring				MX6QDL_PAD_EIM_DA9__EIM_AD09		0xb0b1
765*724ba675SRob Herring				MX6QDL_PAD_EIM_DA8__EIM_AD08		0xb0b1
766*724ba675SRob Herring				MX6QDL_PAD_EIM_DA7__EIM_AD07		0xb0b1
767*724ba675SRob Herring				MX6QDL_PAD_EIM_DA6__EIM_AD06		0xb0b1
768*724ba675SRob Herring				MX6QDL_PAD_EIM_DA5__EIM_AD05		0xb0b1
769*724ba675SRob Herring				MX6QDL_PAD_EIM_DA4__EIM_AD04		0xb0b1
770*724ba675SRob Herring				MX6QDL_PAD_EIM_DA3__EIM_AD03		0xb0b1
771*724ba675SRob Herring				MX6QDL_PAD_EIM_DA2__EIM_AD02		0xb0b1
772*724ba675SRob Herring				MX6QDL_PAD_EIM_DA1__EIM_AD01		0xb0b1
773*724ba675SRob Herring				MX6QDL_PAD_EIM_DA0__EIM_AD00		0xb0b1
774*724ba675SRob Herring			>;
775*724ba675SRob Herring		};
776*724ba675SRob Herring	};
777*724ba675SRob Herring};
778*724ba675SRob Herring
779*724ba675SRob Herring&ldb {
780*724ba675SRob Herring	status = "okay";
781*724ba675SRob Herring
782*724ba675SRob Herring	lvds-channel@0 {
783*724ba675SRob Herring		fsl,data-mapping = "spwg";
784*724ba675SRob Herring		fsl,data-width = <18>;
785*724ba675SRob Herring		status = "okay";
786*724ba675SRob Herring
787*724ba675SRob Herring		display-timings {
788*724ba675SRob Herring			native-mode = <&timing0>;
789*724ba675SRob Herring			timing0: hsd100pxn1 {
790*724ba675SRob Herring				clock-frequency = <65000000>;
791*724ba675SRob Herring				hactive = <1024>;
792*724ba675SRob Herring				vactive = <768>;
793*724ba675SRob Herring				hback-porch = <220>;
794*724ba675SRob Herring				hfront-porch = <40>;
795*724ba675SRob Herring				vback-porch = <21>;
796*724ba675SRob Herring				vfront-porch = <7>;
797*724ba675SRob Herring				hsync-len = <60>;
798*724ba675SRob Herring				vsync-len = <10>;
799*724ba675SRob Herring			};
800*724ba675SRob Herring		};
801*724ba675SRob Herring	};
802*724ba675SRob Herring};
803*724ba675SRob Herring
804*724ba675SRob Herring&pwm3 {
805*724ba675SRob Herring	#pwm-cells = <2>;
806*724ba675SRob Herring	pinctrl-names = "default";
807*724ba675SRob Herring	pinctrl-0 = <&pinctrl_pwm3>;
808*724ba675SRob Herring	status = "okay";
809*724ba675SRob Herring};
810*724ba675SRob Herring
811*724ba675SRob Herring&pcie {
812*724ba675SRob Herring	status = "okay";
813*724ba675SRob Herring};
814*724ba675SRob Herring
815*724ba675SRob Herring&spdif {
816*724ba675SRob Herring	pinctrl-names = "default";
817*724ba675SRob Herring	pinctrl-0 = <&pinctrl_spdif>;
818*724ba675SRob Herring	status = "okay";
819*724ba675SRob Herring};
820*724ba675SRob Herring
821*724ba675SRob Herring&uart4 {
822*724ba675SRob Herring	pinctrl-names = "default";
823*724ba675SRob Herring	pinctrl-0 = <&pinctrl_uart4>;
824*724ba675SRob Herring	status = "okay";
825*724ba675SRob Herring};
826*724ba675SRob Herring
827*724ba675SRob Herring&usbh1 {
828*724ba675SRob Herring	vbus-supply = <&reg_usb_h1_vbus>;
829*724ba675SRob Herring	status = "okay";
830*724ba675SRob Herring};
831*724ba675SRob Herring
832*724ba675SRob Herring&usbotg {
833*724ba675SRob Herring	vbus-supply = <&reg_usb_otg_vbus>;
834*724ba675SRob Herring	pinctrl-names = "default";
835*724ba675SRob Herring	pinctrl-0 = <&pinctrl_usbotg>;
836*724ba675SRob Herring	status = "okay";
837*724ba675SRob Herring};
838*724ba675SRob Herring
839*724ba675SRob Herring&usdhc3 {
840*724ba675SRob Herring	pinctrl-names = "default", "state_100mhz", "state_200mhz";
841*724ba675SRob Herring	pinctrl-0 = <&pinctrl_usdhc3>;
842*724ba675SRob Herring	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
843*724ba675SRob Herring	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
844*724ba675SRob Herring	cd-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
845*724ba675SRob Herring	wp-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
846*724ba675SRob Herring	status = "okay";
847*724ba675SRob Herring};
848*724ba675SRob Herring
849*724ba675SRob Herring&weim {
850*724ba675SRob Herring	pinctrl-names = "default";
851*724ba675SRob Herring	pinctrl-0 = <&pinctrl_weim_nor &pinctrl_weim_cs0>;
852*724ba675SRob Herring	ranges = <0 0 0x08000000 0x08000000>;
853*724ba675SRob Herring	status = "disabled"; /* pin conflict with SPI NOR */
854*724ba675SRob Herring
855*724ba675SRob Herring	nor@0,0 {
856*724ba675SRob Herring		compatible = "cfi-flash";
857*724ba675SRob Herring		reg = <0 0 0x02000000>;
858*724ba675SRob Herring		#address-cells = <1>;
859*724ba675SRob Herring		#size-cells = <1>;
860*724ba675SRob Herring		bank-width = <2>;
861*724ba675SRob Herring		fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000
862*724ba675SRob Herring				0x0000c000 0x1404a38e 0x00000000>;
863*724ba675SRob Herring	};
864*724ba675SRob Herring};
865