1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Copyright 2019 Gateworks Corporation 4*724ba675SRob Herring */ 5*724ba675SRob Herring 6*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 7*724ba675SRob Herring#include <dt-bindings/input/linux-event-codes.h> 8*724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h> 9*724ba675SRob Herring 10*724ba675SRob Herring/ { 11*724ba675SRob Herring /* these are used by bootloader for disabling nodes */ 12*724ba675SRob Herring aliases { 13*724ba675SRob Herring led0 = &led0; 14*724ba675SRob Herring led1 = &led1; 15*724ba675SRob Herring led2 = &led2; 16*724ba675SRob Herring nand = &gpmi; 17*724ba675SRob Herring usb0 = &usbh1; 18*724ba675SRob Herring usb1 = &usbotg; 19*724ba675SRob Herring }; 20*724ba675SRob Herring 21*724ba675SRob Herring chosen { 22*724ba675SRob Herring stdout-path = &uart2; 23*724ba675SRob Herring }; 24*724ba675SRob Herring 25*724ba675SRob Herring gpio-keys { 26*724ba675SRob Herring compatible = "gpio-keys"; 27*724ba675SRob Herring 28*724ba675SRob Herring user-pb { 29*724ba675SRob Herring label = "user_pb"; 30*724ba675SRob Herring gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>; 31*724ba675SRob Herring linux,code = <BTN_0>; 32*724ba675SRob Herring }; 33*724ba675SRob Herring 34*724ba675SRob Herring user-pb1x { 35*724ba675SRob Herring label = "user_pb1x"; 36*724ba675SRob Herring linux,code = <BTN_1>; 37*724ba675SRob Herring interrupt-parent = <&gsc>; 38*724ba675SRob Herring interrupts = <0>; 39*724ba675SRob Herring }; 40*724ba675SRob Herring 41*724ba675SRob Herring key-erased { 42*724ba675SRob Herring label = "key-erased"; 43*724ba675SRob Herring linux,code = <BTN_2>; 44*724ba675SRob Herring interrupt-parent = <&gsc>; 45*724ba675SRob Herring interrupts = <1>; 46*724ba675SRob Herring }; 47*724ba675SRob Herring 48*724ba675SRob Herring eeprom-wp { 49*724ba675SRob Herring label = "eeprom_wp"; 50*724ba675SRob Herring linux,code = <BTN_3>; 51*724ba675SRob Herring interrupt-parent = <&gsc>; 52*724ba675SRob Herring interrupts = <2>; 53*724ba675SRob Herring }; 54*724ba675SRob Herring 55*724ba675SRob Herring tamper { 56*724ba675SRob Herring label = "tamper"; 57*724ba675SRob Herring linux,code = <BTN_4>; 58*724ba675SRob Herring interrupt-parent = <&gsc>; 59*724ba675SRob Herring interrupts = <5>; 60*724ba675SRob Herring }; 61*724ba675SRob Herring 62*724ba675SRob Herring switch-hold { 63*724ba675SRob Herring label = "switch_hold"; 64*724ba675SRob Herring linux,code = <BTN_5>; 65*724ba675SRob Herring interrupt-parent = <&gsc>; 66*724ba675SRob Herring interrupts = <7>; 67*724ba675SRob Herring }; 68*724ba675SRob Herring }; 69*724ba675SRob Herring 70*724ba675SRob Herring leds { 71*724ba675SRob Herring compatible = "gpio-leds"; 72*724ba675SRob Herring pinctrl-names = "default"; 73*724ba675SRob Herring pinctrl-0 = <&pinctrl_gpio_leds>; 74*724ba675SRob Herring 75*724ba675SRob Herring led0: led-user1 { 76*724ba675SRob Herring label = "user1"; 77*724ba675SRob Herring gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ 78*724ba675SRob Herring default-state = "on"; 79*724ba675SRob Herring linux,default-trigger = "heartbeat"; 80*724ba675SRob Herring }; 81*724ba675SRob Herring 82*724ba675SRob Herring led1: led-user2 { 83*724ba675SRob Herring label = "user2"; 84*724ba675SRob Herring gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ 85*724ba675SRob Herring default-state = "off"; 86*724ba675SRob Herring }; 87*724ba675SRob Herring 88*724ba675SRob Herring led2: led-user3 { 89*724ba675SRob Herring label = "user3"; 90*724ba675SRob Herring gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ 91*724ba675SRob Herring default-state = "off"; 92*724ba675SRob Herring }; 93*724ba675SRob Herring }; 94*724ba675SRob Herring 95*724ba675SRob Herring memory@10000000 { 96*724ba675SRob Herring device_type = "memory"; 97*724ba675SRob Herring reg = <0x10000000 0x40000000>; 98*724ba675SRob Herring }; 99*724ba675SRob Herring 100*724ba675SRob Herring pps { 101*724ba675SRob Herring compatible = "pps-gpio"; 102*724ba675SRob Herring pinctrl-names = "default"; 103*724ba675SRob Herring pinctrl-0 = <&pinctrl_pps>; 104*724ba675SRob Herring gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; 105*724ba675SRob Herring }; 106*724ba675SRob Herring 107*724ba675SRob Herring reg_3p3v: regulator-3p3v { 108*724ba675SRob Herring compatible = "regulator-fixed"; 109*724ba675SRob Herring regulator-name = "3P3V"; 110*724ba675SRob Herring regulator-min-microvolt = <3300000>; 111*724ba675SRob Herring regulator-max-microvolt = <3300000>; 112*724ba675SRob Herring regulator-always-on; 113*724ba675SRob Herring }; 114*724ba675SRob Herring 115*724ba675SRob Herring reg_usb_vbus: regulator-5p0v { 116*724ba675SRob Herring compatible = "regulator-fixed"; 117*724ba675SRob Herring regulator-name = "usb_vbus"; 118*724ba675SRob Herring regulator-min-microvolt = <5000000>; 119*724ba675SRob Herring regulator-max-microvolt = <5000000>; 120*724ba675SRob Herring regulator-always-on; 121*724ba675SRob Herring }; 122*724ba675SRob Herring}; 123*724ba675SRob Herring 124*724ba675SRob Herring&can1 { 125*724ba675SRob Herring pinctrl-names = "default"; 126*724ba675SRob Herring pinctrl-0 = <&pinctrl_flexcan1>; 127*724ba675SRob Herring status = "okay"; 128*724ba675SRob Herring}; 129*724ba675SRob Herring 130*724ba675SRob Herring&ecspi2 { 131*724ba675SRob Herring cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; 132*724ba675SRob Herring pinctrl-names = "default"; 133*724ba675SRob Herring pinctrl-0 = <&pinctrl_ecspi2>; 134*724ba675SRob Herring status = "okay"; 135*724ba675SRob Herring}; 136*724ba675SRob Herring 137*724ba675SRob Herring&fec { 138*724ba675SRob Herring pinctrl-names = "default"; 139*724ba675SRob Herring pinctrl-0 = <&pinctrl_enet>; 140*724ba675SRob Herring phy-mode = "rgmii-id"; 141*724ba675SRob Herring status = "okay"; 142*724ba675SRob Herring}; 143*724ba675SRob Herring 144*724ba675SRob Herring&gpmi { 145*724ba675SRob Herring pinctrl-names = "default"; 146*724ba675SRob Herring pinctrl-0 = <&pinctrl_gpmi_nand>; 147*724ba675SRob Herring status = "okay"; 148*724ba675SRob Herring}; 149*724ba675SRob Herring 150*724ba675SRob Herring&i2c1 { 151*724ba675SRob Herring clock-frequency = <100000>; 152*724ba675SRob Herring pinctrl-names = "default"; 153*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c1>; 154*724ba675SRob Herring status = "okay"; 155*724ba675SRob Herring 156*724ba675SRob Herring gsc: gsc@20 { 157*724ba675SRob Herring compatible = "gw,gsc"; 158*724ba675SRob Herring reg = <0x20>; 159*724ba675SRob Herring interrupt-parent = <&gpio1>; 160*724ba675SRob Herring interrupts = <4 IRQ_TYPE_LEVEL_LOW>; 161*724ba675SRob Herring interrupt-controller; 162*724ba675SRob Herring #interrupt-cells = <1>; 163*724ba675SRob Herring #address-cells = <1>; 164*724ba675SRob Herring #size-cells = <0>; 165*724ba675SRob Herring 166*724ba675SRob Herring adc { 167*724ba675SRob Herring compatible = "gw,gsc-adc"; 168*724ba675SRob Herring #address-cells = <1>; 169*724ba675SRob Herring #size-cells = <0>; 170*724ba675SRob Herring 171*724ba675SRob Herring channel@0 { 172*724ba675SRob Herring gw,mode = <0>; 173*724ba675SRob Herring reg = <0x00>; 174*724ba675SRob Herring label = "temp"; 175*724ba675SRob Herring }; 176*724ba675SRob Herring 177*724ba675SRob Herring channel@2 { 178*724ba675SRob Herring gw,mode = <1>; 179*724ba675SRob Herring reg = <0x02>; 180*724ba675SRob Herring label = "vdd_vin"; 181*724ba675SRob Herring }; 182*724ba675SRob Herring 183*724ba675SRob Herring channel@5 { 184*724ba675SRob Herring gw,mode = <1>; 185*724ba675SRob Herring reg = <0x05>; 186*724ba675SRob Herring label = "vdd_3p3"; 187*724ba675SRob Herring }; 188*724ba675SRob Herring 189*724ba675SRob Herring channel@8 { 190*724ba675SRob Herring gw,mode = <1>; 191*724ba675SRob Herring reg = <0x08>; 192*724ba675SRob Herring label = "vdd_bat"; 193*724ba675SRob Herring }; 194*724ba675SRob Herring 195*724ba675SRob Herring channel@b { 196*724ba675SRob Herring gw,mode = <1>; 197*724ba675SRob Herring reg = <0x0b>; 198*724ba675SRob Herring label = "vdd_5p0"; 199*724ba675SRob Herring }; 200*724ba675SRob Herring 201*724ba675SRob Herring channel@e { 202*724ba675SRob Herring gw,mode = <1>; 203*724ba675SRob Herring reg = <0xe>; 204*724ba675SRob Herring label = "vdd_arm"; 205*724ba675SRob Herring }; 206*724ba675SRob Herring 207*724ba675SRob Herring channel@11 { 208*724ba675SRob Herring gw,mode = <1>; 209*724ba675SRob Herring reg = <0x11>; 210*724ba675SRob Herring label = "vdd_soc"; 211*724ba675SRob Herring }; 212*724ba675SRob Herring 213*724ba675SRob Herring channel@14 { 214*724ba675SRob Herring gw,mode = <1>; 215*724ba675SRob Herring reg = <0x14>; 216*724ba675SRob Herring label = "vdd_3p0"; 217*724ba675SRob Herring }; 218*724ba675SRob Herring 219*724ba675SRob Herring channel@17 { 220*724ba675SRob Herring gw,mode = <1>; 221*724ba675SRob Herring reg = <0x17>; 222*724ba675SRob Herring label = "vdd_1p5"; 223*724ba675SRob Herring }; 224*724ba675SRob Herring 225*724ba675SRob Herring channel@1d { 226*724ba675SRob Herring gw,mode = <1>; 227*724ba675SRob Herring reg = <0x1d>; 228*724ba675SRob Herring label = "vdd_1p8"; 229*724ba675SRob Herring }; 230*724ba675SRob Herring 231*724ba675SRob Herring channel@20 { 232*724ba675SRob Herring gw,mode = <1>; 233*724ba675SRob Herring reg = <0x20>; 234*724ba675SRob Herring label = "vdd_1p0"; 235*724ba675SRob Herring }; 236*724ba675SRob Herring 237*724ba675SRob Herring channel@23 { 238*724ba675SRob Herring gw,mode = <1>; 239*724ba675SRob Herring reg = <0x23>; 240*724ba675SRob Herring label = "vdd_2p5"; 241*724ba675SRob Herring }; 242*724ba675SRob Herring }; 243*724ba675SRob Herring 244*724ba675SRob Herring fan-controller@a { 245*724ba675SRob Herring compatible = "gw,gsc-fan"; 246*724ba675SRob Herring reg = <0x0a>; 247*724ba675SRob Herring }; 248*724ba675SRob Herring }; 249*724ba675SRob Herring 250*724ba675SRob Herring gsc_gpio: gpio@23 { 251*724ba675SRob Herring compatible = "nxp,pca9555"; 252*724ba675SRob Herring reg = <0x23>; 253*724ba675SRob Herring gpio-controller; 254*724ba675SRob Herring #gpio-cells = <2>; 255*724ba675SRob Herring interrupt-parent = <&gsc>; 256*724ba675SRob Herring interrupts = <4>; 257*724ba675SRob Herring }; 258*724ba675SRob Herring 259*724ba675SRob Herring eeprom@50 { 260*724ba675SRob Herring compatible = "atmel,24c02"; 261*724ba675SRob Herring reg = <0x50>; 262*724ba675SRob Herring pagesize = <16>; 263*724ba675SRob Herring }; 264*724ba675SRob Herring 265*724ba675SRob Herring eeprom@51 { 266*724ba675SRob Herring compatible = "atmel,24c02"; 267*724ba675SRob Herring reg = <0x51>; 268*724ba675SRob Herring pagesize = <16>; 269*724ba675SRob Herring }; 270*724ba675SRob Herring 271*724ba675SRob Herring eeprom@52 { 272*724ba675SRob Herring compatible = "atmel,24c02"; 273*724ba675SRob Herring reg = <0x52>; 274*724ba675SRob Herring pagesize = <16>; 275*724ba675SRob Herring }; 276*724ba675SRob Herring 277*724ba675SRob Herring eeprom@53 { 278*724ba675SRob Herring compatible = "atmel,24c02"; 279*724ba675SRob Herring reg = <0x53>; 280*724ba675SRob Herring pagesize = <16>; 281*724ba675SRob Herring }; 282*724ba675SRob Herring 283*724ba675SRob Herring rtc@68 { 284*724ba675SRob Herring compatible = "dallas,ds1672"; 285*724ba675SRob Herring reg = <0x68>; 286*724ba675SRob Herring }; 287*724ba675SRob Herring}; 288*724ba675SRob Herring 289*724ba675SRob Herring&i2c2 { 290*724ba675SRob Herring clock-frequency = <100000>; 291*724ba675SRob Herring pinctrl-names = "default"; 292*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c2>; 293*724ba675SRob Herring status = "okay"; 294*724ba675SRob Herring}; 295*724ba675SRob Herring 296*724ba675SRob Herring&i2c3 { 297*724ba675SRob Herring clock-frequency = <100000>; 298*724ba675SRob Herring pinctrl-names = "default"; 299*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c3>; 300*724ba675SRob Herring status = "okay"; 301*724ba675SRob Herring 302*724ba675SRob Herring accel@19 { 303*724ba675SRob Herring pinctrl-names = "default"; 304*724ba675SRob Herring pinctrl-0 = <&pinctrl_accel>; 305*724ba675SRob Herring compatible = "st,lis2de12"; 306*724ba675SRob Herring reg = <0x19>; 307*724ba675SRob Herring st,drdy-int-pin = <1>; 308*724ba675SRob Herring interrupt-parent = <&gpio7>; 309*724ba675SRob Herring interrupts = <13 0>; 310*724ba675SRob Herring interrupt-names = "INT1"; 311*724ba675SRob Herring }; 312*724ba675SRob Herring}; 313*724ba675SRob Herring 314*724ba675SRob Herring&pcie { 315*724ba675SRob Herring pinctrl-names = "default"; 316*724ba675SRob Herring pinctrl-0 = <&pinctrl_pcie>; 317*724ba675SRob Herring reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>; 318*724ba675SRob Herring status = "okay"; 319*724ba675SRob Herring}; 320*724ba675SRob Herring 321*724ba675SRob Herring&pwm1 { 322*724ba675SRob Herring pinctrl-names = "default"; 323*724ba675SRob Herring pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */ 324*724ba675SRob Herring status = "disabled"; 325*724ba675SRob Herring}; 326*724ba675SRob Herring 327*724ba675SRob Herring&pwm2 { 328*724ba675SRob Herring pinctrl-names = "default"; 329*724ba675SRob Herring pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ 330*724ba675SRob Herring status = "disabled"; 331*724ba675SRob Herring}; 332*724ba675SRob Herring 333*724ba675SRob Herring&pwm3 { 334*724ba675SRob Herring pinctrl-names = "default"; 335*724ba675SRob Herring pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ 336*724ba675SRob Herring status = "disabled"; 337*724ba675SRob Herring}; 338*724ba675SRob Herring 339*724ba675SRob Herring&pwm4 { 340*724ba675SRob Herring pinctrl-names = "default"; 341*724ba675SRob Herring pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */ 342*724ba675SRob Herring status = "disabled"; 343*724ba675SRob Herring}; 344*724ba675SRob Herring 345*724ba675SRob Herring&uart1 { 346*724ba675SRob Herring pinctrl-names = "default"; 347*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart1>; 348*724ba675SRob Herring rts-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>; 349*724ba675SRob Herring status = "okay"; 350*724ba675SRob Herring}; 351*724ba675SRob Herring 352*724ba675SRob Herring&uart2 { 353*724ba675SRob Herring pinctrl-names = "default"; 354*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart2>; 355*724ba675SRob Herring status = "okay"; 356*724ba675SRob Herring}; 357*724ba675SRob Herring 358*724ba675SRob Herring&uart5 { 359*724ba675SRob Herring pinctrl-names = "default"; 360*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart5>; 361*724ba675SRob Herring status = "okay"; 362*724ba675SRob Herring}; 363*724ba675SRob Herring 364*724ba675SRob Herring&usbotg { 365*724ba675SRob Herring vbus-supply = <®_usb_vbus>; 366*724ba675SRob Herring pinctrl-names = "default"; 367*724ba675SRob Herring pinctrl-0 = <&pinctrl_usbotg>; 368*724ba675SRob Herring disable-over-current; 369*724ba675SRob Herring dr_mode = "host"; 370*724ba675SRob Herring status = "okay"; 371*724ba675SRob Herring}; 372*724ba675SRob Herring 373*724ba675SRob Herring&usbh1 { 374*724ba675SRob Herring vbus-supply = <®_usb_vbus>; 375*724ba675SRob Herring status = "okay"; 376*724ba675SRob Herring}; 377*724ba675SRob Herring 378*724ba675SRob Herring&usdhc3 { 379*724ba675SRob Herring pinctrl-names = "default", "state_100mhz", "state_200mhz"; 380*724ba675SRob Herring pinctrl-0 = <&pinctrl_usdhc3>; 381*724ba675SRob Herring pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 382*724ba675SRob Herring pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 383*724ba675SRob Herring cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; 384*724ba675SRob Herring vmmc-supply = <®_3p3v>; 385*724ba675SRob Herring no-1-8-v; /* firmware will remove if board revision supports */ 386*724ba675SRob Herring status = "okay"; 387*724ba675SRob Herring}; 388*724ba675SRob Herring 389*724ba675SRob Herring&wdog1 { 390*724ba675SRob Herring status = "disabled"; 391*724ba675SRob Herring}; 392*724ba675SRob Herring 393*724ba675SRob Herring&wdog2 { 394*724ba675SRob Herring pinctrl-names = "default"; 395*724ba675SRob Herring pinctrl-0 = <&pinctrl_wdog>; 396*724ba675SRob Herring fsl,ext-reset-output; 397*724ba675SRob Herring status = "okay"; 398*724ba675SRob Herring}; 399*724ba675SRob Herring 400*724ba675SRob Herring&iomuxc { 401*724ba675SRob Herring pinctrl_accel: accelmuxgrp { 402*724ba675SRob Herring fsl,pins = < 403*724ba675SRob Herring MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b1 404*724ba675SRob Herring >; 405*724ba675SRob Herring }; 406*724ba675SRob Herring 407*724ba675SRob Herring pinctrl_enet: enetgrp { 408*724ba675SRob Herring fsl,pins = < 409*724ba675SRob Herring MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 410*724ba675SRob Herring MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 411*724ba675SRob Herring MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 412*724ba675SRob Herring MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 413*724ba675SRob Herring MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 414*724ba675SRob Herring MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 415*724ba675SRob Herring MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 416*724ba675SRob Herring MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 417*724ba675SRob Herring MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 418*724ba675SRob Herring MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 419*724ba675SRob Herring MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 420*724ba675SRob Herring MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 421*724ba675SRob Herring MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 422*724ba675SRob Herring MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 423*724ba675SRob Herring MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 424*724ba675SRob Herring >; 425*724ba675SRob Herring }; 426*724ba675SRob Herring 427*724ba675SRob Herring pinctrl_ecspi2: escpi2grp { 428*724ba675SRob Herring fsl,pins = < 429*724ba675SRob Herring MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1 430*724ba675SRob Herring MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1 431*724ba675SRob Herring MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1 432*724ba675SRob Herring MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1 433*724ba675SRob Herring >; 434*724ba675SRob Herring }; 435*724ba675SRob Herring 436*724ba675SRob Herring pinctrl_flexcan1: flexcan1grp { 437*724ba675SRob Herring fsl,pins = < 438*724ba675SRob Herring MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1 439*724ba675SRob Herring MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1 440*724ba675SRob Herring MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 441*724ba675SRob Herring >; 442*724ba675SRob Herring }; 443*724ba675SRob Herring 444*724ba675SRob Herring pinctrl_gpio_leds: gpioledsgrp { 445*724ba675SRob Herring fsl,pins = < 446*724ba675SRob Herring MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 447*724ba675SRob Herring MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 448*724ba675SRob Herring MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 449*724ba675SRob Herring >; 450*724ba675SRob Herring }; 451*724ba675SRob Herring 452*724ba675SRob Herring pinctrl_gpmi_nand: gpminandgrp { 453*724ba675SRob Herring fsl,pins = < 454*724ba675SRob Herring MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 455*724ba675SRob Herring MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 456*724ba675SRob Herring MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 457*724ba675SRob Herring MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 458*724ba675SRob Herring MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 459*724ba675SRob Herring MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 460*724ba675SRob Herring MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 461*724ba675SRob Herring MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 462*724ba675SRob Herring MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 463*724ba675SRob Herring MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 464*724ba675SRob Herring MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 465*724ba675SRob Herring MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 466*724ba675SRob Herring MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 467*724ba675SRob Herring MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 468*724ba675SRob Herring MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 469*724ba675SRob Herring >; 470*724ba675SRob Herring }; 471*724ba675SRob Herring 472*724ba675SRob Herring pinctrl_i2c1: i2c1grp { 473*724ba675SRob Herring fsl,pins = < 474*724ba675SRob Herring MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 475*724ba675SRob Herring MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 476*724ba675SRob Herring MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 477*724ba675SRob Herring >; 478*724ba675SRob Herring }; 479*724ba675SRob Herring 480*724ba675SRob Herring pinctrl_i2c2: i2c2grp { 481*724ba675SRob Herring fsl,pins = < 482*724ba675SRob Herring MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 483*724ba675SRob Herring MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 484*724ba675SRob Herring >; 485*724ba675SRob Herring }; 486*724ba675SRob Herring 487*724ba675SRob Herring pinctrl_i2c3: i2c3grp { 488*724ba675SRob Herring fsl,pins = < 489*724ba675SRob Herring MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 490*724ba675SRob Herring MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 491*724ba675SRob Herring >; 492*724ba675SRob Herring }; 493*724ba675SRob Herring 494*724ba675SRob Herring pinctrl_pcie: pciegrp { 495*724ba675SRob Herring fsl,pins = < 496*724ba675SRob Herring MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 497*724ba675SRob Herring MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 498*724ba675SRob Herring >; 499*724ba675SRob Herring }; 500*724ba675SRob Herring 501*724ba675SRob Herring pinctrl_pps: ppsgrp { 502*724ba675SRob Herring fsl,pins = < 503*724ba675SRob Herring MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b1 504*724ba675SRob Herring >; 505*724ba675SRob Herring }; 506*724ba675SRob Herring 507*724ba675SRob Herring pinctrl_pwm1: pwm1grp { 508*724ba675SRob Herring fsl,pins = < 509*724ba675SRob Herring MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1 510*724ba675SRob Herring >; 511*724ba675SRob Herring }; 512*724ba675SRob Herring 513*724ba675SRob Herring pinctrl_pwm2: pwm2grp { 514*724ba675SRob Herring fsl,pins = < 515*724ba675SRob Herring MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 516*724ba675SRob Herring >; 517*724ba675SRob Herring }; 518*724ba675SRob Herring 519*724ba675SRob Herring pinctrl_pwm3: pwm3grp { 520*724ba675SRob Herring fsl,pins = < 521*724ba675SRob Herring MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 522*724ba675SRob Herring >; 523*724ba675SRob Herring }; 524*724ba675SRob Herring 525*724ba675SRob Herring pinctrl_pwm4: pwm4grp { 526*724ba675SRob Herring fsl,pins = < 527*724ba675SRob Herring MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1 528*724ba675SRob Herring >; 529*724ba675SRob Herring }; 530*724ba675SRob Herring 531*724ba675SRob Herring pinctrl_uart1: uart1grp { 532*724ba675SRob Herring fsl,pins = < 533*724ba675SRob Herring MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 534*724ba675SRob Herring MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 535*724ba675SRob Herring MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b1 536*724ba675SRob Herring >; 537*724ba675SRob Herring }; 538*724ba675SRob Herring 539*724ba675SRob Herring pinctrl_uart2: uart2grp { 540*724ba675SRob Herring fsl,pins = < 541*724ba675SRob Herring MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 542*724ba675SRob Herring MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 543*724ba675SRob Herring MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x4001b0b1 544*724ba675SRob Herring >; 545*724ba675SRob Herring }; 546*724ba675SRob Herring 547*724ba675SRob Herring pinctrl_uart5: uart5grp { 548*724ba675SRob Herring fsl,pins = < 549*724ba675SRob Herring MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 550*724ba675SRob Herring MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 551*724ba675SRob Herring >; 552*724ba675SRob Herring }; 553*724ba675SRob Herring 554*724ba675SRob Herring pinctrl_usbotg: usbotggrp { 555*724ba675SRob Herring fsl,pins = < 556*724ba675SRob Herring MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059 557*724ba675SRob Herring >; 558*724ba675SRob Herring }; 559*724ba675SRob Herring 560*724ba675SRob Herring pinctrl_usdhc3: usdhc3grp { 561*724ba675SRob Herring fsl,pins = < 562*724ba675SRob Herring MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 563*724ba675SRob Herring MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 564*724ba675SRob Herring MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 565*724ba675SRob Herring MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 566*724ba675SRob Herring MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 567*724ba675SRob Herring MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 568*724ba675SRob Herring MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */ 569*724ba675SRob Herring MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059 570*724ba675SRob Herring >; 571*724ba675SRob Herring }; 572*724ba675SRob Herring 573*724ba675SRob Herring pinctrl_usdhc3_100mhz: usdhc3grp100mhz { 574*724ba675SRob Herring fsl,pins = < 575*724ba675SRob Herring MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9 576*724ba675SRob Herring MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9 577*724ba675SRob Herring MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 578*724ba675SRob Herring MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 579*724ba675SRob Herring MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 580*724ba675SRob Herring MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 581*724ba675SRob Herring MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */ 582*724ba675SRob Herring MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9 583*724ba675SRob Herring >; 584*724ba675SRob Herring }; 585*724ba675SRob Herring 586*724ba675SRob Herring pinctrl_usdhc3_200mhz: usdhc3grp200mhz { 587*724ba675SRob Herring fsl,pins = < 588*724ba675SRob Herring MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9 589*724ba675SRob Herring MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9 590*724ba675SRob Herring MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 591*724ba675SRob Herring MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 592*724ba675SRob Herring MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 593*724ba675SRob Herring MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 594*724ba675SRob Herring MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */ 595*724ba675SRob Herring MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9 596*724ba675SRob Herring >; 597*724ba675SRob Herring }; 598*724ba675SRob Herring 599*724ba675SRob Herring pinctrl_wdog: wdoggrp { 600*724ba675SRob Herring fsl,pins = < 601*724ba675SRob Herring MX6QDL_PAD_SD1_DAT3__WDOG2_B 0x1b0b0 602*724ba675SRob Herring >; 603*724ba675SRob Herring }; 604*724ba675SRob Herring}; 605