1*724ba675SRob Herring/* 2*724ba675SRob Herring * Copyright 2014 Gateworks Corporation 3*724ba675SRob Herring * 4*724ba675SRob Herring * This file is dual-licensed: you can use it either under the terms 5*724ba675SRob Herring * of the GPL or the X11 license, at your option. Note that this dual 6*724ba675SRob Herring * licensing only applies to this file, and not this project as a 7*724ba675SRob Herring * whole. 8*724ba675SRob Herring * 9*724ba675SRob Herring * a) This file is free software; you can redistribute it and/or 10*724ba675SRob Herring * modify it under the terms of the GNU General Public License as 11*724ba675SRob Herring * published by the Free Software Foundation; either version 2 of 12*724ba675SRob Herring * the License, or (at your option) any later version. 13*724ba675SRob Herring * 14*724ba675SRob Herring * This file is distributed in the hope that it will be useful, 15*724ba675SRob Herring * but WITHOUT ANY WARRANTY; without even the implied warranty of 16*724ba675SRob Herring * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17*724ba675SRob Herring * GNU General Public License for more details. 18*724ba675SRob Herring * 19*724ba675SRob Herring * You should have received a copy of the GNU General Public 20*724ba675SRob Herring * License along with this file; if not, write to the Free 21*724ba675SRob Herring * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, 22*724ba675SRob Herring * MA 02110-1301 USA 23*724ba675SRob Herring * 24*724ba675SRob Herring * Or, alternatively, 25*724ba675SRob Herring * 26*724ba675SRob Herring * b) Permission is hereby granted, free of charge, to any person 27*724ba675SRob Herring * obtaining a copy of this software and associated documentation 28*724ba675SRob Herring * files (the "Software"), to deal in the Software without 29*724ba675SRob Herring * restriction, including without limitation the rights to use, 30*724ba675SRob Herring * copy, modify, merge, publish, distribute, sublicense, and/or 31*724ba675SRob Herring * sell copies of the Software, and to permit persons to whom the 32*724ba675SRob Herring * Software is furnished to do so, subject to the following 33*724ba675SRob Herring * conditions: 34*724ba675SRob Herring * 35*724ba675SRob Herring * The above copyright notice and this permission notice shall be 36*724ba675SRob Herring * included in all copies or substantial portions of the Software. 37*724ba675SRob Herring * 38*724ba675SRob Herring * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 39*724ba675SRob Herring * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 40*724ba675SRob Herring * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 41*724ba675SRob Herring * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 42*724ba675SRob Herring * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 43*724ba675SRob Herring * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 44*724ba675SRob Herring * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 45*724ba675SRob Herring * OTHER DEALINGS IN THE SOFTWARE. 46*724ba675SRob Herring */ 47*724ba675SRob Herring 48*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 49*724ba675SRob Herring#include <dt-bindings/media/tda1997x.h> 50*724ba675SRob Herring#include <dt-bindings/input/linux-event-codes.h> 51*724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h> 52*724ba675SRob Herring#include <dt-bindings/sound/fsl-imx-audmux.h> 53*724ba675SRob Herring 54*724ba675SRob Herring/ { 55*724ba675SRob Herring /* these are used by bootloader for disabling nodes */ 56*724ba675SRob Herring aliases { 57*724ba675SRob Herring led0 = &led0; 58*724ba675SRob Herring nand = &gpmi; 59*724ba675SRob Herring ssi0 = &ssi1; 60*724ba675SRob Herring usb0 = &usbh1; 61*724ba675SRob Herring usb1 = &usbotg; 62*724ba675SRob Herring }; 63*724ba675SRob Herring 64*724ba675SRob Herring chosen { 65*724ba675SRob Herring bootargs = "console=ttymxc1,115200"; 66*724ba675SRob Herring }; 67*724ba675SRob Herring 68*724ba675SRob Herring gpio-keys { 69*724ba675SRob Herring compatible = "gpio-keys"; 70*724ba675SRob Herring 71*724ba675SRob Herring user-pb { 72*724ba675SRob Herring label = "user_pb"; 73*724ba675SRob Herring gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>; 74*724ba675SRob Herring linux,code = <BTN_0>; 75*724ba675SRob Herring }; 76*724ba675SRob Herring 77*724ba675SRob Herring user-pb1x { 78*724ba675SRob Herring label = "user_pb1x"; 79*724ba675SRob Herring linux,code = <BTN_1>; 80*724ba675SRob Herring interrupt-parent = <&gsc>; 81*724ba675SRob Herring interrupts = <0>; 82*724ba675SRob Herring }; 83*724ba675SRob Herring 84*724ba675SRob Herring key-erased { 85*724ba675SRob Herring label = "key-erased"; 86*724ba675SRob Herring linux,code = <BTN_2>; 87*724ba675SRob Herring interrupt-parent = <&gsc>; 88*724ba675SRob Herring interrupts = <1>; 89*724ba675SRob Herring }; 90*724ba675SRob Herring 91*724ba675SRob Herring eeprom-wp { 92*724ba675SRob Herring label = "eeprom_wp"; 93*724ba675SRob Herring linux,code = <BTN_3>; 94*724ba675SRob Herring interrupt-parent = <&gsc>; 95*724ba675SRob Herring interrupts = <2>; 96*724ba675SRob Herring }; 97*724ba675SRob Herring 98*724ba675SRob Herring tamper { 99*724ba675SRob Herring label = "tamper"; 100*724ba675SRob Herring linux,code = <BTN_4>; 101*724ba675SRob Herring interrupt-parent = <&gsc>; 102*724ba675SRob Herring interrupts = <5>; 103*724ba675SRob Herring }; 104*724ba675SRob Herring 105*724ba675SRob Herring switch-hold { 106*724ba675SRob Herring label = "switch_hold"; 107*724ba675SRob Herring linux,code = <BTN_5>; 108*724ba675SRob Herring interrupt-parent = <&gsc>; 109*724ba675SRob Herring interrupts = <7>; 110*724ba675SRob Herring }; 111*724ba675SRob Herring }; 112*724ba675SRob Herring 113*724ba675SRob Herring leds { 114*724ba675SRob Herring compatible = "gpio-leds"; 115*724ba675SRob Herring pinctrl-names = "default"; 116*724ba675SRob Herring pinctrl-0 = <&pinctrl_gpio_leds>; 117*724ba675SRob Herring 118*724ba675SRob Herring led0: led-user1 { 119*724ba675SRob Herring label = "user1"; 120*724ba675SRob Herring gpios = <&gpio4 7 GPIO_ACTIVE_LOW>; 121*724ba675SRob Herring default-state = "on"; 122*724ba675SRob Herring linux,default-trigger = "heartbeat"; 123*724ba675SRob Herring }; 124*724ba675SRob Herring }; 125*724ba675SRob Herring 126*724ba675SRob Herring memory@10000000 { 127*724ba675SRob Herring device_type = "memory"; 128*724ba675SRob Herring reg = <0x10000000 0x20000000>; 129*724ba675SRob Herring }; 130*724ba675SRob Herring 131*724ba675SRob Herring reg_5p0v: regulator-5p0v { 132*724ba675SRob Herring compatible = "regulator-fixed"; 133*724ba675SRob Herring regulator-name = "5P0V"; 134*724ba675SRob Herring regulator-min-microvolt = <5000000>; 135*724ba675SRob Herring regulator-max-microvolt = <5000000>; 136*724ba675SRob Herring }; 137*724ba675SRob Herring 138*724ba675SRob Herring reg_usb_h1_vbus: regulator-usb-h1-vbus { 139*724ba675SRob Herring compatible = "regulator-fixed"; 140*724ba675SRob Herring regulator-name = "usb_h1_vbus"; 141*724ba675SRob Herring regulator-min-microvolt = <5000000>; 142*724ba675SRob Herring regulator-max-microvolt = <5000000>; 143*724ba675SRob Herring }; 144*724ba675SRob Herring 145*724ba675SRob Herring reg_usb_otg_vbus: regulator-usb-otg-vbus { 146*724ba675SRob Herring compatible = "regulator-fixed"; 147*724ba675SRob Herring regulator-name = "usb_otg_vbus"; 148*724ba675SRob Herring regulator-min-microvolt = <5000000>; 149*724ba675SRob Herring regulator-max-microvolt = <5000000>; 150*724ba675SRob Herring }; 151*724ba675SRob Herring 152*724ba675SRob Herring sound-digital { 153*724ba675SRob Herring compatible = "simple-audio-card"; 154*724ba675SRob Herring simple-audio-card,name = "tda1997x-audio"; 155*724ba675SRob Herring simple-audio-card,format = "i2s"; 156*724ba675SRob Herring simple-audio-card,bitclock-master = <&sound_codec>; 157*724ba675SRob Herring simple-audio-card,frame-master = <&sound_codec>; 158*724ba675SRob Herring 159*724ba675SRob Herring sound_cpu: simple-audio-card,cpu { 160*724ba675SRob Herring sound-dai = <&ssi1>; 161*724ba675SRob Herring }; 162*724ba675SRob Herring 163*724ba675SRob Herring sound_codec: simple-audio-card,codec { 164*724ba675SRob Herring sound-dai = <&hdmi_receiver>; 165*724ba675SRob Herring }; 166*724ba675SRob Herring }; 167*724ba675SRob Herring}; 168*724ba675SRob Herring 169*724ba675SRob Herring&audmux { 170*724ba675SRob Herring pinctrl-names = "default"; 171*724ba675SRob Herring pinctrl-0 = <&pinctrl_audmux>; /* AUD5<->tda1997x */ 172*724ba675SRob Herring status = "okay"; 173*724ba675SRob Herring 174*724ba675SRob Herring mux-ssi1 { 175*724ba675SRob Herring fsl,audmux-port = <0>; 176*724ba675SRob Herring fsl,port-config = < 177*724ba675SRob Herring (IMX_AUDMUX_V2_PTCR_TFSDIR | 178*724ba675SRob Herring IMX_AUDMUX_V2_PTCR_TFSEL(4+8) | /* RXFS */ 179*724ba675SRob Herring IMX_AUDMUX_V2_PTCR_TCLKDIR | 180*724ba675SRob Herring IMX_AUDMUX_V2_PTCR_TCSEL(4+8) | /* RXC */ 181*724ba675SRob Herring IMX_AUDMUX_V2_PTCR_SYN) 182*724ba675SRob Herring IMX_AUDMUX_V2_PDCR_RXDSEL(4) 183*724ba675SRob Herring >; 184*724ba675SRob Herring }; 185*724ba675SRob Herring 186*724ba675SRob Herring mux-aud5 { 187*724ba675SRob Herring fsl,audmux-port = <4>; 188*724ba675SRob Herring fsl,port-config = < 189*724ba675SRob Herring IMX_AUDMUX_V2_PTCR_SYN 190*724ba675SRob Herring IMX_AUDMUX_V2_PDCR_RXDSEL(0)>; 191*724ba675SRob Herring }; 192*724ba675SRob Herring}; 193*724ba675SRob Herring 194*724ba675SRob Herring&can1 { 195*724ba675SRob Herring pinctrl-names = "default"; 196*724ba675SRob Herring pinctrl-0 = <&pinctrl_flexcan1>; 197*724ba675SRob Herring status = "okay"; 198*724ba675SRob Herring}; 199*724ba675SRob Herring 200*724ba675SRob Herring&gpmi { 201*724ba675SRob Herring pinctrl-names = "default"; 202*724ba675SRob Herring pinctrl-0 = <&pinctrl_gpmi_nand>; 203*724ba675SRob Herring status = "okay"; 204*724ba675SRob Herring}; 205*724ba675SRob Herring 206*724ba675SRob Herring&hdmi { 207*724ba675SRob Herring ddc-i2c-bus = <&i2c3>; 208*724ba675SRob Herring status = "okay"; 209*724ba675SRob Herring}; 210*724ba675SRob Herring 211*724ba675SRob Herring&i2c1 { 212*724ba675SRob Herring clock-frequency = <100000>; 213*724ba675SRob Herring pinctrl-names = "default"; 214*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c1>; 215*724ba675SRob Herring status = "okay"; 216*724ba675SRob Herring 217*724ba675SRob Herring gsc: gsc@20 { 218*724ba675SRob Herring compatible = "gw,gsc"; 219*724ba675SRob Herring reg = <0x20>; 220*724ba675SRob Herring interrupt-parent = <&gpio1>; 221*724ba675SRob Herring interrupts = <4 IRQ_TYPE_LEVEL_LOW>; 222*724ba675SRob Herring interrupt-controller; 223*724ba675SRob Herring #interrupt-cells = <1>; 224*724ba675SRob Herring #size-cells = <0>; 225*724ba675SRob Herring 226*724ba675SRob Herring adc { 227*724ba675SRob Herring compatible = "gw,gsc-adc"; 228*724ba675SRob Herring #address-cells = <1>; 229*724ba675SRob Herring #size-cells = <0>; 230*724ba675SRob Herring 231*724ba675SRob Herring channel@0 { 232*724ba675SRob Herring gw,mode = <0>; 233*724ba675SRob Herring reg = <0x00>; 234*724ba675SRob Herring label = "temp"; 235*724ba675SRob Herring }; 236*724ba675SRob Herring 237*724ba675SRob Herring channel@2 { 238*724ba675SRob Herring gw,mode = <1>; 239*724ba675SRob Herring reg = <0x02>; 240*724ba675SRob Herring label = "vdd_vin"; 241*724ba675SRob Herring }; 242*724ba675SRob Herring 243*724ba675SRob Herring channel@5 { 244*724ba675SRob Herring gw,mode = <1>; 245*724ba675SRob Herring reg = <0x05>; 246*724ba675SRob Herring label = "vdd_3p3"; 247*724ba675SRob Herring }; 248*724ba675SRob Herring 249*724ba675SRob Herring channel@8 { 250*724ba675SRob Herring gw,mode = <1>; 251*724ba675SRob Herring reg = <0x08>; 252*724ba675SRob Herring label = "vdd_bat"; 253*724ba675SRob Herring }; 254*724ba675SRob Herring 255*724ba675SRob Herring channel@b { 256*724ba675SRob Herring gw,mode = <1>; 257*724ba675SRob Herring reg = <0x0b>; 258*724ba675SRob Herring label = "vdd_5p0"; 259*724ba675SRob Herring }; 260*724ba675SRob Herring 261*724ba675SRob Herring channel@e { 262*724ba675SRob Herring gw,mode = <1>; 263*724ba675SRob Herring reg = <0xe>; 264*724ba675SRob Herring label = "vdd_arm"; 265*724ba675SRob Herring }; 266*724ba675SRob Herring 267*724ba675SRob Herring channel@11 { 268*724ba675SRob Herring gw,mode = <1>; 269*724ba675SRob Herring reg = <0x11>; 270*724ba675SRob Herring label = "vdd_soc"; 271*724ba675SRob Herring }; 272*724ba675SRob Herring 273*724ba675SRob Herring channel@14 { 274*724ba675SRob Herring gw,mode = <1>; 275*724ba675SRob Herring reg = <0x14>; 276*724ba675SRob Herring label = "vdd_3p0"; 277*724ba675SRob Herring }; 278*724ba675SRob Herring 279*724ba675SRob Herring channel@17 { 280*724ba675SRob Herring gw,mode = <1>; 281*724ba675SRob Herring reg = <0x17>; 282*724ba675SRob Herring label = "vdd_1p5"; 283*724ba675SRob Herring }; 284*724ba675SRob Herring 285*724ba675SRob Herring channel@1d { 286*724ba675SRob Herring gw,mode = <1>; 287*724ba675SRob Herring reg = <0x1d>; 288*724ba675SRob Herring label = "vdd_1p8a"; 289*724ba675SRob Herring }; 290*724ba675SRob Herring 291*724ba675SRob Herring channel@20 { 292*724ba675SRob Herring gw,mode = <1>; 293*724ba675SRob Herring reg = <0x20>; 294*724ba675SRob Herring label = "vdd_1p0b"; 295*724ba675SRob Herring }; 296*724ba675SRob Herring }; 297*724ba675SRob Herring }; 298*724ba675SRob Herring 299*724ba675SRob Herring gsc_gpio: gpio@23 { 300*724ba675SRob Herring compatible = "nxp,pca9555"; 301*724ba675SRob Herring reg = <0x23>; 302*724ba675SRob Herring gpio-controller; 303*724ba675SRob Herring #gpio-cells = <2>; 304*724ba675SRob Herring interrupt-parent = <&gsc>; 305*724ba675SRob Herring interrupts = <4>; 306*724ba675SRob Herring }; 307*724ba675SRob Herring 308*724ba675SRob Herring eeprom1: eeprom@50 { 309*724ba675SRob Herring compatible = "atmel,24c02"; 310*724ba675SRob Herring reg = <0x50>; 311*724ba675SRob Herring pagesize = <16>; 312*724ba675SRob Herring }; 313*724ba675SRob Herring 314*724ba675SRob Herring eeprom2: eeprom@51 { 315*724ba675SRob Herring compatible = "atmel,24c02"; 316*724ba675SRob Herring reg = <0x51>; 317*724ba675SRob Herring pagesize = <16>; 318*724ba675SRob Herring }; 319*724ba675SRob Herring 320*724ba675SRob Herring eeprom3: eeprom@52 { 321*724ba675SRob Herring compatible = "atmel,24c02"; 322*724ba675SRob Herring reg = <0x52>; 323*724ba675SRob Herring pagesize = <16>; 324*724ba675SRob Herring }; 325*724ba675SRob Herring 326*724ba675SRob Herring eeprom4: eeprom@53 { 327*724ba675SRob Herring compatible = "atmel,24c02"; 328*724ba675SRob Herring reg = <0x53>; 329*724ba675SRob Herring pagesize = <16>; 330*724ba675SRob Herring }; 331*724ba675SRob Herring 332*724ba675SRob Herring rtc: ds1672@68 { 333*724ba675SRob Herring compatible = "dallas,ds1672"; 334*724ba675SRob Herring reg = <0x68>; 335*724ba675SRob Herring }; 336*724ba675SRob Herring}; 337*724ba675SRob Herring 338*724ba675SRob Herring&i2c2 { 339*724ba675SRob Herring clock-frequency = <100000>; 340*724ba675SRob Herring pinctrl-names = "default"; 341*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c2>; 342*724ba675SRob Herring status = "okay"; 343*724ba675SRob Herring 344*724ba675SRob Herring ltc3676: pmic@3c { 345*724ba675SRob Herring compatible = "lltc,ltc3676"; 346*724ba675SRob Herring reg = <0x3c>; 347*724ba675SRob Herring pinctrl-names = "default"; 348*724ba675SRob Herring pinctrl-0 = <&pinctrl_pmic>; 349*724ba675SRob Herring interrupt-parent = <&gpio1>; 350*724ba675SRob Herring interrupts = <8 IRQ_TYPE_EDGE_FALLING>; 351*724ba675SRob Herring 352*724ba675SRob Herring regulators { 353*724ba675SRob Herring /* VDD_SOC (1+R1/R2 = 1.635) */ 354*724ba675SRob Herring reg_vdd_soc: sw1 { 355*724ba675SRob Herring regulator-name = "vddsoc"; 356*724ba675SRob Herring regulator-min-microvolt = <674400>; 357*724ba675SRob Herring regulator-max-microvolt = <1308000>; 358*724ba675SRob Herring lltc,fb-voltage-divider = <127000 200000>; 359*724ba675SRob Herring regulator-ramp-delay = <7000>; 360*724ba675SRob Herring regulator-boot-on; 361*724ba675SRob Herring regulator-always-on; 362*724ba675SRob Herring }; 363*724ba675SRob Herring 364*724ba675SRob Herring /* VDD_DDR (1+R1/R2 = 2.105) */ 365*724ba675SRob Herring reg_vdd_ddr: sw2 { 366*724ba675SRob Herring regulator-name = "vddddr"; 367*724ba675SRob Herring regulator-min-microvolt = <868310>; 368*724ba675SRob Herring regulator-max-microvolt = <1684000>; 369*724ba675SRob Herring lltc,fb-voltage-divider = <221000 200000>; 370*724ba675SRob Herring regulator-ramp-delay = <7000>; 371*724ba675SRob Herring regulator-boot-on; 372*724ba675SRob Herring regulator-always-on; 373*724ba675SRob Herring }; 374*724ba675SRob Herring 375*724ba675SRob Herring /* VDD_ARM (1+R1/R2 = 1.635) */ 376*724ba675SRob Herring reg_vdd_arm: sw3 { 377*724ba675SRob Herring regulator-name = "vddarm"; 378*724ba675SRob Herring regulator-min-microvolt = <674400>; 379*724ba675SRob Herring regulator-max-microvolt = <1308000>; 380*724ba675SRob Herring lltc,fb-voltage-divider = <127000 200000>; 381*724ba675SRob Herring regulator-ramp-delay = <7000>; 382*724ba675SRob Herring regulator-boot-on; 383*724ba675SRob Herring regulator-always-on; 384*724ba675SRob Herring }; 385*724ba675SRob Herring 386*724ba675SRob Herring /* VDD_3P3 (1+R1/R2 = 1.281) */ 387*724ba675SRob Herring reg_3p3: sw4 { 388*724ba675SRob Herring regulator-name = "vdd3p3"; 389*724ba675SRob Herring regulator-min-microvolt = <1880000>; 390*724ba675SRob Herring regulator-max-microvolt = <3647000>; 391*724ba675SRob Herring lltc,fb-voltage-divider = <200000 56200>; 392*724ba675SRob Herring regulator-ramp-delay = <7000>; 393*724ba675SRob Herring regulator-boot-on; 394*724ba675SRob Herring regulator-always-on; 395*724ba675SRob Herring }; 396*724ba675SRob Herring 397*724ba675SRob Herring /* VDD_1P8a (1+R1/R2 = 2.505): HDMI In core */ 398*724ba675SRob Herring reg_1p8a: ldo2 { 399*724ba675SRob Herring regulator-name = "vdd1p8a"; 400*724ba675SRob Herring regulator-min-microvolt = <1816125>; 401*724ba675SRob Herring regulator-max-microvolt = <1816125>; 402*724ba675SRob Herring lltc,fb-voltage-divider = <301000 200000>; 403*724ba675SRob Herring regulator-boot-on; 404*724ba675SRob Herring regulator-always-on; 405*724ba675SRob Herring }; 406*724ba675SRob Herring 407*724ba675SRob Herring /* VDD_1P8b: HDMI In analog */ 408*724ba675SRob Herring reg_1p8b: ldo3 { 409*724ba675SRob Herring regulator-name = "vdd1p8b"; 410*724ba675SRob Herring regulator-min-microvolt = <1800000>; 411*724ba675SRob Herring regulator-max-microvolt = <1800000>; 412*724ba675SRob Herring regulator-boot-on; 413*724ba675SRob Herring }; 414*724ba675SRob Herring 415*724ba675SRob Herring /* VDD_HIGH (1+R1/R2 = 4.17) */ 416*724ba675SRob Herring reg_3p0: ldo4 { 417*724ba675SRob Herring regulator-name = "vdd3p0"; 418*724ba675SRob Herring regulator-min-microvolt = <3023250>; 419*724ba675SRob Herring regulator-max-microvolt = <3023250>; 420*724ba675SRob Herring lltc,fb-voltage-divider = <634000 200000>; 421*724ba675SRob Herring regulator-boot-on; 422*724ba675SRob Herring regulator-always-on; 423*724ba675SRob Herring }; 424*724ba675SRob Herring }; 425*724ba675SRob Herring }; 426*724ba675SRob Herring}; 427*724ba675SRob Herring 428*724ba675SRob Herring&i2c3 { 429*724ba675SRob Herring clock-frequency = <100000>; 430*724ba675SRob Herring pinctrl-names = "default"; 431*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c3>; 432*724ba675SRob Herring status = "okay"; 433*724ba675SRob Herring 434*724ba675SRob Herring gpio_exp: pca9555@24 { 435*724ba675SRob Herring compatible = "nxp,pca9555"; 436*724ba675SRob Herring reg = <0x24>; 437*724ba675SRob Herring gpio-controller; 438*724ba675SRob Herring #gpio-cells = <2>; 439*724ba675SRob Herring }; 440*724ba675SRob Herring 441*724ba675SRob Herring hdmi_receiver: hdmi-receiver@48 { 442*724ba675SRob Herring compatible = "nxp,tda19971"; 443*724ba675SRob Herring pinctrl-names = "default"; 444*724ba675SRob Herring pinctrl-0 = <&pinctrl_tda1997x>; 445*724ba675SRob Herring reg = <0x48>; 446*724ba675SRob Herring interrupt-parent = <&gpio1>; 447*724ba675SRob Herring interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 448*724ba675SRob Herring DOVDD-supply = <®_3p3>; 449*724ba675SRob Herring AVDD-supply = <®_1p8b>; 450*724ba675SRob Herring DVDD-supply = <®_1p8a>; 451*724ba675SRob Herring #sound-dai-cells = <0>; 452*724ba675SRob Herring nxp,audout-format = "i2s"; 453*724ba675SRob Herring nxp,audout-layout = <0>; 454*724ba675SRob Herring nxp,audout-width = <16>; 455*724ba675SRob Herring nxp,audout-mclk-fs = <128>; 456*724ba675SRob Herring /* 457*724ba675SRob Herring * The 8bpp YUV422 semi-planar mode outputs CbCr[11:4] 458*724ba675SRob Herring * and Y[11:4] across 16bits in the same cycle 459*724ba675SRob Herring * which we map to VP[15:08]<->CSI_DATA[19:12] 460*724ba675SRob Herring */ 461*724ba675SRob Herring nxp,vidout-portcfg = 462*724ba675SRob Herring /*G_Y_11_8<->VP[15:12]<->CSI_DATA[19:16]*/ 463*724ba675SRob Herring < TDA1997X_VP24_V15_12 TDA1997X_G_Y_11_8 >, 464*724ba675SRob Herring /*G_Y_7_4<->VP[11:08]<->CSI_DATA[15:12]*/ 465*724ba675SRob Herring < TDA1997X_VP24_V11_08 TDA1997X_G_Y_7_4 >, 466*724ba675SRob Herring /*R_CR_CBCR_11_8<->VP[07:04]<->CSI_DATA[11:08]*/ 467*724ba675SRob Herring < TDA1997X_VP24_V07_04 TDA1997X_R_CR_CBCR_11_8 >, 468*724ba675SRob Herring /*R_CR_CBCR_7_4<->VP[03:00]<->CSI_DATA[07:04]*/ 469*724ba675SRob Herring < TDA1997X_VP24_V03_00 TDA1997X_R_CR_CBCR_7_4 >; 470*724ba675SRob Herring 471*724ba675SRob Herring port { 472*724ba675SRob Herring tda1997x_to_ipu1_csi0_mux: endpoint { 473*724ba675SRob Herring remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; 474*724ba675SRob Herring bus-width = <16>; 475*724ba675SRob Herring hsync-active = <1>; 476*724ba675SRob Herring vsync-active = <1>; 477*724ba675SRob Herring data-active = <1>; 478*724ba675SRob Herring }; 479*724ba675SRob Herring }; 480*724ba675SRob Herring }; 481*724ba675SRob Herring}; 482*724ba675SRob Herring 483*724ba675SRob Herring&ipu1_csi0_from_ipu1_csi0_mux { 484*724ba675SRob Herring bus-width = <16>; 485*724ba675SRob Herring}; 486*724ba675SRob Herring 487*724ba675SRob Herring&ipu1_csi0_mux_from_parallel_sensor { 488*724ba675SRob Herring remote-endpoint = <&tda1997x_to_ipu1_csi0_mux>; 489*724ba675SRob Herring bus-width = <16>; 490*724ba675SRob Herring}; 491*724ba675SRob Herring 492*724ba675SRob Herring&ipu1_csi0 { 493*724ba675SRob Herring pinctrl-names = "default"; 494*724ba675SRob Herring pinctrl-0 = <&pinctrl_ipu1_csi0>; 495*724ba675SRob Herring}; 496*724ba675SRob Herring 497*724ba675SRob Herring&pcie { 498*724ba675SRob Herring pinctrl-names = "default"; 499*724ba675SRob Herring pinctrl-0 = <&pinctrl_pcie>; 500*724ba675SRob Herring reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>; 501*724ba675SRob Herring status = "okay"; 502*724ba675SRob Herring}; 503*724ba675SRob Herring 504*724ba675SRob Herring&pwm2 { 505*724ba675SRob Herring pinctrl-names = "default"; 506*724ba675SRob Herring pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ 507*724ba675SRob Herring status = "disabled"; 508*724ba675SRob Herring}; 509*724ba675SRob Herring 510*724ba675SRob Herring&pwm3 { 511*724ba675SRob Herring pinctrl-names = "default"; 512*724ba675SRob Herring pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ 513*724ba675SRob Herring status = "disabled"; 514*724ba675SRob Herring}; 515*724ba675SRob Herring 516*724ba675SRob Herring&ssi1 { 517*724ba675SRob Herring status = "okay"; 518*724ba675SRob Herring}; 519*724ba675SRob Herring 520*724ba675SRob Herring&uart2 { 521*724ba675SRob Herring pinctrl-names = "default"; 522*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart2>; 523*724ba675SRob Herring status = "okay"; 524*724ba675SRob Herring}; 525*724ba675SRob Herring 526*724ba675SRob Herring&uart3 { 527*724ba675SRob Herring pinctrl-names = "default"; 528*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart3>; 529*724ba675SRob Herring status = "okay"; 530*724ba675SRob Herring}; 531*724ba675SRob Herring 532*724ba675SRob Herring&usbotg { 533*724ba675SRob Herring vbus-supply = <®_usb_otg_vbus>; 534*724ba675SRob Herring pinctrl-names = "default"; 535*724ba675SRob Herring pinctrl-0 = <&pinctrl_usbotg>; 536*724ba675SRob Herring disable-over-current; 537*724ba675SRob Herring status = "okay"; 538*724ba675SRob Herring}; 539*724ba675SRob Herring 540*724ba675SRob Herring&usbh1 { 541*724ba675SRob Herring vbus-supply = <®_usb_h1_vbus>; 542*724ba675SRob Herring status = "okay"; 543*724ba675SRob Herring}; 544*724ba675SRob Herring 545*724ba675SRob Herring&wdog1 { 546*724ba675SRob Herring pinctrl-names = "default"; 547*724ba675SRob Herring pinctrl-0 = <&pinctrl_wdog>; 548*724ba675SRob Herring fsl,ext-reset-output; 549*724ba675SRob Herring}; 550*724ba675SRob Herring 551*724ba675SRob Herring&iomuxc { 552*724ba675SRob Herring pinctrl_audmux: audmuxgrp { 553*724ba675SRob Herring fsl,pins = < 554*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0 555*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT14__AUD5_RXC 0x130b0 556*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT13__AUD5_RXFS 0x130b0 557*724ba675SRob Herring >; 558*724ba675SRob Herring }; 559*724ba675SRob Herring 560*724ba675SRob Herring pinctrl_flexcan1: flexcan1grp { 561*724ba675SRob Herring fsl,pins = < 562*724ba675SRob Herring MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1 563*724ba675SRob Herring MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1 564*724ba675SRob Herring MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* CAN_STBY */ 565*724ba675SRob Herring >; 566*724ba675SRob Herring }; 567*724ba675SRob Herring 568*724ba675SRob Herring pinctrl_gpio_leds: gpioledsgrp { 569*724ba675SRob Herring fsl,pins = < 570*724ba675SRob Herring MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 571*724ba675SRob Herring >; 572*724ba675SRob Herring }; 573*724ba675SRob Herring 574*724ba675SRob Herring pinctrl_gpmi_nand: gpminandgrp { 575*724ba675SRob Herring fsl,pins = < 576*724ba675SRob Herring MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 577*724ba675SRob Herring MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 578*724ba675SRob Herring MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 579*724ba675SRob Herring MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 580*724ba675SRob Herring MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 581*724ba675SRob Herring MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 582*724ba675SRob Herring MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 583*724ba675SRob Herring MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 584*724ba675SRob Herring MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 585*724ba675SRob Herring MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 586*724ba675SRob Herring MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 587*724ba675SRob Herring MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 588*724ba675SRob Herring MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 589*724ba675SRob Herring MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 590*724ba675SRob Herring MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 591*724ba675SRob Herring >; 592*724ba675SRob Herring }; 593*724ba675SRob Herring 594*724ba675SRob Herring pinctrl_i2c1: i2c1grp { 595*724ba675SRob Herring fsl,pins = < 596*724ba675SRob Herring MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 597*724ba675SRob Herring MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 598*724ba675SRob Herring MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1 599*724ba675SRob Herring >; 600*724ba675SRob Herring }; 601*724ba675SRob Herring 602*724ba675SRob Herring pinctrl_i2c2: i2c2grp { 603*724ba675SRob Herring fsl,pins = < 604*724ba675SRob Herring MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 605*724ba675SRob Herring MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 606*724ba675SRob Herring >; 607*724ba675SRob Herring }; 608*724ba675SRob Herring 609*724ba675SRob Herring pinctrl_i2c3: i2c3grp { 610*724ba675SRob Herring fsl,pins = < 611*724ba675SRob Herring MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 612*724ba675SRob Herring MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 613*724ba675SRob Herring >; 614*724ba675SRob Herring }; 615*724ba675SRob Herring 616*724ba675SRob Herring pinctrl_ipu1_csi0: ipu1_csi0grp { 617*724ba675SRob Herring fsl,pins = < 618*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 0x1b0b0 619*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05 0x1b0b0 620*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06 0x1b0b0 621*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07 0x1b0b0 622*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08 0x1b0b0 623*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09 0x1b0b0 624*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x1b0b0 625*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x1b0b0 626*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0 627*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0 628*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0 629*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0 630*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0 631*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0 632*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0 633*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0 634*724ba675SRob Herring MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0 635*724ba675SRob Herring MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0 636*724ba675SRob Herring MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0 637*724ba675SRob Herring >; 638*724ba675SRob Herring }; 639*724ba675SRob Herring 640*724ba675SRob Herring pinctrl_pcie: pciegrp { 641*724ba675SRob Herring fsl,pins = < 642*724ba675SRob Herring MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 /* PCIE RST */ 643*724ba675SRob Herring >; 644*724ba675SRob Herring }; 645*724ba675SRob Herring 646*724ba675SRob Herring pinctrl_pmic: pmicgrp { 647*724ba675SRob Herring fsl,pins = < 648*724ba675SRob Herring MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */ 649*724ba675SRob Herring >; 650*724ba675SRob Herring }; 651*724ba675SRob Herring 652*724ba675SRob Herring pinctrl_pwm2: pwm2grp { 653*724ba675SRob Herring fsl,pins = < 654*724ba675SRob Herring MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 655*724ba675SRob Herring >; 656*724ba675SRob Herring }; 657*724ba675SRob Herring 658*724ba675SRob Herring pinctrl_pwm3: pwm3grp { 659*724ba675SRob Herring fsl,pins = < 660*724ba675SRob Herring MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 661*724ba675SRob Herring >; 662*724ba675SRob Herring }; 663*724ba675SRob Herring 664*724ba675SRob Herring pinctrl_tda1997x: tda1997xgrp { 665*724ba675SRob Herring fsl,pins = < 666*724ba675SRob Herring MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0 667*724ba675SRob Herring >; 668*724ba675SRob Herring }; 669*724ba675SRob Herring 670*724ba675SRob Herring pinctrl_uart2: uart2grp { 671*724ba675SRob Herring fsl,pins = < 672*724ba675SRob Herring MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 673*724ba675SRob Herring MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 674*724ba675SRob Herring >; 675*724ba675SRob Herring }; 676*724ba675SRob Herring 677*724ba675SRob Herring pinctrl_uart3: uart3grp { 678*724ba675SRob Herring fsl,pins = < 679*724ba675SRob Herring MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 680*724ba675SRob Herring MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 681*724ba675SRob Herring >; 682*724ba675SRob Herring }; 683*724ba675SRob Herring 684*724ba675SRob Herring pinctrl_usbotg: usbotggrp { 685*724ba675SRob Herring fsl,pins = < 686*724ba675SRob Herring MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 687*724ba675SRob Herring >; 688*724ba675SRob Herring }; 689*724ba675SRob Herring 690*724ba675SRob Herring pinctrl_wdog: wdoggrp { 691*724ba675SRob Herring fsl,pins = < 692*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 693*724ba675SRob Herring >; 694*724ba675SRob Herring }; 695*724ba675SRob Herring}; 696