1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0+ OR MIT 2*724ba675SRob Herring// 3*724ba675SRob Herring// Copyright 2015 Armadeus Systems <support@armadeus.com> 4*724ba675SRob Herring 5*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 6*724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h> 7*724ba675SRob Herring 8*724ba675SRob Herring/ { 9*724ba675SRob Herring reg_1p8v: regulator-1p8v { 10*724ba675SRob Herring compatible = "regulator-fixed"; 11*724ba675SRob Herring regulator-name = "1P8V"; 12*724ba675SRob Herring regulator-min-microvolt = <1800000>; 13*724ba675SRob Herring regulator-max-microvolt = <1800000>; 14*724ba675SRob Herring regulator-always-on; 15*724ba675SRob Herring vin-supply = <®_3p3v>; 16*724ba675SRob Herring }; 17*724ba675SRob Herring 18*724ba675SRob Herring usdhc1_pwrseq: usdhc1-pwrseq { 19*724ba675SRob Herring compatible = "mmc-pwrseq-simple"; 20*724ba675SRob Herring reset-gpios = <&gpio2 8 GPIO_ACTIVE_LOW>; 21*724ba675SRob Herring post-power-on-delay-ms = <15>; 22*724ba675SRob Herring power-off-delay-us = <70>; 23*724ba675SRob Herring }; 24*724ba675SRob Herring}; 25*724ba675SRob Herring 26*724ba675SRob Herring&fec { 27*724ba675SRob Herring pinctrl-names = "default"; 28*724ba675SRob Herring pinctrl-0 = <&pinctrl_enet>; 29*724ba675SRob Herring phy-mode = "rgmii-id"; 30*724ba675SRob Herring phy-reset-duration = <10>; 31*724ba675SRob Herring phy-reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; 32*724ba675SRob Herring phy-handle = <ðphy1>; 33*724ba675SRob Herring status = "okay"; 34*724ba675SRob Herring 35*724ba675SRob Herring mdio { 36*724ba675SRob Herring #address-cells = <1>; 37*724ba675SRob Herring #size-cells = <0>; 38*724ba675SRob Herring 39*724ba675SRob Herring ethphy1: ethernet-phy@1 { 40*724ba675SRob Herring compatible = "ethernet-phy-ieee802.3-c22"; 41*724ba675SRob Herring reg = <1>; 42*724ba675SRob Herring interrupt-parent = <&gpio1>; 43*724ba675SRob Herring interrupts = <28 IRQ_TYPE_LEVEL_LOW>; 44*724ba675SRob Herring status = "okay"; 45*724ba675SRob Herring }; 46*724ba675SRob Herring }; 47*724ba675SRob Herring}; 48*724ba675SRob Herring 49*724ba675SRob Herring/* Bluetooth */ 50*724ba675SRob Herring&uart2 { 51*724ba675SRob Herring pinctrl-names = "default"; 52*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart2>; 53*724ba675SRob Herring uart-has-rtscts; 54*724ba675SRob Herring status = "okay"; 55*724ba675SRob Herring}; 56*724ba675SRob Herring 57*724ba675SRob Herring/* Wi-Fi */ 58*724ba675SRob Herring&usdhc1 { 59*724ba675SRob Herring pinctrl-names = "default"; 60*724ba675SRob Herring pinctrl-0 = <&pinctrl_usdhc1>; 61*724ba675SRob Herring bus-width = <4>; 62*724ba675SRob Herring mmc-pwrseq = <&usdhc1_pwrseq>; 63*724ba675SRob Herring vmmc-supply = <®_3p3v>; 64*724ba675SRob Herring vqmmc-supply = <®_1p8v>; 65*724ba675SRob Herring cap-power-off-card; 66*724ba675SRob Herring keep-power-in-suspend; 67*724ba675SRob Herring non-removable; 68*724ba675SRob Herring status = "okay"; 69*724ba675SRob Herring 70*724ba675SRob Herring #address-cells = <1>; 71*724ba675SRob Herring #size-cells = <0>; 72*724ba675SRob Herring wlcore: wlcore@2 { 73*724ba675SRob Herring compatible = "ti,wl1271"; 74*724ba675SRob Herring reg = <2>; 75*724ba675SRob Herring interrupt-parent = <&gpio2>; 76*724ba675SRob Herring interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; 77*724ba675SRob Herring ref-clock-frequency = <38400000>; 78*724ba675SRob Herring tcxo-clock-frequency = <38400000>; 79*724ba675SRob Herring }; 80*724ba675SRob Herring}; 81*724ba675SRob Herring 82*724ba675SRob Herring/* eMMC */ 83*724ba675SRob Herring&usdhc3 { 84*724ba675SRob Herring pinctrl-names = "default"; 85*724ba675SRob Herring pinctrl-0 = <&pinctrl_usdhc3>; 86*724ba675SRob Herring bus-width = <8>; 87*724ba675SRob Herring no-1-8-v; 88*724ba675SRob Herring non-removable; 89*724ba675SRob Herring status = "okay"; 90*724ba675SRob Herring}; 91*724ba675SRob Herring 92*724ba675SRob Herring&iomuxc { 93*724ba675SRob Herring pinctrl_enet: enetgrp { 94*724ba675SRob Herring fsl,pins = < 95*724ba675SRob Herring MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b8b0 96*724ba675SRob Herring MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 97*724ba675SRob Herring MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 98*724ba675SRob Herring MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x130b0 99*724ba675SRob Herring MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x130b0 100*724ba675SRob Herring MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 101*724ba675SRob Herring MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 102*724ba675SRob Herring MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 103*724ba675SRob Herring MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 104*724ba675SRob Herring MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 105*724ba675SRob Herring MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 106*724ba675SRob Herring MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x13030 107*724ba675SRob Herring MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 108*724ba675SRob Herring MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030 109*724ba675SRob Herring MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1f030 110*724ba675SRob Herring MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1f030 111*724ba675SRob Herring MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x13030 112*724ba675SRob Herring >; 113*724ba675SRob Herring }; 114*724ba675SRob Herring 115*724ba675SRob Herring pinctrl_uart2: uart2grp { 116*724ba675SRob Herring fsl,pins = < 117*724ba675SRob Herring MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b0 118*724ba675SRob Herring MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b0 119*724ba675SRob Herring MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b0 120*724ba675SRob Herring MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b0 121*724ba675SRob Herring MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x130b0 /* BT_EN */ 122*724ba675SRob Herring >; 123*724ba675SRob Herring }; 124*724ba675SRob Herring 125*724ba675SRob Herring pinctrl_usdhc1: usdhc1grp { 126*724ba675SRob Herring fsl,pins = < 127*724ba675SRob Herring MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059 128*724ba675SRob Herring MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059 129*724ba675SRob Herring MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059 130*724ba675SRob Herring MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059 131*724ba675SRob Herring MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059 132*724ba675SRob Herring MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059 133*724ba675SRob Herring MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x130b0 /* WL_EN */ 134*724ba675SRob Herring MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x130b0 /* WL_IRQ */ 135*724ba675SRob Herring >; 136*724ba675SRob Herring }; 137*724ba675SRob Herring 138*724ba675SRob Herring pinctrl_usdhc3: usdhc3grp { 139*724ba675SRob Herring fsl,pins = < 140*724ba675SRob Herring MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 141*724ba675SRob Herring MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 142*724ba675SRob Herring MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 143*724ba675SRob Herring MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 144*724ba675SRob Herring MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 145*724ba675SRob Herring MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 146*724ba675SRob Herring MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 147*724ba675SRob Herring MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 148*724ba675SRob Herring MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 149*724ba675SRob Herring MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 150*724ba675SRob Herring >; 151*724ba675SRob Herring }; 152*724ba675SRob Herring}; 153