1*724ba675SRob Herring/* 2*724ba675SRob Herring * Copyright 2013 CompuLab Ltd. 3*724ba675SRob Herring * Copyright 2016 Christopher Spinrath 4*724ba675SRob Herring * 5*724ba675SRob Herring * Based on the devicetree distributed with the vendor kernel for the 6*724ba675SRob Herring * Utilite Pro: 7*724ba675SRob Herring * Copyright 2013 CompuLab Ltd. 8*724ba675SRob Herring * Author: Valentin Raevsky <valentin@compulab.co.il> 9*724ba675SRob Herring * 10*724ba675SRob Herring * This file is dual-licensed: you can use it either under the terms 11*724ba675SRob Herring * of the GPL or the X11 license, at your option. Note that this dual 12*724ba675SRob Herring * licensing only applies to this file, and not this project as a 13*724ba675SRob Herring * whole. 14*724ba675SRob Herring * 15*724ba675SRob Herring * a) This file is free software; you can redistribute it and/or 16*724ba675SRob Herring * modify it under the terms of the GNU General Public License as 17*724ba675SRob Herring * published by the Free Software Foundation; either version 2 of the 18*724ba675SRob Herring * License, or (at your option) any later version. 19*724ba675SRob Herring * 20*724ba675SRob Herring * This file is distributed in the hope that it will be useful, 21*724ba675SRob Herring * but WITHOUT ANY WARRANTY; without even the implied warranty of 22*724ba675SRob Herring * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23*724ba675SRob Herring * GNU General Public License for more details. 24*724ba675SRob Herring * 25*724ba675SRob Herring * Or, alternatively, 26*724ba675SRob Herring * 27*724ba675SRob Herring * b) Permission is hereby granted, free of charge, to any person 28*724ba675SRob Herring * obtaining a copy of this software and associated documentation 29*724ba675SRob Herring * files (the "Software"), to deal in the Software without 30*724ba675SRob Herring * restriction, including without limitation the rights to use, 31*724ba675SRob Herring * copy, modify, merge, publish, distribute, sublicense, and/or 32*724ba675SRob Herring * sell copies of the Software, and to permit persons to whom the 33*724ba675SRob Herring * Software is furnished to do so, subject to the following 34*724ba675SRob Herring * conditions: 35*724ba675SRob Herring * 36*724ba675SRob Herring * The above copyright notice and this permission notice shall be 37*724ba675SRob Herring * included in all copies or substantial portions of the Software. 38*724ba675SRob Herring * 39*724ba675SRob Herring * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 40*724ba675SRob Herring * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 41*724ba675SRob Herring * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 42*724ba675SRob Herring * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 43*724ba675SRob Herring * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 44*724ba675SRob Herring * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 45*724ba675SRob Herring * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 46*724ba675SRob Herring * OTHER DEALINGS IN THE SOFTWARE. 47*724ba675SRob Herring */ 48*724ba675SRob Herring 49*724ba675SRob Herring#include <dt-bindings/input/input.h> 50*724ba675SRob Herring#include "imx6q-cm-fx6.dts" 51*724ba675SRob Herring 52*724ba675SRob Herring/ { 53*724ba675SRob Herring model = "CompuLab Utilite Pro"; 54*724ba675SRob Herring compatible = "compulab,utilite-pro", "compulab,cm-fx6", "fsl,imx6q"; 55*724ba675SRob Herring 56*724ba675SRob Herring aliases { 57*724ba675SRob Herring ethernet1 = ð1; 58*724ba675SRob Herring rtc0 = &em3027; 59*724ba675SRob Herring rtc1 = &snvs_rtc; 60*724ba675SRob Herring }; 61*724ba675SRob Herring 62*724ba675SRob Herring encoder { 63*724ba675SRob Herring compatible = "ti,tfp410"; 64*724ba675SRob Herring 65*724ba675SRob Herring ports { 66*724ba675SRob Herring #address-cells = <1>; 67*724ba675SRob Herring #size-cells = <0>; 68*724ba675SRob Herring 69*724ba675SRob Herring port@0 { 70*724ba675SRob Herring reg = <0>; 71*724ba675SRob Herring 72*724ba675SRob Herring tfp410_in: endpoint { 73*724ba675SRob Herring remote-endpoint = <¶llel_display_out>; 74*724ba675SRob Herring }; 75*724ba675SRob Herring }; 76*724ba675SRob Herring 77*724ba675SRob Herring port@1 { 78*724ba675SRob Herring reg = <1>; 79*724ba675SRob Herring 80*724ba675SRob Herring tfp410_out: endpoint { 81*724ba675SRob Herring remote-endpoint = <&hdmi_connector_in>; 82*724ba675SRob Herring }; 83*724ba675SRob Herring }; 84*724ba675SRob Herring }; 85*724ba675SRob Herring }; 86*724ba675SRob Herring 87*724ba675SRob Herring gpio-keys { 88*724ba675SRob Herring compatible = "gpio-keys"; 89*724ba675SRob Herring pinctrl-names = "default"; 90*724ba675SRob Herring pinctrl-0 = <&pinctrl_gpio_keys>; 91*724ba675SRob Herring 92*724ba675SRob Herring key-power { 93*724ba675SRob Herring label = "Power Button"; 94*724ba675SRob Herring gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; 95*724ba675SRob Herring linux,code = <KEY_POWER>; 96*724ba675SRob Herring wakeup-source; 97*724ba675SRob Herring }; 98*724ba675SRob Herring }; 99*724ba675SRob Herring 100*724ba675SRob Herring hdmi-connector { 101*724ba675SRob Herring compatible = "hdmi-connector"; 102*724ba675SRob Herring pinctrl-names = "default"; 103*724ba675SRob Herring pinctrl-0 = <&pinctrl_hpd>; 104*724ba675SRob Herring type = "a"; 105*724ba675SRob Herring ddc-i2c-bus = <&i2c_dvi_ddc>; 106*724ba675SRob Herring hpd-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; 107*724ba675SRob Herring 108*724ba675SRob Herring port { 109*724ba675SRob Herring hdmi_connector_in: endpoint { 110*724ba675SRob Herring remote-endpoint = <&tfp410_out>; 111*724ba675SRob Herring }; 112*724ba675SRob Herring }; 113*724ba675SRob Herring }; 114*724ba675SRob Herring 115*724ba675SRob Herring i2cmux { 116*724ba675SRob Herring compatible = "i2c-mux-gpio"; 117*724ba675SRob Herring pinctrl-names = "default"; 118*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c1mux>; 119*724ba675SRob Herring #address-cells = <1>; 120*724ba675SRob Herring #size-cells = <0>; 121*724ba675SRob Herring 122*724ba675SRob Herring mux-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 123*724ba675SRob Herring i2c-parent = <&i2c1>; 124*724ba675SRob Herring 125*724ba675SRob Herring i2c@0 { 126*724ba675SRob Herring reg = <0>; 127*724ba675SRob Herring #address-cells = <1>; 128*724ba675SRob Herring #size-cells = <0>; 129*724ba675SRob Herring 130*724ba675SRob Herring eeprom@50 { 131*724ba675SRob Herring compatible = "atmel,24c02"; 132*724ba675SRob Herring reg = <0x50>; 133*724ba675SRob Herring pagesize = <16>; 134*724ba675SRob Herring }; 135*724ba675SRob Herring 136*724ba675SRob Herring em3027: rtc@56 { 137*724ba675SRob Herring compatible = "emmicro,em3027"; 138*724ba675SRob Herring reg = <0x56>; 139*724ba675SRob Herring }; 140*724ba675SRob Herring }; 141*724ba675SRob Herring 142*724ba675SRob Herring i2c_dvi_ddc: i2c@1 { 143*724ba675SRob Herring reg = <1>; 144*724ba675SRob Herring #address-cells = <1>; 145*724ba675SRob Herring #size-cells = <0>; 146*724ba675SRob Herring }; 147*724ba675SRob Herring }; 148*724ba675SRob Herring 149*724ba675SRob Herring parallel-display { 150*724ba675SRob Herring compatible = "fsl,imx-parallel-display"; 151*724ba675SRob Herring #address-cells = <1>; 152*724ba675SRob Herring #size-cells = <0>; 153*724ba675SRob Herring pinctrl-names = "default"; 154*724ba675SRob Herring pinctrl-0 = <&pinctrl_ipu1>; 155*724ba675SRob Herring 156*724ba675SRob Herring interface-pix-fmt = "rgb24"; 157*724ba675SRob Herring 158*724ba675SRob Herring port@0 { 159*724ba675SRob Herring reg = <0>; 160*724ba675SRob Herring 161*724ba675SRob Herring parallel_display_in: endpoint { 162*724ba675SRob Herring remote-endpoint = <&ipu1_di0_disp0>; 163*724ba675SRob Herring }; 164*724ba675SRob Herring }; 165*724ba675SRob Herring 166*724ba675SRob Herring port@1 { 167*724ba675SRob Herring reg = <1>; 168*724ba675SRob Herring 169*724ba675SRob Herring parallel_display_out: endpoint { 170*724ba675SRob Herring remote-endpoint = <&tfp410_in>; 171*724ba675SRob Herring }; 172*724ba675SRob Herring }; 173*724ba675SRob Herring }; 174*724ba675SRob Herring}; 175*724ba675SRob Herring 176*724ba675SRob Herring/* 177*724ba675SRob Herring * A single IPU is not able to drive both display interfaces available on the 178*724ba675SRob Herring * Utilite Pro at high resolution due to its bandwidth limitation. Since the 179*724ba675SRob Herring * tfp410 encoder is wired up to IPU1, sever the link between IPU1 and the 180*724ba675SRob Herring * SoC-internal Designware HDMI encoder forcing the latter to be connected to 181*724ba675SRob Herring * IPU2 instead of IPU1. 182*724ba675SRob Herring */ 183*724ba675SRob Herring/delete-node/&ipu1_di0_hdmi; 184*724ba675SRob Herring/delete-node/&hdmi_mux_0; 185*724ba675SRob Herring/delete-node/&ipu1_di1_hdmi; 186*724ba675SRob Herring/delete-node/&hdmi_mux_1; 187*724ba675SRob Herring 188*724ba675SRob Herring&hdmi { 189*724ba675SRob Herring pinctrl-names = "default"; 190*724ba675SRob Herring pinctrl-0 = <&pinctrl_hdmicec>; 191*724ba675SRob Herring ddc-i2c-bus = <&i2c2>; 192*724ba675SRob Herring status = "okay"; 193*724ba675SRob Herring}; 194*724ba675SRob Herring 195*724ba675SRob Herring&i2c1 { 196*724ba675SRob Herring pinctrl-names = "default"; 197*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c1>; 198*724ba675SRob Herring status = "okay"; 199*724ba675SRob Herring}; 200*724ba675SRob Herring 201*724ba675SRob Herring&i2c2 { 202*724ba675SRob Herring pinctrl-names = "default"; 203*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c2>; 204*724ba675SRob Herring status = "okay"; 205*724ba675SRob Herring}; 206*724ba675SRob Herring 207*724ba675SRob Herring&iomuxc { 208*724ba675SRob Herring pinctrl_gpio_keys: gpio_keysgrp { 209*724ba675SRob Herring fsl,pins = < 210*724ba675SRob Herring MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 211*724ba675SRob Herring >; 212*724ba675SRob Herring }; 213*724ba675SRob Herring 214*724ba675SRob Herring pinctrl_hdmicec: hdmicecgrp { 215*724ba675SRob Herring fsl,pins = < 216*724ba675SRob Herring MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 217*724ba675SRob Herring >; 218*724ba675SRob Herring }; 219*724ba675SRob Herring 220*724ba675SRob Herring pinctrl_hpd: hpdgrp { 221*724ba675SRob Herring fsl,pins = < 222*724ba675SRob Herring MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 223*724ba675SRob Herring >; 224*724ba675SRob Herring }; 225*724ba675SRob Herring 226*724ba675SRob Herring pinctrl_i2c1: i2c1grp { 227*724ba675SRob Herring fsl,pins = < 228*724ba675SRob Herring MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 229*724ba675SRob Herring MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 230*724ba675SRob Herring >; 231*724ba675SRob Herring }; 232*724ba675SRob Herring 233*724ba675SRob Herring pinctrl_i2c1mux: i2c1muxgrp { 234*724ba675SRob Herring fsl,pins = < 235*724ba675SRob Herring MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 236*724ba675SRob Herring >; 237*724ba675SRob Herring }; 238*724ba675SRob Herring 239*724ba675SRob Herring pinctrl_i2c2: i2c2grp { 240*724ba675SRob Herring fsl,pins = < 241*724ba675SRob Herring MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 242*724ba675SRob Herring MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 243*724ba675SRob Herring >; 244*724ba675SRob Herring }; 245*724ba675SRob Herring 246*724ba675SRob Herring pinctrl_ipu1: ipu1grp { 247*724ba675SRob Herring fsl,pins = < 248*724ba675SRob Herring MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x38 249*724ba675SRob Herring MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x38 250*724ba675SRob Herring MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x38 251*724ba675SRob Herring MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x38 252*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x38 253*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x38 254*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x38 255*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x38 256*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x38 257*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x38 258*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x38 259*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x38 260*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x38 261*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x38 262*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x38 263*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x38 264*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x38 265*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x38 266*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x38 267*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x38 268*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x38 269*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x38 270*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x38 271*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x38 272*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x38 273*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x38 274*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x38 275*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x38 276*724ba675SRob Herring >; 277*724ba675SRob Herring }; 278*724ba675SRob Herring 279*724ba675SRob Herring pinctrl_uart2: uart2grp { 280*724ba675SRob Herring fsl,pins = < 281*724ba675SRob Herring MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1 282*724ba675SRob Herring MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1 283*724ba675SRob Herring MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1 284*724ba675SRob Herring MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1 285*724ba675SRob Herring >; 286*724ba675SRob Herring }; 287*724ba675SRob Herring 288*724ba675SRob Herring pinctrl_usdhc3: usdhc3grp { 289*724ba675SRob Herring fsl,pins = < 290*724ba675SRob Herring MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 291*724ba675SRob Herring MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 292*724ba675SRob Herring MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 293*724ba675SRob Herring MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 294*724ba675SRob Herring MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 295*724ba675SRob Herring MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 296*724ba675SRob Herring >; 297*724ba675SRob Herring }; 298*724ba675SRob Herring 299*724ba675SRob Herring pinctrl_usdhc3_100mhz: usdhc3grp-100mhz { 300*724ba675SRob Herring fsl,pins = < 301*724ba675SRob Herring MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B9 302*724ba675SRob Herring MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B9 303*724ba675SRob Herring MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B9 304*724ba675SRob Herring MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B9 305*724ba675SRob Herring MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B9 306*724ba675SRob Herring MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B9 307*724ba675SRob Herring >; 308*724ba675SRob Herring }; 309*724ba675SRob Herring 310*724ba675SRob Herring pinctrl_usdhc3_200mhz: usdhc3grp-200mhz { 311*724ba675SRob Herring fsl,pins = < 312*724ba675SRob Herring MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9 313*724ba675SRob Herring MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9 314*724ba675SRob Herring MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9 315*724ba675SRob Herring MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9 316*724ba675SRob Herring MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9 317*724ba675SRob Herring MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9 318*724ba675SRob Herring >; 319*724ba675SRob Herring }; 320*724ba675SRob Herring}; 321*724ba675SRob Herring 322*724ba675SRob Herring&ipu1_di0_disp0 { 323*724ba675SRob Herring remote-endpoint = <¶llel_display_in>; 324*724ba675SRob Herring}; 325*724ba675SRob Herring 326*724ba675SRob Herring&pcie { 327*724ba675SRob Herring pcie@0,0 { 328*724ba675SRob Herring reg = <0x000000 0 0 0 0>; 329*724ba675SRob Herring #address-cells = <3>; 330*724ba675SRob Herring #size-cells = <2>; 331*724ba675SRob Herring 332*724ba675SRob Herring /* non-removable i211 ethernet card */ 333*724ba675SRob Herring eth1: intel,i211@pcie0,0 { 334*724ba675SRob Herring reg = <0x010000 0 0 0 0>; 335*724ba675SRob Herring }; 336*724ba675SRob Herring }; 337*724ba675SRob Herring}; 338*724ba675SRob Herring 339*724ba675SRob Herring&uart2 { 340*724ba675SRob Herring pinctrl-names = "default"; 341*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart2>; 342*724ba675SRob Herring uart-has-rtscts; 343*724ba675SRob Herring status = "okay"; 344*724ba675SRob Herring}; 345*724ba675SRob Herring 346*724ba675SRob Herring&usdhc3 { 347*724ba675SRob Herring pinctrl-names = "default", "state_100mhz", "state_200mhz"; 348*724ba675SRob Herring pinctrl-0 = <&pinctrl_usdhc3>; 349*724ba675SRob Herring pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 350*724ba675SRob Herring pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 351*724ba675SRob Herring no-1-8-v; 352*724ba675SRob Herring broken-cd; 353*724ba675SRob Herring keep-power-in-suspend; 354*724ba675SRob Herring status = "okay"; 355*724ba675SRob Herring}; 356