1*724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Copyright 2018 4*724ba675SRob Herring * Lukasz Majewski, DENX Software Engineering, lukma@denx.de 5*724ba675SRob Herring */ 6*724ba675SRob Herring 7*724ba675SRob Herring/dts-v1/; 8*724ba675SRob Herring 9*724ba675SRob Herring#include "imx6q.dtsi" 10*724ba675SRob Herring 11*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 12*724ba675SRob Herring#include <dt-bindings/pwm/pwm.h> 13*724ba675SRob Herring#include <dt-bindings/sound/fsl-imx-audmux.h> 14*724ba675SRob Herring 15*724ba675SRob Herring/ { 16*724ba675SRob Herring backlight_lcd: backlight-lcd { 17*724ba675SRob Herring compatible = "pwm-backlight"; 18*724ba675SRob Herring pwms = <&pwm1 0 5000000>; 19*724ba675SRob Herring brightness-levels = <0 255>; 20*724ba675SRob Herring num-interpolated-steps = <255>; 21*724ba675SRob Herring default-brightness-level = <250>; 22*724ba675SRob Herring }; 23*724ba675SRob Herring 24*724ba675SRob Herring beeper { 25*724ba675SRob Herring compatible = "pwm-beeper"; 26*724ba675SRob Herring pwms = <&pwm2 0 500000>; 27*724ba675SRob Herring }; 28*724ba675SRob Herring 29*724ba675SRob Herring lcd_display: display { 30*724ba675SRob Herring compatible = "fsl,imx-parallel-display"; 31*724ba675SRob Herring #address-cells = <1>; 32*724ba675SRob Herring #size-cells = <0>; 33*724ba675SRob Herring interface-pix-fmt = "rgb24"; 34*724ba675SRob Herring pinctrl-names = "default"; 35*724ba675SRob Herring pinctrl-0 = <&pinctrl_ipu1>; 36*724ba675SRob Herring 37*724ba675SRob Herring port@0 { 38*724ba675SRob Herring reg = <0>; 39*724ba675SRob Herring 40*724ba675SRob Herring lcd_display_in: endpoint { 41*724ba675SRob Herring remote-endpoint = <&ipu1_di0_disp0>; 42*724ba675SRob Herring }; 43*724ba675SRob Herring }; 44*724ba675SRob Herring 45*724ba675SRob Herring port@1 { 46*724ba675SRob Herring reg = <1>; 47*724ba675SRob Herring 48*724ba675SRob Herring lcd_display_out: endpoint { 49*724ba675SRob Herring remote-endpoint = <&lcd_panel_in>; 50*724ba675SRob Herring }; 51*724ba675SRob Herring }; 52*724ba675SRob Herring }; 53*724ba675SRob Herring 54*724ba675SRob Herring lcd_panel: lcd-panel { 55*724ba675SRob Herring compatible = "auo,g070vvn01"; 56*724ba675SRob Herring backlight = <&backlight_lcd>; 57*724ba675SRob Herring power-supply = <®_display>; 58*724ba675SRob Herring 59*724ba675SRob Herring port { 60*724ba675SRob Herring lcd_panel_in: endpoint { 61*724ba675SRob Herring remote-endpoint = <&lcd_display_out>; 62*724ba675SRob Herring }; 63*724ba675SRob Herring }; 64*724ba675SRob Herring }; 65*724ba675SRob Herring 66*724ba675SRob Herring leds { 67*724ba675SRob Herring compatible = "gpio-leds"; 68*724ba675SRob Herring 69*724ba675SRob Herring led-green { 70*724ba675SRob Herring label = "led1"; 71*724ba675SRob Herring gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>; 72*724ba675SRob Herring linux,default-trigger = "gpio"; 73*724ba675SRob Herring default-state = "off"; 74*724ba675SRob Herring }; 75*724ba675SRob Herring 76*724ba675SRob Herring led-red { 77*724ba675SRob Herring label = "led0"; 78*724ba675SRob Herring gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>; 79*724ba675SRob Herring linux,default-trigger = "gpio"; 80*724ba675SRob Herring default-state = "off"; 81*724ba675SRob Herring }; 82*724ba675SRob Herring }; 83*724ba675SRob Herring 84*724ba675SRob Herring reg_3p3v: regulator-3p3v { 85*724ba675SRob Herring compatible = "regulator-fixed"; 86*724ba675SRob Herring regulator-name = "3P3V"; 87*724ba675SRob Herring regulator-min-microvolt = <3300000>; 88*724ba675SRob Herring regulator-max-microvolt = <3300000>; 89*724ba675SRob Herring regulator-always-on; 90*724ba675SRob Herring }; 91*724ba675SRob Herring 92*724ba675SRob Herring reg_audio: regulator-audio { 93*724ba675SRob Herring compatible = "regulator-fixed"; 94*724ba675SRob Herring regulator-name = "sgtl5000-supply"; 95*724ba675SRob Herring gpio = <&gpio6 31 GPIO_ACTIVE_HIGH>; 96*724ba675SRob Herring enable-active-high; 97*724ba675SRob Herring regulator-always-on; 98*724ba675SRob Herring }; 99*724ba675SRob Herring 100*724ba675SRob Herring reg_display: regulator-display { 101*724ba675SRob Herring compatible = "regulator-fixed"; 102*724ba675SRob Herring regulator-name = "display-supply"; 103*724ba675SRob Herring regulator-min-microvolt = <3300000>; 104*724ba675SRob Herring regulator-max-microvolt = <3300000>; 105*724ba675SRob Herring regulator-always-on; 106*724ba675SRob Herring }; 107*724ba675SRob Herring 108*724ba675SRob Herring reg_usb_h1_vbus: regulator-usb_h1_vbus { 109*724ba675SRob Herring compatible = "regulator-fixed"; 110*724ba675SRob Herring regulator-name = "usb_h1_vbus"; 111*724ba675SRob Herring regulator-min-microvolt = <5000000>; 112*724ba675SRob Herring regulator-max-microvolt = <5000000>; 113*724ba675SRob Herring enable-active-high; 114*724ba675SRob Herring }; 115*724ba675SRob Herring 116*724ba675SRob Herring sound { 117*724ba675SRob Herring compatible = "simple-audio-card"; 118*724ba675SRob Herring simple-audio-card,name = "imx6q-sgtl5000-audio"; 119*724ba675SRob Herring simple-audio-card,format = "i2s"; 120*724ba675SRob Herring simple-audio-card,bitclock-master = <&codec_dai>; 121*724ba675SRob Herring simple-audio-card,frame-master = <&codec_dai>; 122*724ba675SRob Herring 123*724ba675SRob Herring cpu_dai: simple-audio-card,cpu { 124*724ba675SRob Herring sound-dai = <&ssi1>; 125*724ba675SRob Herring }; 126*724ba675SRob Herring 127*724ba675SRob Herring codec_dai: simple-audio-card,codec { 128*724ba675SRob Herring sound-dai = <&sgtl5000>; 129*724ba675SRob Herring }; 130*724ba675SRob Herring }; 131*724ba675SRob Herring}; 132*724ba675SRob Herring 133*724ba675SRob Herring&audmux { 134*724ba675SRob Herring pinctrl-names = "default"; 135*724ba675SRob Herring pinctrl-0 = <&pinctrl_audmux>; 136*724ba675SRob Herring status = "okay"; 137*724ba675SRob Herring 138*724ba675SRob Herring mux-ssi1 { 139*724ba675SRob Herring fsl,audmux-port = <0>; 140*724ba675SRob Herring fsl,port-config = < 141*724ba675SRob Herring (IMX_AUDMUX_V2_PTCR_SYN | 142*724ba675SRob Herring IMX_AUDMUX_V2_PTCR_TFSEL(2) | 143*724ba675SRob Herring IMX_AUDMUX_V2_PTCR_TCSEL(2) | 144*724ba675SRob Herring IMX_AUDMUX_V2_PTCR_TFSDIR | 145*724ba675SRob Herring IMX_AUDMUX_V2_PTCR_TCLKDIR) 146*724ba675SRob Herring IMX_AUDMUX_V2_PDCR_RXDSEL(2) 147*724ba675SRob Herring >; 148*724ba675SRob Herring }; 149*724ba675SRob Herring 150*724ba675SRob Herring mux-aud3 { 151*724ba675SRob Herring fsl,audmux-port = <2>; 152*724ba675SRob Herring fsl,port-config = < 153*724ba675SRob Herring IMX_AUDMUX_V2_PTCR_SYN 154*724ba675SRob Herring IMX_AUDMUX_V2_PDCR_RXDSEL(0) 155*724ba675SRob Herring >; 156*724ba675SRob Herring }; 157*724ba675SRob Herring}; 158*724ba675SRob Herring 159*724ba675SRob Herring&can1 { 160*724ba675SRob Herring pinctrl-names = "default"; 161*724ba675SRob Herring pinctrl-0 = <&pinctrl_flexcan1>; 162*724ba675SRob Herring}; 163*724ba675SRob Herring 164*724ba675SRob Herring&can2 { 165*724ba675SRob Herring pinctrl-names = "default"; 166*724ba675SRob Herring pinctrl-0 = <&pinctrl_flexcan2>; 167*724ba675SRob Herring}; 168*724ba675SRob Herring 169*724ba675SRob Herring&fec { 170*724ba675SRob Herring pinctrl-names = "default"; 171*724ba675SRob Herring pinctrl-0 = <&pinctrl_enet>; 172*724ba675SRob Herring phy-mode = "rgmii"; 173*724ba675SRob Herring fsl,magic-packet; 174*724ba675SRob Herring status = "okay"; 175*724ba675SRob Herring}; 176*724ba675SRob Herring 177*724ba675SRob Herring&i2c1 { 178*724ba675SRob Herring clock-frequency = <400000>; 179*724ba675SRob Herring pinctrl-names = "default"; 180*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c1>; 181*724ba675SRob Herring status = "okay"; 182*724ba675SRob Herring 183*724ba675SRob Herring touchscreen@5d { 184*724ba675SRob Herring compatible = "goodix,gt911"; 185*724ba675SRob Herring reg = <0x5d>; 186*724ba675SRob Herring pinctrl-names = "default"; 187*724ba675SRob Herring pinctrl-0 = <&pinctrl_ts>; 188*724ba675SRob Herring interrupt-parent = <&gpio1>; 189*724ba675SRob Herring interrupts = <9 IRQ_TYPE_EDGE_FALLING>; 190*724ba675SRob Herring irq-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; 191*724ba675SRob Herring reset-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; 192*724ba675SRob Herring }; 193*724ba675SRob Herring 194*724ba675SRob Herring ds1307: rtc@32 { 195*724ba675SRob Herring compatible = "dallas,ds1307"; 196*724ba675SRob Herring reg = <0x32>; 197*724ba675SRob Herring }; 198*724ba675SRob Herring}; 199*724ba675SRob Herring 200*724ba675SRob Herring&i2c2 { 201*724ba675SRob Herring clock-frequency = <400000>; 202*724ba675SRob Herring pinctrl-names = "default"; 203*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c2>; 204*724ba675SRob Herring status = "okay"; 205*724ba675SRob Herring 206*724ba675SRob Herring sgtl5000: audio-codec@a { 207*724ba675SRob Herring compatible = "fsl,sgtl5000"; 208*724ba675SRob Herring #sound-dai-cells = <0>; 209*724ba675SRob Herring reg = <0x0a>; 210*724ba675SRob Herring pinctrl-names = "default"; 211*724ba675SRob Herring pinctrl-0 = <&pinctrl_codec>; 212*724ba675SRob Herring clocks = <&clks IMX6QDL_CLK_CKO>; 213*724ba675SRob Herring VDDA-supply = <®_3p3v>; 214*724ba675SRob Herring VDDIO-supply = <®_3p3v>; 215*724ba675SRob Herring }; 216*724ba675SRob Herring}; 217*724ba675SRob Herring 218*724ba675SRob Herring&iomuxc { 219*724ba675SRob Herring pinctrl_audmux: audmuxgrp { 220*724ba675SRob Herring fsl,pins = < 221*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 222*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 223*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 224*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 225*724ba675SRob Herring >; 226*724ba675SRob Herring }; 227*724ba675SRob Herring 228*724ba675SRob Herring pinctrl_codec: codecgrp { 229*724ba675SRob Herring fsl,pins = < 230*724ba675SRob Herring MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b0 231*724ba675SRob Herring /* sgtl5000 sys_mclk clock routed to CLKO1 */ 232*724ba675SRob Herring MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0 233*724ba675SRob Herring >; 234*724ba675SRob Herring }; 235*724ba675SRob Herring 236*724ba675SRob Herring pinctrl_enet: enetgrp { 237*724ba675SRob Herring fsl,pins = < 238*724ba675SRob Herring MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 239*724ba675SRob Herring MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 240*724ba675SRob Herring MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 241*724ba675SRob Herring MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 242*724ba675SRob Herring MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 243*724ba675SRob Herring MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 244*724ba675SRob Herring MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 245*724ba675SRob Herring MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 246*724ba675SRob Herring MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 247*724ba675SRob Herring MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 248*724ba675SRob Herring MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 249*724ba675SRob Herring MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 250*724ba675SRob Herring MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 251*724ba675SRob Herring MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 252*724ba675SRob Herring MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 253*724ba675SRob Herring MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 254*724ba675SRob Herring >; 255*724ba675SRob Herring }; 256*724ba675SRob Herring 257*724ba675SRob Herring pinctrl_flexcan1: can1grp { 258*724ba675SRob Herring fsl,pins = < 259*724ba675SRob Herring MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0 260*724ba675SRob Herring MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0 261*724ba675SRob Herring >; 262*724ba675SRob Herring }; 263*724ba675SRob Herring 264*724ba675SRob Herring pinctrl_flexcan2: can2grp { 265*724ba675SRob Herring fsl,pins = < 266*724ba675SRob Herring MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0 267*724ba675SRob Herring MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0 268*724ba675SRob Herring >; 269*724ba675SRob Herring }; 270*724ba675SRob Herring 271*724ba675SRob Herring pinctrl_i2c1: i2c1grp { 272*724ba675SRob Herring fsl,pins = < 273*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 274*724ba675SRob Herring MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 275*724ba675SRob Herring >; 276*724ba675SRob Herring }; 277*724ba675SRob Herring 278*724ba675SRob Herring pinctrl_i2c2: i2c2grp { 279*724ba675SRob Herring fsl,pins = < 280*724ba675SRob Herring MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 281*724ba675SRob Herring MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 282*724ba675SRob Herring >; 283*724ba675SRob Herring }; 284*724ba675SRob Herring 285*724ba675SRob Herring pinctrl_ipu1: ipu1grp { 286*724ba675SRob Herring fsl,pins = < 287*724ba675SRob Herring MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 288*724ba675SRob Herring MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 289*724ba675SRob Herring MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 290*724ba675SRob Herring MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 291*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 292*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 293*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 294*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 295*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 296*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 297*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 298*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10 299*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10 300*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10 301*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10 302*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10 303*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10 304*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10 305*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10 306*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10 307*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10 308*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10 309*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10 310*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10 311*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10 312*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10 313*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10 314*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10 315*724ba675SRob Herring >; 316*724ba675SRob Herring }; 317*724ba675SRob Herring 318*724ba675SRob Herring pinctrl_pwm1: pwm1grp { 319*724ba675SRob Herring fsl,pins = < 320*724ba675SRob Herring MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 321*724ba675SRob Herring >; 322*724ba675SRob Herring }; 323*724ba675SRob Herring 324*724ba675SRob Herring pinctrl_pwm2: pwm2grp { 325*724ba675SRob Herring fsl,pins = < 326*724ba675SRob Herring MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 327*724ba675SRob Herring >; 328*724ba675SRob Herring }; 329*724ba675SRob Herring 330*724ba675SRob Herring pinctrl_ts: tsgrp { 331*724ba675SRob Herring fsl,pins = < 332*724ba675SRob Herring MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 333*724ba675SRob Herring MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b0 334*724ba675SRob Herring >; 335*724ba675SRob Herring }; 336*724ba675SRob Herring 337*724ba675SRob Herring pinctrl_uart1: uart1grp { 338*724ba675SRob Herring fsl,pins = < 339*724ba675SRob Herring MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 340*724ba675SRob Herring MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 341*724ba675SRob Herring >; 342*724ba675SRob Herring }; 343*724ba675SRob Herring 344*724ba675SRob Herring pinctrl_uart2: uart2grp { 345*724ba675SRob Herring fsl,pins = < 346*724ba675SRob Herring MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 347*724ba675SRob Herring MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 348*724ba675SRob Herring MX6QDL_PAD_EIM_D28__UART2_CTS_B 0x1b0b1 349*724ba675SRob Herring MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x1b0b1 350*724ba675SRob Herring >; 351*724ba675SRob Herring }; 352*724ba675SRob Herring 353*724ba675SRob Herring pinctrl_usdhc2: usdhc2grp { 354*724ba675SRob Herring fsl,pins = < 355*724ba675SRob Herring MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 356*724ba675SRob Herring MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 357*724ba675SRob Herring MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 358*724ba675SRob Herring MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 359*724ba675SRob Herring MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 360*724ba675SRob Herring MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 361*724ba675SRob Herring >; 362*724ba675SRob Herring }; 363*724ba675SRob Herring 364*724ba675SRob Herring pinctrl_usdhc4: usdhc4grp { 365*724ba675SRob Herring fsl,pins = < 366*724ba675SRob Herring MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 367*724ba675SRob Herring MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 368*724ba675SRob Herring MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 369*724ba675SRob Herring MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 370*724ba675SRob Herring MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 371*724ba675SRob Herring MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 372*724ba675SRob Herring MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 373*724ba675SRob Herring MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 374*724ba675SRob Herring MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 375*724ba675SRob Herring MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 376*724ba675SRob Herring >; 377*724ba675SRob Herring }; 378*724ba675SRob Herring}; 379*724ba675SRob Herring 380*724ba675SRob Herring&pwm1 { 381*724ba675SRob Herring #pwm-cells = <2>; 382*724ba675SRob Herring pinctrl-names = "default"; 383*724ba675SRob Herring pinctrl-0 = <&pinctrl_pwm1>; 384*724ba675SRob Herring status = "okay"; 385*724ba675SRob Herring}; 386*724ba675SRob Herring 387*724ba675SRob Herring&pwm2 { 388*724ba675SRob Herring #pwm-cells = <2>; 389*724ba675SRob Herring pinctrl-names = "default"; 390*724ba675SRob Herring pinctrl-0 = <&pinctrl_pwm2>; 391*724ba675SRob Herring status = "okay"; 392*724ba675SRob Herring}; 393*724ba675SRob Herring 394*724ba675SRob Herring&ssi1 { 395*724ba675SRob Herring status = "okay"; 396*724ba675SRob Herring}; 397*724ba675SRob Herring 398*724ba675SRob Herring&uart1 { 399*724ba675SRob Herring pinctrl-names = "default"; 400*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart1>; 401*724ba675SRob Herring status = "okay"; 402*724ba675SRob Herring}; 403*724ba675SRob Herring 404*724ba675SRob Herring&uart2 { 405*724ba675SRob Herring pinctrl-names = "default"; 406*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart2>; 407*724ba675SRob Herring uart-has-rtscts; 408*724ba675SRob Herring}; 409*724ba675SRob Herring 410*724ba675SRob Herring&usbh1 { 411*724ba675SRob Herring status = "okay"; 412*724ba675SRob Herring}; 413*724ba675SRob Herring 414*724ba675SRob Herring&usdhc2 { 415*724ba675SRob Herring pinctrl-names = "default"; 416*724ba675SRob Herring pinctrl-0 = <&pinctrl_usdhc2>; 417*724ba675SRob Herring bus-width = <4>; 418*724ba675SRob Herring cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; 419*724ba675SRob Herring status = "okay"; 420*724ba675SRob Herring}; 421*724ba675SRob Herring 422*724ba675SRob Herring&usdhc4 { 423*724ba675SRob Herring pinctrl-names = "default"; 424*724ba675SRob Herring pinctrl-0 = <&pinctrl_usdhc4>; 425*724ba675SRob Herring bus-width = <8>; 426*724ba675SRob Herring non-removable; 427*724ba675SRob Herring no-1-8-v; 428*724ba675SRob Herring keep-power-in-suspend; 429*724ba675SRob Herring status = "okay"; 430*724ba675SRob Herring}; 431*724ba675SRob Herring 432*724ba675SRob Herring&wdog1 { 433*724ba675SRob Herring status = "okay"; 434*724ba675SRob Herring}; 435