1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0+ 2724ba675SRob Herring// 3724ba675SRob Herring// Copyright 2023 Linaro Ltd. 4724ba675SRob Herring 5724ba675SRob Herring/dts-v1/; 6724ba675SRob Herring 7724ba675SRob Herring#include "imx53.dtsi" 8724ba675SRob Herring 9724ba675SRob Herring/ { 10724ba675SRob Herring model = "StarterKit SK-iMX53 Board"; 11724ba675SRob Herring compatible = "starterkit,sk-imx53", "fsl,imx53"; 12724ba675SRob Herring 13724ba675SRob Herring aliases { 14724ba675SRob Herring /* 15724ba675SRob Herring * iMX RTC is not battery powered on this board. 16724ba675SRob Herring * Use the i2c RTC as rtc0. 17724ba675SRob Herring */ 18724ba675SRob Herring rtc0 = &rtc; 19724ba675SRob Herring rtc1 = &srtc; 20724ba675SRob Herring }; 21724ba675SRob Herring 22724ba675SRob Herring chosen { 23724ba675SRob Herring stdout-path = &uart1; 24724ba675SRob Herring }; 25724ba675SRob Herring 26724ba675SRob Herring memory@70000000 { 27724ba675SRob Herring device_type = "memory"; 28724ba675SRob Herring /* v2 had only 256 MB, v3 has 512 MB */ 29724ba675SRob Herring reg = <0x70000000 0x20000000>; 30724ba675SRob Herring }; 31724ba675SRob Herring 32724ba675SRob Herring reg_usb1_vbus: regulator-usb-vbus { 33724ba675SRob Herring compatible = "regulator-fixed"; 34724ba675SRob Herring regulator-name = "usb_vbus"; 35724ba675SRob Herring regulator-min-microvolt = <5000000>; 36724ba675SRob Herring regulator-max-microvolt = <5000000>; 37724ba675SRob Herring gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>; 38724ba675SRob Herring enable-active-high; 39724ba675SRob Herring }; 40724ba675SRob Herring 41724ba675SRob Herring reg_usb_otg_vbus: regulator-otg-vbus { 42724ba675SRob Herring compatible = "regulator-fixed"; 43724ba675SRob Herring regulator-name = "usb_vbus"; 44724ba675SRob Herring regulator-min-microvolt = <5000000>; 45724ba675SRob Herring regulator-max-microvolt = <5000000>; 46724ba675SRob Herring gpio = <&gpio2 24 GPIO_ACTIVE_HIGH>; 47724ba675SRob Herring enable-active-high; 48724ba675SRob Herring }; 49724ba675SRob Herring}; 50724ba675SRob Herring 51724ba675SRob Herring&audmux { 52724ba675SRob Herring pinctrl-names = "default"; 53724ba675SRob Herring pinctrl-0 = <&pinctrl_audmux>; 54724ba675SRob Herring status = "okay"; 55724ba675SRob Herring}; 56724ba675SRob Herring 57724ba675SRob Herring&can1 { 58724ba675SRob Herring pinctrl-names = "default"; 59724ba675SRob Herring pinctrl-0 = <&pinctrl_can1>; 60724ba675SRob Herring status = "okay"; 61724ba675SRob Herring}; 62724ba675SRob Herring 63*c486762fSDmitry Baryshkov&cpu0 { 64*c486762fSDmitry Baryshkov /* CPU rated to 800 MHz, not the default 1.2GHz. */ 65*c486762fSDmitry Baryshkov operating-points = < 66*c486762fSDmitry Baryshkov /* kHz uV */ 67*c486762fSDmitry Baryshkov 166666 850000 68*c486762fSDmitry Baryshkov 400000 900000 69*c486762fSDmitry Baryshkov 800000 1050000 70*c486762fSDmitry Baryshkov >; 71*c486762fSDmitry Baryshkov}; 72*c486762fSDmitry Baryshkov 73724ba675SRob Herring&ecspi1 { 74724ba675SRob Herring pinctrl-names = "default"; 75724ba675SRob Herring pinctrl-0 = <&pinctrl_ecspi1>; 76724ba675SRob Herring cs-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; 77724ba675SRob Herring status = "okay"; 78724ba675SRob Herring}; 79724ba675SRob Herring 80724ba675SRob Herring&ecspi2 { 81724ba675SRob Herring pinctrl-names = "default"; 82724ba675SRob Herring pinctrl-0 = <&pinctrl_ecspi2>; 83724ba675SRob Herring cs-gpios = <&gpio2 27 GPIO_ACTIVE_LOW>; 84724ba675SRob Herring status = "okay"; 85724ba675SRob Herring}; 86724ba675SRob Herring 87724ba675SRob Herring&esdhc1 { 88724ba675SRob Herring cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>; 89724ba675SRob Herring fsl,wp-controller; 90724ba675SRob Herring pinctrl-names = "default"; 91724ba675SRob Herring pinctrl-0 = <&pinctrl_esdhc1>; 92724ba675SRob Herring status = "okay"; 93724ba675SRob Herring}; 94724ba675SRob Herring 95724ba675SRob Herring&fec { 96724ba675SRob Herring pinctrl-names = "default"; 97724ba675SRob Herring pinctrl-0 = <&pinctrl_fec>; 98724ba675SRob Herring phy-mode = "rmii"; 99724ba675SRob Herring phy-handle = <&phy0>; 100724ba675SRob Herring mac-address = [000000000000]; /* placeholder; will be overwritten by bootloader */ 101724ba675SRob Herring status = "okay"; 102724ba675SRob Herring 103724ba675SRob Herring mdio { 104724ba675SRob Herring #address-cells = <1>; 105724ba675SRob Herring #size-cells = <0>; 106724ba675SRob Herring 107724ba675SRob Herring phy0: ethernet-phy@0 { 108724ba675SRob Herring reg = <0>; 109724ba675SRob Herring reset-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; 110724ba675SRob Herring }; 111724ba675SRob Herring }; 112724ba675SRob Herring}; 113724ba675SRob Herring 114724ba675SRob Herring&i2c1 { 115724ba675SRob Herring pinctrl-names = "default"; 116724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c1>; 117724ba675SRob Herring status = "okay"; 118724ba675SRob Herring}; 119724ba675SRob Herring 120724ba675SRob Herring&i2c2 { 121724ba675SRob Herring pinctrl-names = "default", "gpio"; 122724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c2>; 123724ba675SRob Herring pinctrl-1 = <&pinctrl_i2c2_gpio>; 124724ba675SRob Herring sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>; 125724ba675SRob Herring scl-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>; 126724ba675SRob Herring status = "okay"; 127724ba675SRob Herring 128724ba675SRob Herring tlv320aic23: codec@1a { 129724ba675SRob Herring compatible = "ti,tlv320aic23"; 130724ba675SRob Herring reg = <0x1a>; 131724ba675SRob Herring pinctrl-names = "default"; 132724ba675SRob Herring pinctrl-0 = <&pinctrl_codec>; 133724ba675SRob Herring #sound-dai-cells = <0>; 134724ba675SRob Herring }; 135724ba675SRob Herring 136724ba675SRob Herring rtc: rtc@68 { 137724ba675SRob Herring compatible = "dallas,ds1338"; 138724ba675SRob Herring reg = <0x68>; 139724ba675SRob Herring }; 140724ba675SRob Herring}; 141724ba675SRob Herring 142724ba675SRob Herring&iomuxc { 143724ba675SRob Herring pinctrl_audmux: audmuxgrp { 144724ba675SRob Herring fsl,pins = < 145724ba675SRob Herring MX53_PAD_SD2_DATA3__AUDMUX_AUD4_TXC 0x1e4 146724ba675SRob Herring MX53_PAD_SD2_DATA2__AUDMUX_AUD4_TXD 0x1e4 147724ba675SRob Herring MX53_PAD_SD2_DATA1__AUDMUX_AUD4_TXFS 0x1e4 148724ba675SRob Herring MX53_PAD_SD2_DATA0__AUDMUX_AUD4_RXD 0x1e4 149724ba675SRob Herring >; 150724ba675SRob Herring }; 151724ba675SRob Herring 152724ba675SRob Herring pinctrl_can1: can1grp { 153724ba675SRob Herring fsl,pins = < 154724ba675SRob Herring MX53_PAD_PATA_INTRQ__CAN1_TXCAN 0x1e4 155724ba675SRob Herring MX53_PAD_PATA_DIOR__CAN1_RXCAN 0x1e4 156724ba675SRob Herring >; 157724ba675SRob Herring }; 158724ba675SRob Herring 159724ba675SRob Herring pinctrl_codec: codecgrp { 160724ba675SRob Herring fsl,pins = < 161724ba675SRob Herring MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x1c4 162724ba675SRob Herring >; 163724ba675SRob Herring }; 164724ba675SRob Herring 165724ba675SRob Herring pinctrl_ecspi1: ecspi1grp { 166724ba675SRob Herring fsl,pins = < 167724ba675SRob Herring MX53_PAD_EIM_D16__ECSPI1_SCLK 0x1e4 168724ba675SRob Herring MX53_PAD_EIM_D17__ECSPI1_MISO 0x1e4 169724ba675SRob Herring MX53_PAD_EIM_D18__ECSPI1_MOSI 0x1e4 170724ba675SRob Herring >; 171724ba675SRob Herring }; 172724ba675SRob Herring 173724ba675SRob Herring pinctrl_ecspi2: ecspi2grp { 174724ba675SRob Herring fsl,pins = < 175724ba675SRob Herring MX53_PAD_CSI0_DAT9__ECSPI2_MOSI 0x1e4 176724ba675SRob Herring MX53_PAD_CSI0_DAT10__ECSPI2_MISO 0x1e4 177724ba675SRob Herring MX53_PAD_EIM_CS0__ECSPI2_SCLK 0x1e4 178724ba675SRob Herring >; 179724ba675SRob Herring }; 180724ba675SRob Herring 181724ba675SRob Herring pinctrl_esdhc1: esdhc1grp { 182724ba675SRob Herring fsl,pins = < 183724ba675SRob Herring MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5 184724ba675SRob Herring MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5 185724ba675SRob Herring MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5 186724ba675SRob Herring MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5 187724ba675SRob Herring MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5 188724ba675SRob Herring MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5 189724ba675SRob Herring MX53_PAD_EIM_DA14__GPIO3_14 0x1f0 190724ba675SRob Herring >; 191724ba675SRob Herring }; 192724ba675SRob Herring 193724ba675SRob Herring pinctrl_fec: fecgrp { 194724ba675SRob Herring fsl,pins = < 195724ba675SRob Herring MX53_PAD_FEC_MDC__FEC_MDC 0x1e4 196724ba675SRob Herring MX53_PAD_FEC_MDIO__FEC_MDIO 0x1e4 197724ba675SRob Herring MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x1e4 198724ba675SRob Herring MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x1e4 199724ba675SRob Herring MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x1e4 200724ba675SRob Herring MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x1e4 201724ba675SRob Herring MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x1e4 202724ba675SRob Herring MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x1c4 203724ba675SRob Herring MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x1e4 204724ba675SRob Herring MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x1e4 205724ba675SRob Herring MX53_PAD_GPIO_1__GPIO1_1 0x1c4 206724ba675SRob Herring >; 207724ba675SRob Herring }; 208724ba675SRob Herring 209724ba675SRob Herring pinctrl_i2c1: i2c1grp { 210724ba675SRob Herring fsl,pins = < 211724ba675SRob Herring MX53_PAD_EIM_D21__I2C1_SCL 0x400001e4 212724ba675SRob Herring MX53_PAD_EIM_D28__I2C1_SDA 0x400001e4 213724ba675SRob Herring >; 214724ba675SRob Herring }; 215724ba675SRob Herring 216724ba675SRob Herring pinctrl_i2c2: i2c2grp { 217724ba675SRob Herring fsl,pins = < 218724ba675SRob Herring MX53_PAD_KEY_ROW3__I2C2_SDA 0x400001e4 219724ba675SRob Herring MX53_PAD_EIM_EB2__I2C2_SCL 0x400001e4 220724ba675SRob Herring >; 221724ba675SRob Herring }; 222724ba675SRob Herring 223724ba675SRob Herring pinctrl_i2c2_gpio: i2c2gpiogrp { 224724ba675SRob Herring fsl,pins = < 225724ba675SRob Herring MX53_PAD_KEY_ROW3__GPIO4_13 0x1e4 226724ba675SRob Herring MX53_PAD_EIM_EB2__GPIO2_30 0x1e4 227724ba675SRob Herring >; 228724ba675SRob Herring }; 229724ba675SRob Herring 230724ba675SRob Herring pinctrl_nand: nandgrp { 231724ba675SRob Herring fsl,pins = < 232724ba675SRob Herring MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B 0x4 233724ba675SRob Herring MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B 0x4 234724ba675SRob Herring MX53_PAD_NANDF_CLE__EMI_NANDF_CLE 0x4 235724ba675SRob Herring MX53_PAD_NANDF_ALE__EMI_NANDF_ALE 0x4 236724ba675SRob Herring MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B 0xe0 237724ba675SRob Herring MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0 0xe0 238724ba675SRob Herring MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0 0x4 239724ba675SRob Herring MX53_PAD_NANDF_CS1__EMI_NANDF_CS_1 0x4 240724ba675SRob Herring MX53_PAD_NANDF_CS2__EMI_NANDF_CS_2 0x4 241724ba675SRob Herring MX53_PAD_NANDF_CS3__EMI_NANDF_CS_3 0x4 242724ba675SRob Herring MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 0xa4 243724ba675SRob Herring MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 0xa4 244724ba675SRob Herring MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 0xa4 245724ba675SRob Herring MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 0xa4 246724ba675SRob Herring MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 0xa4 247724ba675SRob Herring MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 0xa4 248724ba675SRob Herring MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 0xa4 249724ba675SRob Herring MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7 0xa4 250724ba675SRob Herring >; 251724ba675SRob Herring }; 252724ba675SRob Herring 253724ba675SRob Herring pinctrl_pwm1: pwm1grp { 254724ba675SRob Herring fsl,pins = < 255724ba675SRob Herring MX53_PAD_GPIO_9__PWM1_PWMO 0x5 256724ba675SRob Herring >; 257724ba675SRob Herring }; 258724ba675SRob Herring 259724ba675SRob Herring pinctrl_uart1: uart1grp { 260724ba675SRob Herring fsl,pins = < 261724ba675SRob Herring MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4 262724ba675SRob Herring MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4 263724ba675SRob Herring >; 264724ba675SRob Herring }; 265724ba675SRob Herring 266724ba675SRob Herring pinctrl_uart3: uart3grp { 267724ba675SRob Herring fsl,pins = < 268724ba675SRob Herring MX53_PAD_EIM_D24__UART3_TXD_MUX 0x1e4 269724ba675SRob Herring MX53_PAD_EIM_D25__UART3_RXD_MUX 0x1e4 270724ba675SRob Herring >; 271724ba675SRob Herring }; 272724ba675SRob Herring 273724ba675SRob Herring pinctrl_uart4: uart4grp { 274724ba675SRob Herring fsl,pins = < 275724ba675SRob Herring MX53_PAD_KEY_COL0__UART4_TXD_MUX 0x1e4 276724ba675SRob Herring MX53_PAD_KEY_ROW0__UART4_RXD_MUX 0x1e4 277724ba675SRob Herring >; 278724ba675SRob Herring }; 279724ba675SRob Herring}; 280724ba675SRob Herring 281724ba675SRob Herring&nfc { 282724ba675SRob Herring pinctrl-names = "default"; 283724ba675SRob Herring pinctrl-0 = <&pinctrl_nand>; 284724ba675SRob Herring nand-bus-width = <8>; 285724ba675SRob Herring status = "okay"; 286724ba675SRob Herring 287724ba675SRob Herring partitions { 288724ba675SRob Herring compatible = "fixed-partitions"; 289724ba675SRob Herring #address-cells = <1>; 290724ba675SRob Herring #size-cells = <1>; 291724ba675SRob Herring 292724ba675SRob Herring partition@0 { 293724ba675SRob Herring label = "boot"; 294724ba675SRob Herring reg = <0x00000000 0x00100000>; 295724ba675SRob Herring read-only; 296724ba675SRob Herring }; 297724ba675SRob Herring 298724ba675SRob Herring partition@100000 { 299724ba675SRob Herring label = "u-boot"; 300724ba675SRob Herring reg = <0x00100000 0x00100000>; 301724ba675SRob Herring read-only; 302724ba675SRob Herring }; 303724ba675SRob Herring 304724ba675SRob Herring partition@200000 { 305724ba675SRob Herring label = "u-boot-env"; 306724ba675SRob Herring reg = <0x00200000 0x00100000>; 307724ba675SRob Herring read-only; 308724ba675SRob Herring }; 309724ba675SRob Herring 310724ba675SRob Herring partition@1000000 { 311724ba675SRob Herring label = "kernel-safe"; 312724ba675SRob Herring reg = <0x01000000 0x00a00000>; 313724ba675SRob Herring read-only; 314724ba675SRob Herring }; 315724ba675SRob Herring 316724ba675SRob Herring partition@1a00000 { 317724ba675SRob Herring label = "kernel"; 318724ba675SRob Herring reg = <0x01a00000 0x005e0000>; 319724ba675SRob Herring }; 320724ba675SRob Herring 321724ba675SRob Herring partition@2000000 { 322724ba675SRob Herring label = "ubifs"; 323724ba675SRob Herring reg = <0x02000000 0x0e000000>; 324724ba675SRob Herring }; 325724ba675SRob Herring }; 326724ba675SRob Herring}; 327724ba675SRob Herring 328724ba675SRob Herring&pwm1 { 329724ba675SRob Herring pinctrl-names = "default"; 330724ba675SRob Herring pinctrl-0 = <&pinctrl_pwm1>; 331724ba675SRob Herring status = "okay"; 332724ba675SRob Herring}; 333724ba675SRob Herring 334724ba675SRob Herring&sata { 335724ba675SRob Herring status = "okay"; 336724ba675SRob Herring}; 337724ba675SRob Herring 338724ba675SRob Herring&uart1 { 339724ba675SRob Herring pinctrl-names = "default"; 340724ba675SRob Herring pinctrl-0 = <&pinctrl_uart1>; 341724ba675SRob Herring status = "okay"; 342724ba675SRob Herring}; 343724ba675SRob Herring 344724ba675SRob Herring&uart3 { 345724ba675SRob Herring pinctrl-names = "default"; 346724ba675SRob Herring pinctrl-0 = <&pinctrl_uart3>; 347724ba675SRob Herring status = "okay"; 348724ba675SRob Herring}; 349724ba675SRob Herring 350724ba675SRob Herring&uart4 { 351724ba675SRob Herring pinctrl-names = "default"; 352724ba675SRob Herring pinctrl-0 = <&pinctrl_uart4>; 353724ba675SRob Herring status = "okay"; 354724ba675SRob Herring}; 355724ba675SRob Herring 356724ba675SRob Herring&usbh1 { 357724ba675SRob Herring vbus-supply = <®_usb1_vbus>; 358724ba675SRob Herring phy_type = "utmi"; 359724ba675SRob Herring disable-over-current; 360724ba675SRob Herring status = "okay"; 361724ba675SRob Herring}; 362724ba675SRob Herring 363724ba675SRob Herring&usbotg { 364724ba675SRob Herring dr_mode = "peripheral"; 365724ba675SRob Herring disable-over-current; 366724ba675SRob Herring status = "okay"; 367724ba675SRob Herring}; 368