1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only 2724ba675SRob Herring/* 3724ba675SRob Herring * linux/arch/arm/boot/nspire-cx.dts 4724ba675SRob Herring * 5724ba675SRob Herring * Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au> 6724ba675SRob Herring */ 7724ba675SRob Herring/dts-v1/; 8724ba675SRob Herring 9724ba675SRob Herring/include/ "nspire.dtsi" 10724ba675SRob Herring 11724ba675SRob Herring&lcd { 12724ba675SRob Herring port { 13724ba675SRob Herring clcd_pads: endpoint { 14724ba675SRob Herring remote-endpoint = <&panel_in>; 15724ba675SRob Herring }; 16724ba675SRob Herring }; 17724ba675SRob Herring}; 18724ba675SRob Herring 19724ba675SRob Herring&fast_timer { 20724ba675SRob Herring /* compatible = "arm,sp804", "arm,primecell"; */ 21724ba675SRob Herring}; 22724ba675SRob Herring 23724ba675SRob Herring&uart { 24724ba675SRob Herring compatible = "arm,pl011", "arm,primecell"; 25724ba675SRob Herring 26724ba675SRob Herring clocks = <&uart_clk>, <&apb_pclk>; 27*cbc2a1e5SAndrew Davis clock-names = "uartclk", "apb_pclk"; 28724ba675SRob Herring}; 29724ba675SRob Herring 30724ba675SRob Herring&timer0 { 31724ba675SRob Herring compatible = "arm,sp804", "arm,primecell"; 32724ba675SRob Herring}; 33724ba675SRob Herring 34724ba675SRob Herring&timer1 { 35724ba675SRob Herring compatible = "arm,sp804", "arm,primecell"; 36724ba675SRob Herring}; 37724ba675SRob Herring 38724ba675SRob Herring&base_clk { 39724ba675SRob Herring compatible = "lsi,nspire-cx-clock"; 40724ba675SRob Herring}; 41724ba675SRob Herring 42724ba675SRob Herring&ahb_clk { 43724ba675SRob Herring compatible = "lsi,nspire-cx-ahb-divider"; 44724ba675SRob Herring}; 45724ba675SRob Herring 46724ba675SRob Herring&keypad { 47724ba675SRob Herring linux,keymap = < 48724ba675SRob Herring 0x0000001c 0x0001001c 0x00040039 49724ba675SRob Herring 0x0005002c 0x00060015 0x0007000b 50724ba675SRob Herring 0x0008000f 0x0100002d 0x01010011 51724ba675SRob Herring 0x0102002f 0x01030004 0x01040016 52724ba675SRob Herring 0x01050014 0x0106001f 0x01070002 53724ba675SRob Herring 0x010a006a 0x02000013 0x02010010 54724ba675SRob Herring 0x02020019 0x02030007 0x02040018 55724ba675SRob Herring 0x02050031 0x02060032 0x02070005 56724ba675SRob Herring 0x02080028 0x0209006c 0x03000026 57724ba675SRob Herring 0x03010025 0x03020024 0x0303000a 58724ba675SRob Herring 0x03040017 0x03050023 0x03060022 59724ba675SRob Herring 0x03070008 0x03080035 0x03090069 60724ba675SRob Herring 0x04000021 0x04010012 0x04020020 61724ba675SRob Herring 0x0404002e 0x04050030 0x0406001e 62724ba675SRob Herring 0x0407000d 0x04080037 0x04090067 63724ba675SRob Herring 0x05010038 0x0502000c 0x0503001b 64724ba675SRob Herring 0x05040034 0x0505001a 0x05060006 65724ba675SRob Herring 0x05080027 0x0509000e 0x050a006f 66724ba675SRob Herring 0x0600002b 0x0602004e 0x06030068 67724ba675SRob Herring 0x06040003 0x0605006d 0x06060009 68724ba675SRob Herring 0x06070001 0x0609000f 0x0708002a 69724ba675SRob Herring 0x0709001d 0x070a0033 >; 70724ba675SRob Herring}; 71724ba675SRob Herring 72724ba675SRob Herring&vbus_reg { 73724ba675SRob Herring gpio = <&gpio 2 0>; 74724ba675SRob Herring}; 75724ba675SRob Herring 76724ba675SRob Herring/ { 77724ba675SRob Herring model = "TI-NSPIRE CX"; 78724ba675SRob Herring compatible = "ti,nspire-cx"; 79724ba675SRob Herring 80724ba675SRob Herring memory { 81724ba675SRob Herring device_type = "memory"; 82724ba675SRob Herring reg = <0x10000000 0x4000000>; /* 64 MB */ 83724ba675SRob Herring }; 84724ba675SRob Herring 85724ba675SRob Herring uart_clk: uart_clk { 86724ba675SRob Herring #clock-cells = <0>; 87724ba675SRob Herring compatible = "fixed-clock"; 88724ba675SRob Herring clock-frequency = <12000000>; 89724ba675SRob Herring }; 90724ba675SRob Herring 91724ba675SRob Herring ahb { 92724ba675SRob Herring #address-cells = <1>; 93724ba675SRob Herring #size-cells = <1>; 94724ba675SRob Herring 95724ba675SRob Herring intc: interrupt-controller@dc000000 { 96724ba675SRob Herring compatible = "arm,pl190-vic"; 97724ba675SRob Herring interrupt-controller; 98724ba675SRob Herring reg = <0xdc000000 0x1000>; 99724ba675SRob Herring #interrupt-cells = <1>; 100724ba675SRob Herring }; 101724ba675SRob Herring 102724ba675SRob Herring apb@90000000 { 103724ba675SRob Herring #address-cells = <1>; 104724ba675SRob Herring #size-cells = <1>; 105724ba675SRob Herring 106724ba675SRob Herring i2c@90050000 { 107724ba675SRob Herring compatible = "snps,designware-i2c"; 108724ba675SRob Herring reg = <0x90050000 0x1000>; 109724ba675SRob Herring interrupts = <20>; 110724ba675SRob Herring }; 111724ba675SRob Herring }; 112724ba675SRob Herring }; 113724ba675SRob Herring 114724ba675SRob Herring panel { 115724ba675SRob Herring compatible = "ti,nspire-cx-lcd-panel"; 116724ba675SRob Herring port { 117724ba675SRob Herring panel_in: endpoint { 118724ba675SRob Herring remote-endpoint = <&clcd_pads>; 119724ba675SRob Herring }; 120724ba675SRob Herring }; 121724ba675SRob Herring }; 122724ba675SRob Herring chosen { 123724ba675SRob Herring bootargs = "debug earlyprintk console=tty0 console=ttyAMA0,115200n8 root=/dev/ram0"; 124724ba675SRob Herring }; 125724ba675SRob Herring}; 126