xref: /openbmc/linux/arch/arm/boot/dts/nspire/nspire-cx.dts (revision a9ab8b23080875c002b280f2e6fcb36c14171b45)
1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only
2724ba675SRob Herring/*
3724ba675SRob Herring *  linux/arch/arm/boot/nspire-cx.dts
4724ba675SRob Herring *
5724ba675SRob Herring *  Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
6724ba675SRob Herring */
7724ba675SRob Herring/dts-v1/;
8724ba675SRob Herring
9*a9ab8b23SAndrew Davis#include <dt-bindings/input/input.h>
10*a9ab8b23SAndrew Davis
11724ba675SRob Herring/include/ "nspire.dtsi"
12724ba675SRob Herring
13724ba675SRob Herring&lcd {
14724ba675SRob Herring	port {
15724ba675SRob Herring		clcd_pads: endpoint {
16724ba675SRob Herring			remote-endpoint = <&panel_in>;
17724ba675SRob Herring		};
18724ba675SRob Herring	};
19724ba675SRob Herring};
20724ba675SRob Herring
21724ba675SRob Herring&fast_timer {
22724ba675SRob Herring	/* compatible = "arm,sp804", "arm,primecell"; */
23724ba675SRob Herring};
24724ba675SRob Herring
25724ba675SRob Herring&uart {
26724ba675SRob Herring	compatible = "arm,pl011", "arm,primecell";
27724ba675SRob Herring
28724ba675SRob Herring	clocks = <&uart_clk>, <&apb_pclk>;
29cbc2a1e5SAndrew Davis	clock-names = "uartclk", "apb_pclk";
30724ba675SRob Herring};
31724ba675SRob Herring
32724ba675SRob Herring&timer0 {
33724ba675SRob Herring	compatible = "arm,sp804", "arm,primecell";
34724ba675SRob Herring};
35724ba675SRob Herring
36724ba675SRob Herring&timer1 {
37724ba675SRob Herring	compatible = "arm,sp804", "arm,primecell";
38724ba675SRob Herring};
39724ba675SRob Herring
40724ba675SRob Herring&base_clk {
41724ba675SRob Herring	compatible = "lsi,nspire-cx-clock";
42724ba675SRob Herring};
43724ba675SRob Herring
44724ba675SRob Herring&ahb_clk {
45724ba675SRob Herring	compatible = "lsi,nspire-cx-ahb-divider";
46724ba675SRob Herring};
47724ba675SRob Herring
48724ba675SRob Herring&keypad {
49724ba675SRob Herring	linux,keymap = <
50*a9ab8b23SAndrew Davis		MATRIX_KEY(0,  0, 0x1c)
51*a9ab8b23SAndrew Davis		MATRIX_KEY(0,  1, 0x1c)
52*a9ab8b23SAndrew Davis		MATRIX_KEY(0,  4, 0x39)
53*a9ab8b23SAndrew Davis		MATRIX_KEY(0,  5, 0x2c)
54*a9ab8b23SAndrew Davis		MATRIX_KEY(0,  6, 0x15)
55*a9ab8b23SAndrew Davis		MATRIX_KEY(0,  7, 0x0b)
56*a9ab8b23SAndrew Davis		MATRIX_KEY(0,  8, 0x0f)
57*a9ab8b23SAndrew Davis		MATRIX_KEY(1,  0, 0x2d)
58*a9ab8b23SAndrew Davis		MATRIX_KEY(1,  1, 0x11)
59*a9ab8b23SAndrew Davis		MATRIX_KEY(1,  2, 0x2f)
60*a9ab8b23SAndrew Davis		MATRIX_KEY(1,  3, 0x04)
61*a9ab8b23SAndrew Davis		MATRIX_KEY(1,  4, 0x16)
62*a9ab8b23SAndrew Davis		MATRIX_KEY(1,  5, 0x14)
63*a9ab8b23SAndrew Davis		MATRIX_KEY(1,  6, 0x1f)
64*a9ab8b23SAndrew Davis		MATRIX_KEY(1,  7, 0x02)
65*a9ab8b23SAndrew Davis		MATRIX_KEY(1, 10, 0x6a)
66*a9ab8b23SAndrew Davis		MATRIX_KEY(2,  0, 0x13)
67*a9ab8b23SAndrew Davis		MATRIX_KEY(2,  1, 0x10)
68*a9ab8b23SAndrew Davis		MATRIX_KEY(2,  2, 0x19)
69*a9ab8b23SAndrew Davis		MATRIX_KEY(2,  3, 0x07)
70*a9ab8b23SAndrew Davis		MATRIX_KEY(2,  4, 0x18)
71*a9ab8b23SAndrew Davis		MATRIX_KEY(2,  5, 0x31)
72*a9ab8b23SAndrew Davis		MATRIX_KEY(2,  6, 0x32)
73*a9ab8b23SAndrew Davis		MATRIX_KEY(2,  7, 0x05)
74*a9ab8b23SAndrew Davis		MATRIX_KEY(2,  8, 0x28)
75*a9ab8b23SAndrew Davis		MATRIX_KEY(2,  9, 0x6c)
76*a9ab8b23SAndrew Davis		MATRIX_KEY(3,  0, 0x26)
77*a9ab8b23SAndrew Davis		MATRIX_KEY(3,  1, 0x25)
78*a9ab8b23SAndrew Davis		MATRIX_KEY(3,  2, 0x24)
79*a9ab8b23SAndrew Davis		MATRIX_KEY(3,  3, 0x0a)
80*a9ab8b23SAndrew Davis		MATRIX_KEY(3,  4, 0x17)
81*a9ab8b23SAndrew Davis		MATRIX_KEY(3,  5, 0x23)
82*a9ab8b23SAndrew Davis		MATRIX_KEY(3,  6, 0x22)
83*a9ab8b23SAndrew Davis		MATRIX_KEY(3,  7, 0x08)
84*a9ab8b23SAndrew Davis		MATRIX_KEY(3,  8, 0x35)
85*a9ab8b23SAndrew Davis		MATRIX_KEY(3,  9, 0x69)
86*a9ab8b23SAndrew Davis		MATRIX_KEY(4,  0, 0x21)
87*a9ab8b23SAndrew Davis		MATRIX_KEY(4,  1, 0x12)
88*a9ab8b23SAndrew Davis		MATRIX_KEY(4,  2, 0x20)
89*a9ab8b23SAndrew Davis		MATRIX_KEY(4,  4, 0x2e)
90*a9ab8b23SAndrew Davis		MATRIX_KEY(4,  5, 0x30)
91*a9ab8b23SAndrew Davis		MATRIX_KEY(4,  6, 0x1e)
92*a9ab8b23SAndrew Davis		MATRIX_KEY(4,  7, 0x0d)
93*a9ab8b23SAndrew Davis		MATRIX_KEY(4,  8, 0x37)
94*a9ab8b23SAndrew Davis		MATRIX_KEY(4,  9, 0x67)
95*a9ab8b23SAndrew Davis		MATRIX_KEY(5,  1, 0x38)
96*a9ab8b23SAndrew Davis		MATRIX_KEY(5,  2, 0x0c)
97*a9ab8b23SAndrew Davis		MATRIX_KEY(5,  3, 0x1b)
98*a9ab8b23SAndrew Davis		MATRIX_KEY(5,  4, 0x34)
99*a9ab8b23SAndrew Davis		MATRIX_KEY(5,  5, 0x1a)
100*a9ab8b23SAndrew Davis		MATRIX_KEY(5,  6, 0x06)
101*a9ab8b23SAndrew Davis		MATRIX_KEY(5,  8, 0x27)
102*a9ab8b23SAndrew Davis		MATRIX_KEY(5,  9, 0x0e)
103*a9ab8b23SAndrew Davis		MATRIX_KEY(5, 10, 0x6f)
104*a9ab8b23SAndrew Davis		MATRIX_KEY(6,  0, 0x2b)
105*a9ab8b23SAndrew Davis		MATRIX_KEY(6,  2, 0x4e)
106*a9ab8b23SAndrew Davis		MATRIX_KEY(6,  3, 0x68)
107*a9ab8b23SAndrew Davis		MATRIX_KEY(6,  4, 0x03)
108*a9ab8b23SAndrew Davis		MATRIX_KEY(6,  5, 0x6d)
109*a9ab8b23SAndrew Davis		MATRIX_KEY(6,  6, 0x09)
110*a9ab8b23SAndrew Davis		MATRIX_KEY(6,  7, 0x01)
111*a9ab8b23SAndrew Davis		MATRIX_KEY(6,  9, 0x0f)
112*a9ab8b23SAndrew Davis		MATRIX_KEY(7,  8, 0x2a)
113*a9ab8b23SAndrew Davis		MATRIX_KEY(7,  9, 0x1d)
114*a9ab8b23SAndrew Davis		MATRIX_KEY(7, 10, 0x33)
115*a9ab8b23SAndrew Davis	>;
116724ba675SRob Herring};
117724ba675SRob Herring
118724ba675SRob Herring&vbus_reg {
119724ba675SRob Herring	gpio = <&gpio 2 0>;
120724ba675SRob Herring};
121724ba675SRob Herring
122724ba675SRob Herring/ {
123724ba675SRob Herring	model = "TI-NSPIRE CX";
124724ba675SRob Herring	compatible = "ti,nspire-cx";
125724ba675SRob Herring
126724ba675SRob Herring	memory {
127724ba675SRob Herring		device_type = "memory";
128724ba675SRob Herring		reg = <0x10000000 0x4000000>; /* 64 MB */
129724ba675SRob Herring	};
130724ba675SRob Herring
131724ba675SRob Herring	uart_clk: uart_clk {
132724ba675SRob Herring		#clock-cells = <0>;
133724ba675SRob Herring		compatible = "fixed-clock";
134724ba675SRob Herring		clock-frequency = <12000000>;
135724ba675SRob Herring	};
136724ba675SRob Herring
137724ba675SRob Herring	ahb {
138724ba675SRob Herring		#address-cells = <1>;
139724ba675SRob Herring		#size-cells = <1>;
140724ba675SRob Herring
141724ba675SRob Herring		intc: interrupt-controller@dc000000 {
142724ba675SRob Herring			compatible = "arm,pl190-vic";
143724ba675SRob Herring			interrupt-controller;
144724ba675SRob Herring			reg = <0xdc000000 0x1000>;
145724ba675SRob Herring			#interrupt-cells = <1>;
146724ba675SRob Herring		};
147724ba675SRob Herring
148724ba675SRob Herring		apb@90000000 {
149724ba675SRob Herring			#address-cells = <1>;
150724ba675SRob Herring			#size-cells = <1>;
151724ba675SRob Herring
152724ba675SRob Herring			i2c@90050000 {
153724ba675SRob Herring				compatible = "snps,designware-i2c";
154724ba675SRob Herring				reg = <0x90050000 0x1000>;
155724ba675SRob Herring				interrupts = <20>;
156724ba675SRob Herring			};
157724ba675SRob Herring		};
158724ba675SRob Herring	};
159724ba675SRob Herring
160724ba675SRob Herring	panel {
161724ba675SRob Herring		compatible = "ti,nspire-cx-lcd-panel";
162724ba675SRob Herring		port {
163724ba675SRob Herring			panel_in: endpoint {
164724ba675SRob Herring				remote-endpoint = <&clcd_pads>;
165724ba675SRob Herring			};
166724ba675SRob Herring		};
167724ba675SRob Herring	};
168724ba675SRob Herring	chosen {
169724ba675SRob Herring		bootargs = "debug earlyprintk console=tty0 console=ttyAMA0,115200n8 root=/dev/ram0";
170724ba675SRob Herring	};
171724ba675SRob Herring};
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