1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only 2*724ba675SRob Herring// Copyright (C) 2016 Jamie Lentin <jm@lentin.co.uk> 3*724ba675SRob Herring 4*724ba675SRob Herring#include "orion5x.dtsi" 5*724ba675SRob Herring 6*724ba675SRob Herring/ { 7*724ba675SRob Herring compatible = "marvell,orion5x-88f5181", "marvell,orion5x"; 8*724ba675SRob Herring 9*724ba675SRob Herring soc { 10*724ba675SRob Herring compatible = "marvell,orion5x-88f5181-mbus", "simple-bus"; 11*724ba675SRob Herring 12*724ba675SRob Herring internal-regs { 13*724ba675SRob Herring pinctrl: pinctrl@10000 { 14*724ba675SRob Herring compatible = "marvell,88f5181-pinctrl"; 15*724ba675SRob Herring reg = <0x10000 0x8>, <0x10050 0x4>; 16*724ba675SRob Herring }; 17*724ba675SRob Herring 18*724ba675SRob Herring core_clk: core-clocks@10030 { 19*724ba675SRob Herring compatible = "marvell,mv88f5181-core-clock"; 20*724ba675SRob Herring reg = <0x10010 0x4>; 21*724ba675SRob Herring #clock-cells = <1>; 22*724ba675SRob Herring }; 23*724ba675SRob Herring 24*724ba675SRob Herring mbusc: mbus-controller@20000 { 25*724ba675SRob Herring compatible = "marvell,mbus-controller"; 26*724ba675SRob Herring reg = <0x20000 0x100>, <0x1500 0x20>; 27*724ba675SRob Herring }; 28*724ba675SRob Herring }; 29*724ba675SRob Herring }; 30*724ba675SRob Herring}; 31*724ba675SRob Herring 32*724ba675SRob Herring&pinctrl { 33*724ba675SRob Herring pmx_ge: pmx-ge { 34*724ba675SRob Herring marvell,pins = "mpp8", "mpp9", "mpp10", "mpp11", 35*724ba675SRob Herring "mpp12", "mpp13", "mpp14", "mpp15", 36*724ba675SRob Herring "mpp16", "mpp17", "mpp18", "mpp19"; 37*724ba675SRob Herring marvell,function = "ge"; 38*724ba675SRob Herring }; 39*724ba675SRob Herring}; 40*724ba675SRob Herring 41*724ba675SRob Herringð { 42*724ba675SRob Herring pinctrl-0 = <&pmx_ge>; 43*724ba675SRob Herring pinctrl-names = "default"; 44*724ba675SRob Herring}; 45