1*724ba675SRob Herring// SPDX-License-Identifier: ISC 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Device Tree file for the Intel IXDP465 Control Plane processor reference 4*724ba675SRob Herring * design, codename "BMP". 5*724ba675SRob Herring */ 6*724ba675SRob Herring 7*724ba675SRob Herring/dts-v1/; 8*724ba675SRob Herring 9*724ba675SRob Herring#include "intel-ixp45x-ixp46x.dtsi" 10*724ba675SRob Herring#include "intel-ixp4xx-reference-design.dtsi" 11*724ba675SRob Herring#include <dt-bindings/input/input.h> 12*724ba675SRob Herring 13*724ba675SRob Herring/ { 14*724ba675SRob Herring model = "Intel IXDP465 BMP Reference Design"; 15*724ba675SRob Herring compatible = "intel,ixdp465", "intel,ixp46x"; 16*724ba675SRob Herring #address-cells = <1>; 17*724ba675SRob Herring #size-cells = <1>; 18*724ba675SRob Herring 19*724ba675SRob Herring soc { 20*724ba675SRob Herring bus@c4000000 { 21*724ba675SRob Herring flash@0,0 { 22*724ba675SRob Herring compatible = "intel,ixp4xx-flash", "cfi-flash"; 23*724ba675SRob Herring bank-width = <2>; 24*724ba675SRob Herring /* Enable writes on the expansion bus */ 25*724ba675SRob Herring intel,ixp4xx-eb-write-enable = <1>; 26*724ba675SRob Herring /* 32 MB of Flash mapped in at CS0 and CS1 */ 27*724ba675SRob Herring reg = <0 0x00000000 0x2000000>; 28*724ba675SRob Herring 29*724ba675SRob Herring partitions { 30*724ba675SRob Herring compatible = "redboot-fis"; 31*724ba675SRob Herring /* Eraseblock at 0x1fe0000 */ 32*724ba675SRob Herring fis-index-block = <0xff>; 33*724ba675SRob Herring }; 34*724ba675SRob Herring }; 35*724ba675SRob Herring }; 36*724ba675SRob Herring /* TODO: configure ethernet etc */ 37*724ba675SRob Herring }; 38*724ba675SRob Herring}; 39