1*b2441318SGreg Kroah-Hartman/* SPDX-License-Identifier: GPL-2.0 */ 21da177e4SLinus Torvalds/* 31da177e4SLinus Torvalds * linux/arch/arm/boot/compressed/head-xscale.S 41da177e4SLinus Torvalds * 51da177e4SLinus Torvalds * XScale specific tweaks. This is merged into head.S by the linker. 61da177e4SLinus Torvalds * 71da177e4SLinus Torvalds */ 81da177e4SLinus Torvalds 91da177e4SLinus Torvalds#include <linux/linkage.h> 101da177e4SLinus Torvalds 111da177e4SLinus Torvalds .section ".start", "ax" 121da177e4SLinus Torvalds 131da177e4SLinus Torvalds__XScale_start: 141da177e4SLinus Torvalds 151da177e4SLinus Torvalds @ Preserve r8/r7 i.e. kernel entry values 161da177e4SLinus Torvalds 171da177e4SLinus Torvalds @ Data cache might be active. 181da177e4SLinus Torvalds @ Be sure to flush kernel binary out of the cache, 191da177e4SLinus Torvalds @ whatever state it is, before it is turned off. 201da177e4SLinus Torvalds @ This is done by fetching through currently executed 211da177e4SLinus Torvalds @ memory to be sure we hit the same cache. 221da177e4SLinus Torvalds bic r2, pc, #0x1f 231da177e4SLinus Torvalds add r3, r2, #0x10000 @ 64 kb is quite enough... 241da177e4SLinus Torvalds1: ldr r0, [r2], #32 251da177e4SLinus Torvalds teq r2, r3 261da177e4SLinus Torvalds bne 1b 271da177e4SLinus Torvalds mcr p15, 0, r0, c7, c10, 4 @ drain WB 281da177e4SLinus Torvalds mcr p15, 0, r0, c7, c7, 0 @ flush I & D caches 291da177e4SLinus Torvalds 301da177e4SLinus Torvalds @ disabling MMU and caches 311da177e4SLinus Torvalds mrc p15, 0, r0, c1, c0, 0 @ read control reg 321da177e4SLinus Torvalds bic r0, r0, #0x05 @ clear DC, MMU 331da177e4SLinus Torvalds bic r0, r0, #0x1000 @ clear Icache 341da177e4SLinus Torvalds mcr p15, 0, r0, c1, c0, 0 351da177e4SLinus Torvalds 36