1b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0 2f8c07de6SHyok S. Choi# 3f8c07de6SHyok S. Choi# Kconfig for uClinux(non-paged MM) depend configurations 4f8c07de6SHyok S. Choi# Hyok S. Choi <hyok.choi@samsung.com> 5f8c07de6SHyok S. Choi# 6f8c07de6SHyok S. Choi 7f8c07de6SHyok S. Choiconfig SET_MEM_PARAM 8f8c07de6SHyok S. Choi bool "Set flash/sdram size and base addr" 9f8c07de6SHyok S. Choi help 10f8c07de6SHyok S. Choi Say Y to manually set the base addresses and sizes. 11f8c07de6SHyok S. Choi otherwise, the default values are assigned. 12f8c07de6SHyok S. Choi 13f8c07de6SHyok S. Choiconfig DRAM_BASE 14f8c07de6SHyok S. Choi hex '(S)DRAM Base Address' if SET_MEM_PARAM 15f8c07de6SHyok S. Choi default 0x00800000 16f8c07de6SHyok S. Choi 17f8c07de6SHyok S. Choiconfig DRAM_SIZE 18f8c07de6SHyok S. Choi hex '(S)DRAM SIZE' if SET_MEM_PARAM 19f8c07de6SHyok S. Choi default 0x00800000 20f8c07de6SHyok S. Choi 21f8c07de6SHyok S. Choiconfig FLASH_MEM_BASE 22f8c07de6SHyok S. Choi hex 'FLASH Base Address' if SET_MEM_PARAM 23*49e30bd0SVladimir Murzin depends on CPU_ARM740T || CPU_ARM946E || CPU_ARM940T 24f8c07de6SHyok S. Choi default 0x00400000 25f8c07de6SHyok S. Choi 26f8c07de6SHyok S. Choiconfig FLASH_SIZE 27f8c07de6SHyok S. Choi hex 'FLASH Size' if SET_MEM_PARAM 28*49e30bd0SVladimir Murzin depends on CPU_ARM740T || CPU_ARM946E || CPU_ARM940T 29f8c07de6SHyok S. Choi default 0x00400000 30f8c07de6SHyok S. Choi 31f12d0d7cSHyok S. Choiconfig PROCESSOR_ID 327a8be08bSGreg Ungerer hex 'Hard wire the processor ID' 33f12d0d7cSHyok S. Choi default 0x00007700 344477ca45SUwe Kleine-König depends on !(CPU_CP15 || CPU_V7M) 35f12d0d7cSHyok S. Choi help 36f12d0d7cSHyok S. Choi If processor has no CP15 register, this processor ID is 37f12d0d7cSHyok S. Choi used instead of the auto-probing which utilizes the register. 38f12d0d7cSHyok S. Choi 39c760fc19SHyok S. Choiconfig REMAP_VECTORS_TO_RAM 408a792e9aSAfzal Mohammed bool 'Install vectors to the beginning of RAM' 41c760fc19SHyok S. Choi help 42c760fc19SHyok S. Choi The kernel needs to change the hardware exception vectors. 43c760fc19SHyok S. Choi In nommu mode, the hardware exception vectors are normally 44c760fc19SHyok S. Choi placed at address 0x00000000. However, this region may be 45c760fc19SHyok S. Choi occupied by read-only memory depending on H/W design. 46c760fc19SHyok S. Choi 47c760fc19SHyok S. Choi If the region contains read-write memory, say 'n' here. 48c760fc19SHyok S. Choi 49c760fc19SHyok S. Choi If your CPU provides a remap facility which allows the exception 50c760fc19SHyok S. Choi vectors to be mapped to writable memory, say 'n' here. 51c760fc19SHyok S. Choi 52c760fc19SHyok S. Choi Otherwise, say 'y' here. In this case, the kernel will require 53c760fc19SHyok S. Choi external support to redirect the hardware exception vectors to 54c760fc19SHyok S. Choi the writable versions located at DRAM_BASE. 55801bb21cSJonathan Austin 56801bb21cSJonathan Austinconfig ARM_MPU 57801bb21cSJonathan Austin bool 'Use the ARM v7 PMSA Compliant MPU' 5821621830SVladimir Murzin depends on CPU_V7 || CPU_V7M 599fcb01a9SVladimir Murzin default y if CPU_V7 60801bb21cSJonathan Austin help 61801bb21cSJonathan Austin Some ARM systems without an MMU have instead a Memory Protection 62801bb21cSJonathan Austin Unit (MPU) that defines the type and permissions for regions of 63801bb21cSJonathan Austin memory. 64801bb21cSJonathan Austin 65801bb21cSJonathan Austin If your CPU has an MPU then you should choose 'y' here unless you 66801bb21cSJonathan Austin know that you do not want to use the MPU. 67