1c121c506SVineet Gupta/* 2c121c506SVineet Gupta * ARC CPU startup Code 3c121c506SVineet Gupta * 4c121c506SVineet Gupta * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) 5c121c506SVineet Gupta * 6c121c506SVineet Gupta * This program is free software; you can redistribute it and/or modify 7c121c506SVineet Gupta * it under the terms of the GNU General Public License version 2 as 8c121c506SVineet Gupta * published by the Free Software Foundation. 9c121c506SVineet Gupta * 10c121c506SVineet Gupta * Vineetg: Dec 2007 11c121c506SVineet Gupta * -Check if we are running on Simulator or on real hardware 12c121c506SVineet Gupta * to skip certain things during boot on simulator 13c121c506SVineet Gupta */ 14c121c506SVineet Gupta 15c121c506SVineet Gupta#include <asm/asm-offsets.h> 16c121c506SVineet Gupta#include <asm/entry.h> 17c121c506SVineet Gupta#include <linux/linkage.h> 18c121c506SVineet Gupta#include <asm/arcregs.h> 19c121c506SVineet Gupta 20c121c506SVineet Gupta .cpu A7 21c121c506SVineet Gupta 22c121c506SVineet Gupta .section .init.text, "ax",@progbits 23c121c506SVineet Gupta .type stext, @function 24c121c506SVineet Gupta .globl stext 25c121c506SVineet Guptastext: 26c121c506SVineet Gupta ;------------------------------------------------------------------- 27c121c506SVineet Gupta ; Don't clobber r0-r4 yet. It might have bootloader provided info 28c121c506SVineet Gupta ;------------------------------------------------------------------- 29c121c506SVineet Gupta 30*41195d23SVineet Gupta#ifdef CONFIG_SMP 31*41195d23SVineet Gupta ; Only Boot (Master) proceeds. Others wait in platform dependent way 32*41195d23SVineet Gupta ; IDENTITY Reg [ 3 2 1 0 ] 33*41195d23SVineet Gupta ; (cpu-id) ^^^ => Zero for UP ARC700 34*41195d23SVineet Gupta ; => #Core-ID if SMP (Master 0) 35*41195d23SVineet Gupta GET_CPU_ID r5 36*41195d23SVineet Gupta cmp r5, 0 37*41195d23SVineet Gupta jnz arc_platform_smp_wait_to_boot 38*41195d23SVineet Gupta#endif 39c121c506SVineet Gupta ; Clear BSS before updating any globals 40c121c506SVineet Gupta ; XXX: use ZOL here 41c121c506SVineet Gupta mov r5, __bss_start 42c121c506SVineet Gupta mov r6, __bss_stop 43c121c506SVineet Gupta1: 44c121c506SVineet Gupta st.ab 0, [r5,4] 45c121c506SVineet Gupta brlt r5, r6, 1b 46c121c506SVineet Gupta 47c121c506SVineet Gupta#ifdef CONFIG_CMDLINE_UBOOT 48c121c506SVineet Gupta ; support for bootloader provided cmdline 49c121c506SVineet Gupta ; If cmdline passed by u-boot, then 50c121c506SVineet Gupta ; r0 = 1 (because ATAGS parsing, now retired, used to use 0) 51c121c506SVineet Gupta ; r1 = magic number (board identity) 52c121c506SVineet Gupta ; r2 = addr of cmdline string (somewhere in memory/flash) 53c121c506SVineet Gupta 54c121c506SVineet Gupta brne r0, 1, .Lother_bootup_chores ; u-boot didn't pass cmdline 55c121c506SVineet Gupta breq r2, 0, .Lother_bootup_chores ; or cmdline is NULL 56c121c506SVineet Gupta 57c121c506SVineet Gupta mov r5, @command_line 58c121c506SVineet Gupta1: 59c121c506SVineet Gupta ldb.ab r6, [r2, 1] 60c121c506SVineet Gupta breq r6, 0, .Lother_bootup_chores 61c121c506SVineet Gupta b.d 1b 62c121c506SVineet Gupta stb.ab r6, [r5, 1] 63c121c506SVineet Gupta#endif 64c121c506SVineet Gupta 65c121c506SVineet Gupta.Lother_bootup_chores: 66c121c506SVineet Gupta 67c121c506SVineet Gupta ; Identify if running on ISS vs Silicon 68c121c506SVineet Gupta ; IDENTITY Reg [ 3 2 1 0 ] 69c121c506SVineet Gupta ; (chip-id) ^^^^^ ==> 0xffff for ISS 70c121c506SVineet Gupta lr r0, [identity] 71c121c506SVineet Gupta lsr r3, r0, 16 72c121c506SVineet Gupta cmp r3, 0xffff 73c121c506SVineet Gupta mov.z r4, 0 74c121c506SVineet Gupta mov.nz r4, 1 75c121c506SVineet Gupta st r4, [@running_on_hw] 76c121c506SVineet Gupta 77c121c506SVineet Gupta ; setup "current" tsk and optionally cache it in dedicated r25 78c121c506SVineet Gupta mov r9, @init_task 79c121c506SVineet Gupta SET_CURR_TASK_ON_CPU r9, r0 ; r9 = tsk, r0 = scratch 80c121c506SVineet Gupta 81c121c506SVineet Gupta ; setup stack (fp, sp) 82c121c506SVineet Gupta mov fp, 0 83c121c506SVineet Gupta 84c121c506SVineet Gupta ; tsk->thread_info is really a PAGE, whose bottom hoists stack 85c121c506SVineet Gupta GET_TSK_STACK_BASE r9, sp ; r9 = tsk, sp = stack base(output) 86c121c506SVineet Gupta 87c121c506SVineet Gupta j start_kernel ; "C" entry point 88*41195d23SVineet Gupta 89*41195d23SVineet Gupta#ifdef CONFIG_SMP 90*41195d23SVineet Gupta;---------------------------------------------------------------- 91*41195d23SVineet Gupta; First lines of code run by secondary before jumping to 'C' 92*41195d23SVineet Gupta;---------------------------------------------------------------- 93*41195d23SVineet Gupta .section .init.text, "ax",@progbits 94*41195d23SVineet Gupta .type first_lines_of_secondary, @function 95*41195d23SVineet Gupta .globl first_lines_of_secondary 96*41195d23SVineet Gupta 97*41195d23SVineet Guptafirst_lines_of_secondary: 98*41195d23SVineet Gupta 99*41195d23SVineet Gupta ; setup per-cpu idle task as "current" on this CPU 100*41195d23SVineet Gupta ld r0, [@secondary_idle_tsk] 101*41195d23SVineet Gupta SET_CURR_TASK_ON_CPU r0, r1 102*41195d23SVineet Gupta 103*41195d23SVineet Gupta ; setup stack (fp, sp) 104*41195d23SVineet Gupta mov fp, 0 105*41195d23SVineet Gupta 106*41195d23SVineet Gupta ; set it's stack base to tsk->thread_info bottom 107*41195d23SVineet Gupta GET_TSK_STACK_BASE r0, sp 108*41195d23SVineet Gupta 109*41195d23SVineet Gupta j start_kernel_secondary 110*41195d23SVineet Gupta 111*41195d23SVineet Gupta#endif 112