xref: /openbmc/linux/arch/arc/kernel/fpu.c (revision 762f99f4f3cb41a775b5157dd761217beba65873)
1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2bf90e1eaSVineet Gupta /*
3bf90e1eaSVineet Gupta  * fpu.c - save/restore of Floating Point Unit Registers on task switch
4bf90e1eaSVineet Gupta  *
5bf90e1eaSVineet Gupta  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
6bf90e1eaSVineet Gupta  */
7bf90e1eaSVineet Gupta 
8bf90e1eaSVineet Gupta #include <linux/sched.h>
9f05523aaSVineet Gupta #include <asm/fpu.h>
10bf90e1eaSVineet Gupta 
11f45ba2bdSVineet Gupta #ifdef CONFIG_ISA_ARCOMPACT
12f45ba2bdSVineet Gupta 
13bf90e1eaSVineet Gupta /*
14bf90e1eaSVineet Gupta  * To save/restore FPU regs, simplest scheme would use LR/SR insns.
15bf90e1eaSVineet Gupta  * However since SR serializes the pipeline, an alternate "hack" can be used
16bf90e1eaSVineet Gupta  * which uses the FPU Exchange insn (DEXCL) to r/w FPU regs.
17bf90e1eaSVineet Gupta  *
18bf90e1eaSVineet Gupta  * Store to 64bit dpfp1 reg from a pair of core regs:
19bf90e1eaSVineet Gupta  *   dexcl1 0, r1, r0  ; where r1:r0 is the 64 bit val
20bf90e1eaSVineet Gupta  *
21bf90e1eaSVineet Gupta  * Read from dpfp1 into pair of core regs (w/o clobbering dpfp1)
22bf90e1eaSVineet Gupta  *   mov_s    r3, 0
23bf90e1eaSVineet Gupta  *   daddh11  r1, r3, r3   ; get "hi" into r1 (dpfp1 unchanged)
24bf90e1eaSVineet Gupta  *   dexcl1   r0, r1, r3   ; get "low" into r0 (dpfp1 low clobbered)
25bf90e1eaSVineet Gupta  *   dexcl1    0, r1, r0   ; restore dpfp1 to orig value
26bf90e1eaSVineet Gupta  *
27bf90e1eaSVineet Gupta  * However we can tweak the read, so that read-out of outgoing task's FPU regs
28bf90e1eaSVineet Gupta  * and write of incoming task's regs happen in one shot. So all the work is
29bf90e1eaSVineet Gupta  * done before context switch
30bf90e1eaSVineet Gupta  */
31bf90e1eaSVineet Gupta 
fpu_save_restore(struct task_struct * prev,struct task_struct * next)32bf90e1eaSVineet Gupta void fpu_save_restore(struct task_struct *prev, struct task_struct *next)
33bf90e1eaSVineet Gupta {
34bf90e1eaSVineet Gupta 	unsigned int *saveto = &prev->thread.fpu.aux_dpfp[0].l;
35bf90e1eaSVineet Gupta 	unsigned int *readfrom = &next->thread.fpu.aux_dpfp[0].l;
36bf90e1eaSVineet Gupta 
37bf90e1eaSVineet Gupta 	const unsigned int zero = 0;
38bf90e1eaSVineet Gupta 
39bf90e1eaSVineet Gupta 	__asm__ __volatile__(
40bf90e1eaSVineet Gupta 		"daddh11  %0, %2, %2\n"
41bf90e1eaSVineet Gupta 		"dexcl1   %1, %3, %4\n"
42bf90e1eaSVineet Gupta 		: "=&r" (*(saveto + 1)), /* early clobber must here */
43bf90e1eaSVineet Gupta 		  "=&r" (*(saveto))
44bf90e1eaSVineet Gupta 		: "r" (zero), "r" (*(readfrom + 1)), "r" (*(readfrom))
45bf90e1eaSVineet Gupta 	);
46bf90e1eaSVineet Gupta 
47bf90e1eaSVineet Gupta 	__asm__ __volatile__(
48bf90e1eaSVineet Gupta 		"daddh22  %0, %2, %2\n"
49bf90e1eaSVineet Gupta 		"dexcl2   %1, %3, %4\n"
50bf90e1eaSVineet Gupta 		: "=&r"(*(saveto + 3)),	/* early clobber must here */
51bf90e1eaSVineet Gupta 		  "=&r"(*(saveto + 2))
52bf90e1eaSVineet Gupta 		: "r" (zero), "r" (*(readfrom + 3)), "r" (*(readfrom + 2))
53bf90e1eaSVineet Gupta 	);
54bf90e1eaSVineet Gupta }
55f45ba2bdSVineet Gupta 
56f45ba2bdSVineet Gupta #else
57f45ba2bdSVineet Gupta 
fpu_init_task(struct pt_regs * regs)58f45ba2bdSVineet Gupta void fpu_init_task(struct pt_regs *regs)
59f45ba2bdSVineet Gupta {
60*3a715e80SVineet Gupta 	const unsigned int fwe = 0x80000000;
61*3a715e80SVineet Gupta 
62f45ba2bdSVineet Gupta 	/* default rounding mode */
63f45ba2bdSVineet Gupta 	write_aux_reg(ARC_REG_FPU_CTRL, 0x100);
64f45ba2bdSVineet Gupta 
65*3a715e80SVineet Gupta 	/* Initialize to zero: setting requires FWE be set */
66*3a715e80SVineet Gupta 	write_aux_reg(ARC_REG_FPU_STATUS, fwe);
67f45ba2bdSVineet Gupta }
68f45ba2bdSVineet Gupta 
fpu_save_restore(struct task_struct * prev,struct task_struct * next)69f45ba2bdSVineet Gupta void fpu_save_restore(struct task_struct *prev, struct task_struct *next)
70f45ba2bdSVineet Gupta {
71f45ba2bdSVineet Gupta 	struct arc_fpu *save = &prev->thread.fpu;
72f45ba2bdSVineet Gupta 	struct arc_fpu *restore = &next->thread.fpu;
73*3a715e80SVineet Gupta 	const unsigned int fwe = 0x80000000;
74f45ba2bdSVineet Gupta 
75f45ba2bdSVineet Gupta 	save->ctrl = read_aux_reg(ARC_REG_FPU_CTRL);
76f45ba2bdSVineet Gupta 	save->status = read_aux_reg(ARC_REG_FPU_STATUS);
77f45ba2bdSVineet Gupta 
78f45ba2bdSVineet Gupta 	write_aux_reg(ARC_REG_FPU_CTRL, restore->ctrl);
79*3a715e80SVineet Gupta 	write_aux_reg(ARC_REG_FPU_STATUS, (fwe | restore->status));
80f45ba2bdSVineet Gupta }
81f45ba2bdSVineet Gupta 
82f45ba2bdSVineet Gupta #endif
83