1d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 29c57564eSVineet Gupta /* 30dd450feSMischa Jonker * Linux performance counter support for ARC 40dd450feSMischa Jonker * 5fb7c5725SVineet Gupta * Copyright (C) 2014-2015 Synopsys, Inc. (www.synopsys.com) 60dd450feSMischa Jonker * Copyright (C) 2011-2013 Synopsys, Inc. (www.synopsys.com) 79c57564eSVineet Gupta */ 89c57564eSVineet Gupta 99c57564eSVineet Gupta #ifndef __ASM_PERF_EVENT_H 109c57564eSVineet Gupta #define __ASM_PERF_EVENT_H 119c57564eSVineet Gupta 12fb7c5725SVineet Gupta /* Max number of counters that PCT block may ever have */ 13fb7c5725SVineet Gupta #define ARC_PERF_MAX_COUNTERS 32 140dd450feSMischa Jonker 150dd450feSMischa Jonker #define ARC_REG_CC_BUILD 0xF6 160dd450feSMischa Jonker #define ARC_REG_CC_INDEX 0x240 170dd450feSMischa Jonker #define ARC_REG_CC_NAME0 0x241 180dd450feSMischa Jonker #define ARC_REG_CC_NAME1 0x242 190dd450feSMischa Jonker 200dd450feSMischa Jonker #define ARC_REG_PCT_BUILD 0xF5 210dd450feSMischa Jonker #define ARC_REG_PCT_COUNTL 0x250 220dd450feSMischa Jonker #define ARC_REG_PCT_COUNTH 0x251 230dd450feSMischa Jonker #define ARC_REG_PCT_SNAPL 0x252 240dd450feSMischa Jonker #define ARC_REG_PCT_SNAPH 0x253 250dd450feSMischa Jonker #define ARC_REG_PCT_CONFIG 0x254 260dd450feSMischa Jonker #define ARC_REG_PCT_CONTROL 0x255 270dd450feSMischa Jonker #define ARC_REG_PCT_INDEX 0x256 2836481cf7SAlexey Brodkin #define ARC_REG_PCT_INT_CNTL 0x25C 2936481cf7SAlexey Brodkin #define ARC_REG_PCT_INT_CNTH 0x25D 3036481cf7SAlexey Brodkin #define ARC_REG_PCT_INT_CTRL 0x25E 3136481cf7SAlexey Brodkin #define ARC_REG_PCT_INT_ACT 0x25F 320dd450feSMischa Jonker 33e6b1d126SAlexey Brodkin #define ARC_REG_PCT_CONFIG_USER (1 << 18) /* count in user mode */ 34e6b1d126SAlexey Brodkin #define ARC_REG_PCT_CONFIG_KERN (1 << 19) /* count in kernel mode */ 35e6b1d126SAlexey Brodkin 360dd450feSMischa Jonker #define ARC_REG_PCT_CONTROL_CC (1 << 16) /* clear counts */ 370dd450feSMischa Jonker #define ARC_REG_PCT_CONTROL_SN (1 << 17) /* snapshot */ 380dd450feSMischa Jonker 390dd450feSMischa Jonker struct arc_reg_pct_build { 400dd450feSMischa Jonker #ifdef CONFIG_CPU_BIG_ENDIAN 4136481cf7SAlexey Brodkin unsigned int m:8, c:8, r:5, i:1, s:2, v:8; 420dd450feSMischa Jonker #else 4336481cf7SAlexey Brodkin unsigned int v:8, s:2, i:1, r:5, c:8, m:8; 440dd450feSMischa Jonker #endif 450dd450feSMischa Jonker }; 460dd450feSMischa Jonker 470dd450feSMischa Jonker struct arc_reg_cc_build { 480dd450feSMischa Jonker #ifdef CONFIG_CPU_BIG_ENDIAN 490dd450feSMischa Jonker unsigned int c:16, r:8, v:8; 500dd450feSMischa Jonker #else 510dd450feSMischa Jonker unsigned int v:8, r:8, c:16; 520dd450feSMischa Jonker #endif 530dd450feSMischa Jonker }; 540dd450feSMischa Jonker 550dd450feSMischa Jonker #define PERF_COUNT_ARC_DCLM (PERF_COUNT_HW_MAX + 0) 560dd450feSMischa Jonker #define PERF_COUNT_ARC_DCSM (PERF_COUNT_HW_MAX + 1) 570dd450feSMischa Jonker #define PERF_COUNT_ARC_ICM (PERF_COUNT_HW_MAX + 2) 580dd450feSMischa Jonker #define PERF_COUNT_ARC_BPOK (PERF_COUNT_HW_MAX + 3) 590dd450feSMischa Jonker #define PERF_COUNT_ARC_EDTLB (PERF_COUNT_HW_MAX + 4) 600dd450feSMischa Jonker #define PERF_COUNT_ARC_EITLB (PERF_COUNT_HW_MAX + 5) 610a8a4767SVineet Gupta #define PERF_COUNT_ARC_LDC (PERF_COUNT_HW_MAX + 6) 620a8a4767SVineet Gupta #define PERF_COUNT_ARC_STC (PERF_COUNT_HW_MAX + 7) 630a8a4767SVineet Gupta 640a8a4767SVineet Gupta #define PERF_COUNT_ARC_HW_MAX (PERF_COUNT_HW_MAX + 8) 650dd450feSMischa Jonker 66*6aa98f62SSergey Matyukevich #ifdef CONFIG_PERF_EVENTS 67*6aa98f62SSergey Matyukevich #define perf_arch_bpf_user_pt_regs(regs) (struct user_regs_struct *)regs 68*6aa98f62SSergey Matyukevich #endif 69*6aa98f62SSergey Matyukevich 709c57564eSVineet Gupta #endif /* __ASM_PERF_EVENT_H */ 71