1*e9bb6275SMauro Carvalho Chehab======================== 2*e9bb6275SMauro Carvalho ChehabKernel driver w1_ds28e04 3*e9bb6275SMauro Carvalho Chehab======================== 4*e9bb6275SMauro Carvalho Chehab 5*e9bb6275SMauro Carvalho ChehabSupported chips: 6*e9bb6275SMauro Carvalho Chehab 7*e9bb6275SMauro Carvalho Chehab * Maxim DS28E04-100 4096-Bit Addressable 1-Wire EEPROM with PIO 8*e9bb6275SMauro Carvalho Chehab 9*e9bb6275SMauro Carvalho Chehabsupported family codes: 10*e9bb6275SMauro Carvalho Chehab 11*e9bb6275SMauro Carvalho Chehab ================= ==== 12*e9bb6275SMauro Carvalho Chehab W1_FAMILY_DS28E04 0x1C 13*e9bb6275SMauro Carvalho Chehab ================= ==== 14*e9bb6275SMauro Carvalho Chehab 15*e9bb6275SMauro Carvalho ChehabAuthor: Markus Franke, <franke.m@sebakmt.com> <franm@hrz.tu-chemnitz.de> 16*e9bb6275SMauro Carvalho Chehab 17*e9bb6275SMauro Carvalho ChehabDescription 18*e9bb6275SMauro Carvalho Chehab----------- 19*e9bb6275SMauro Carvalho Chehab 20*e9bb6275SMauro Carvalho ChehabSupport is provided through the sysfs files "eeprom" and "pio". CRC checking 21*e9bb6275SMauro Carvalho Chehabduring memory accesses can optionally be enabled/disabled via the device 22*e9bb6275SMauro Carvalho Chehabattribute "crccheck". The strong pull-up can optionally be enabled/disabled 23*e9bb6275SMauro Carvalho Chehabvia the module parameter "w1_strong_pullup". 24*e9bb6275SMauro Carvalho Chehab 25*e9bb6275SMauro Carvalho ChehabMemory Access 26*e9bb6275SMauro Carvalho Chehab 27*e9bb6275SMauro Carvalho Chehab A read operation on the "eeprom" file reads the given amount of bytes 28*e9bb6275SMauro Carvalho Chehab from the EEPROM of the DS28E04. 29*e9bb6275SMauro Carvalho Chehab 30*e9bb6275SMauro Carvalho Chehab A write operation on the "eeprom" file writes the given byte sequence 31*e9bb6275SMauro Carvalho Chehab to the EEPROM of the DS28E04. If CRC checking mode is enabled only 32*e9bb6275SMauro Carvalho Chehab fully aligned blocks of 32 bytes with valid CRC16 values (in bytes 30 33*e9bb6275SMauro Carvalho Chehab and 31) are allowed to be written. 34*e9bb6275SMauro Carvalho Chehab 35*e9bb6275SMauro Carvalho ChehabPIO Access 36*e9bb6275SMauro Carvalho Chehab 37*e9bb6275SMauro Carvalho Chehab The 2 PIOs of the DS28E04-100 are accessible via the "pio" sysfs file. 38*e9bb6275SMauro Carvalho Chehab 39*e9bb6275SMauro Carvalho Chehab The current status of the PIO's is returned as an 8 bit value. Bit 0/1 40*e9bb6275SMauro Carvalho Chehab represent the state of PIO_0/PIO_1. Bits 2..7 do not care. The PIO's are 41*e9bb6275SMauro Carvalho Chehab driven low-active, i.e. the driver delivers/expects low-active values. 42