15cccf379SMauro Carvalho Chehab.. SPDX-License-Identifier: GPL-2.0 25cccf379SMauro Carvalho Chehab 35cccf379SMauro Carvalho Chehab========================= 45cccf379SMauro Carvalho ChehabXICS interrupt controller 55cccf379SMauro Carvalho Chehab========================= 65cccf379SMauro Carvalho Chehab 75cccf379SMauro Carvalho ChehabDevice type supported: KVM_DEV_TYPE_XICS 85cccf379SMauro Carvalho Chehab 95cccf379SMauro Carvalho ChehabGroups: 105cccf379SMauro Carvalho Chehab 1. KVM_DEV_XICS_GRP_SOURCES 115cccf379SMauro Carvalho Chehab Attributes: 125cccf379SMauro Carvalho Chehab 135cccf379SMauro Carvalho Chehab One per interrupt source, indexed by the source number. 145cccf379SMauro Carvalho Chehab 2. KVM_DEV_XICS_GRP_CTRL 155cccf379SMauro Carvalho Chehab Attributes: 165cccf379SMauro Carvalho Chehab 175cccf379SMauro Carvalho Chehab 2.1 KVM_DEV_XICS_NR_SERVERS (write only) 185cccf379SMauro Carvalho Chehab 195cccf379SMauro Carvalho Chehab The kvm_device_attr.addr points to a __u32 value which is the number of 205cccf379SMauro Carvalho Chehab interrupt server numbers (ie, highest possible vcpu id plus one). 215cccf379SMauro Carvalho Chehab 225cccf379SMauro Carvalho Chehab Errors: 235cccf379SMauro Carvalho Chehab 245cccf379SMauro Carvalho Chehab ======= ========================================== 25*a1c42ddeSJuergen Gross -EINVAL Value greater than KVM_MAX_VCPU_IDS. 265cccf379SMauro Carvalho Chehab -EFAULT Invalid user pointer for attr->addr. 275cccf379SMauro Carvalho Chehab -EBUSY A vcpu is already connected to the device. 285cccf379SMauro Carvalho Chehab ======= ========================================== 295cccf379SMauro Carvalho Chehab 305cccf379SMauro Carvalho ChehabThis device emulates the XICS (eXternal Interrupt Controller 315cccf379SMauro Carvalho ChehabSpecification) defined in PAPR. The XICS has a set of interrupt 325cccf379SMauro Carvalho Chehabsources, each identified by a 20-bit source number, and a set of 335cccf379SMauro Carvalho ChehabInterrupt Control Presentation (ICP) entities, also called "servers", 345cccf379SMauro Carvalho Chehabeach associated with a virtual CPU. 355cccf379SMauro Carvalho Chehab 365cccf379SMauro Carvalho ChehabThe ICP entities are created by enabling the KVM_CAP_IRQ_ARCH 375cccf379SMauro Carvalho Chehabcapability for each vcpu, specifying KVM_CAP_IRQ_XICS in args[0] and 385cccf379SMauro Carvalho Chehabthe interrupt server number (i.e. the vcpu number from the XICS's 395cccf379SMauro Carvalho Chehabpoint of view) in args[1] of the kvm_enable_cap struct. Each ICP has 405cccf379SMauro Carvalho Chehab64 bits of state which can be read and written using the 415cccf379SMauro Carvalho ChehabKVM_GET_ONE_REG and KVM_SET_ONE_REG ioctls on the vcpu. The 64 bit 425cccf379SMauro Carvalho Chehabstate word has the following bitfields, starting at the 435cccf379SMauro Carvalho Chehableast-significant end of the word: 445cccf379SMauro Carvalho Chehab 455cccf379SMauro Carvalho Chehab* Unused, 16 bits 465cccf379SMauro Carvalho Chehab 475cccf379SMauro Carvalho Chehab* Pending interrupt priority, 8 bits 485cccf379SMauro Carvalho Chehab Zero is the highest priority, 255 means no interrupt is pending. 495cccf379SMauro Carvalho Chehab 505cccf379SMauro Carvalho Chehab* Pending IPI (inter-processor interrupt) priority, 8 bits 515cccf379SMauro Carvalho Chehab Zero is the highest priority, 255 means no IPI is pending. 525cccf379SMauro Carvalho Chehab 535cccf379SMauro Carvalho Chehab* Pending interrupt source number, 24 bits 545cccf379SMauro Carvalho Chehab Zero means no interrupt pending, 2 means an IPI is pending 555cccf379SMauro Carvalho Chehab 565cccf379SMauro Carvalho Chehab* Current processor priority, 8 bits 575cccf379SMauro Carvalho Chehab Zero is the highest priority, meaning no interrupts can be 585cccf379SMauro Carvalho Chehab delivered, and 255 is the lowest priority. 595cccf379SMauro Carvalho Chehab 605cccf379SMauro Carvalho ChehabEach source has 64 bits of state that can be read and written using 615cccf379SMauro Carvalho Chehabthe KVM_GET_DEVICE_ATTR and KVM_SET_DEVICE_ATTR ioctls, specifying the 625cccf379SMauro Carvalho ChehabKVM_DEV_XICS_GRP_SOURCES attribute group, with the attribute number being 635cccf379SMauro Carvalho Chehabthe interrupt source number. The 64 bit state word has the following 645cccf379SMauro Carvalho Chehabbitfields, starting from the least-significant end of the word: 655cccf379SMauro Carvalho Chehab 665cccf379SMauro Carvalho Chehab* Destination (server number), 32 bits 675cccf379SMauro Carvalho Chehab 685cccf379SMauro Carvalho Chehab This specifies where the interrupt should be sent, and is the 695cccf379SMauro Carvalho Chehab interrupt server number specified for the destination vcpu. 705cccf379SMauro Carvalho Chehab 715cccf379SMauro Carvalho Chehab* Priority, 8 bits 725cccf379SMauro Carvalho Chehab 735cccf379SMauro Carvalho Chehab This is the priority specified for this interrupt source, where 0 is 745cccf379SMauro Carvalho Chehab the highest priority and 255 is the lowest. An interrupt with a 755cccf379SMauro Carvalho Chehab priority of 255 will never be delivered. 765cccf379SMauro Carvalho Chehab 775cccf379SMauro Carvalho Chehab* Level sensitive flag, 1 bit 785cccf379SMauro Carvalho Chehab 795cccf379SMauro Carvalho Chehab This bit is 1 for a level-sensitive interrupt source, or 0 for 805cccf379SMauro Carvalho Chehab edge-sensitive (or MSI). 815cccf379SMauro Carvalho Chehab 825cccf379SMauro Carvalho Chehab* Masked flag, 1 bit 835cccf379SMauro Carvalho Chehab 845cccf379SMauro Carvalho Chehab This bit is set to 1 if the interrupt is masked (cannot be delivered 855cccf379SMauro Carvalho Chehab regardless of its priority), for example by the ibm,int-off RTAS 865cccf379SMauro Carvalho Chehab call, or 0 if it is not masked. 875cccf379SMauro Carvalho Chehab 885cccf379SMauro Carvalho Chehab* Pending flag, 1 bit 895cccf379SMauro Carvalho Chehab 905cccf379SMauro Carvalho Chehab This bit is 1 if the source has a pending interrupt, otherwise 0. 915cccf379SMauro Carvalho Chehab 925cccf379SMauro Carvalho ChehabOnly one XICS instance may be created per VM. 93