1e777a5bdSMauro Carvalho Chehab.. SPDX-License-Identifier: GPL-2.0 2e777a5bdSMauro Carvalho Chehab 3e777a5bdSMauro Carvalho Chehab====================== 4e777a5bdSMauro Carvalho ChehabGeneric vcpu interface 5e777a5bdSMauro Carvalho Chehab====================== 6e777a5bdSMauro Carvalho Chehab 7e777a5bdSMauro Carvalho ChehabThe virtual cpu "device" also accepts the ioctls KVM_SET_DEVICE_ATTR, 8e777a5bdSMauro Carvalho ChehabKVM_GET_DEVICE_ATTR, and KVM_HAS_DEVICE_ATTR. The interface uses the same struct 9e777a5bdSMauro Carvalho Chehabkvm_device_attr as other devices, but targets VCPU-wide settings and controls. 10e777a5bdSMauro Carvalho Chehab 11e777a5bdSMauro Carvalho ChehabThe groups and attributes per virtual cpu, if any, are architecture specific. 12e777a5bdSMauro Carvalho Chehab 13e777a5bdSMauro Carvalho Chehab1. GROUP: KVM_ARM_VCPU_PMU_V3_CTRL 14e777a5bdSMauro Carvalho Chehab================================== 15e777a5bdSMauro Carvalho Chehab 16e777a5bdSMauro Carvalho Chehab:Architectures: ARM64 17e777a5bdSMauro Carvalho Chehab 18e777a5bdSMauro Carvalho Chehab1.1. ATTRIBUTE: KVM_ARM_VCPU_PMU_V3_IRQ 19e777a5bdSMauro Carvalho Chehab--------------------------------------- 20e777a5bdSMauro Carvalho Chehab 21e777a5bdSMauro Carvalho Chehab:Parameters: in kvm_device_attr.addr the address for PMU overflow interrupt is a 22e777a5bdSMauro Carvalho Chehab pointer to an int 23e777a5bdSMauro Carvalho Chehab 24e777a5bdSMauro Carvalho ChehabReturns: 25e777a5bdSMauro Carvalho Chehab 26e777a5bdSMauro Carvalho Chehab ======= ======================================================== 27e777a5bdSMauro Carvalho Chehab -EBUSY The PMU overflow interrupt is already set 28af130d0aSAlexandru Elisei -EFAULT Error reading interrupt number 29*51dd2eb9SAlexandru Elisei -ENXIO PMUv3 not supported or the overflow interrupt not set 30*51dd2eb9SAlexandru Elisei when attempting to get it 31*51dd2eb9SAlexandru Elisei -ENODEV KVM_ARM_VCPU_PMU_V3 feature missing from VCPU 32e777a5bdSMauro Carvalho Chehab -EINVAL Invalid PMU overflow interrupt number supplied or 33e777a5bdSMauro Carvalho Chehab trying to set the IRQ number without using an in-kernel 34e777a5bdSMauro Carvalho Chehab irqchip. 35e777a5bdSMauro Carvalho Chehab ======= ======================================================== 36e777a5bdSMauro Carvalho Chehab 37e777a5bdSMauro Carvalho ChehabA value describing the PMUv3 (Performance Monitor Unit v3) overflow interrupt 38e777a5bdSMauro Carvalho Chehabnumber for this vcpu. This interrupt could be a PPI or SPI, but the interrupt 39e777a5bdSMauro Carvalho Chehabtype must be same for each vcpu. As a PPI, the interrupt number is the same for 40e777a5bdSMauro Carvalho Chehaball vcpus, while as an SPI it must be a separate number per vcpu. 41e777a5bdSMauro Carvalho Chehab 42e777a5bdSMauro Carvalho Chehab1.2 ATTRIBUTE: KVM_ARM_VCPU_PMU_V3_INIT 43e777a5bdSMauro Carvalho Chehab--------------------------------------- 44e777a5bdSMauro Carvalho Chehab 45e777a5bdSMauro Carvalho Chehab:Parameters: no additional parameter in kvm_device_attr.addr 46e777a5bdSMauro Carvalho Chehab 47e777a5bdSMauro Carvalho ChehabReturns: 48e777a5bdSMauro Carvalho Chehab 49e777a5bdSMauro Carvalho Chehab ======= ====================================================== 50af130d0aSAlexandru Elisei -EEXIST Interrupt number already used 51e777a5bdSMauro Carvalho Chehab -ENODEV PMUv3 not supported or GIC not initialized 52*51dd2eb9SAlexandru Elisei -ENXIO PMUv3 not supported, missing VCPU feature or interrupt 53*51dd2eb9SAlexandru Elisei number not set 54e777a5bdSMauro Carvalho Chehab -EBUSY PMUv3 already initialized 55e777a5bdSMauro Carvalho Chehab ======= ====================================================== 56e777a5bdSMauro Carvalho Chehab 57e777a5bdSMauro Carvalho ChehabRequest the initialization of the PMUv3. If using the PMUv3 with an in-kernel 58e777a5bdSMauro Carvalho Chehabvirtual GIC implementation, this must be done after initializing the in-kernel 59e777a5bdSMauro Carvalho Chehabirqchip. 60e777a5bdSMauro Carvalho Chehab 618be86a5eSMarc Zyngier1.3 ATTRIBUTE: KVM_ARM_VCPU_PMU_V3_FILTER 628be86a5eSMarc Zyngier----------------------------------------- 638be86a5eSMarc Zyngier 648be86a5eSMarc Zyngier:Parameters: in kvm_device_attr.addr the address for a PMU event filter is a 658be86a5eSMarc Zyngier pointer to a struct kvm_pmu_event_filter 668be86a5eSMarc Zyngier 678be86a5eSMarc Zyngier:Returns: 688be86a5eSMarc Zyngier 698be86a5eSMarc Zyngier ======= ====================================================== 708be86a5eSMarc Zyngier -ENODEV: PMUv3 not supported or GIC not initialized 718be86a5eSMarc Zyngier -ENXIO: PMUv3 not properly configured or in-kernel irqchip not 728be86a5eSMarc Zyngier configured as required prior to calling this attribute 738be86a5eSMarc Zyngier -EBUSY: PMUv3 already initialized 748be86a5eSMarc Zyngier -EINVAL: Invalid filter range 758be86a5eSMarc Zyngier ======= ====================================================== 768be86a5eSMarc Zyngier 778be86a5eSMarc ZyngierRequest the installation of a PMU event filter described as follows: 788be86a5eSMarc Zyngier 798be86a5eSMarc Zyngierstruct kvm_pmu_event_filter { 808be86a5eSMarc Zyngier __u16 base_event; 818be86a5eSMarc Zyngier __u16 nevents; 828be86a5eSMarc Zyngier 838be86a5eSMarc Zyngier#define KVM_PMU_EVENT_ALLOW 0 848be86a5eSMarc Zyngier#define KVM_PMU_EVENT_DENY 1 858be86a5eSMarc Zyngier 868be86a5eSMarc Zyngier __u8 action; 878be86a5eSMarc Zyngier __u8 pad[3]; 888be86a5eSMarc Zyngier}; 898be86a5eSMarc Zyngier 908be86a5eSMarc ZyngierA filter range is defined as the range [@base_event, @base_event + @nevents), 918be86a5eSMarc Zyngiertogether with an @action (KVM_PMU_EVENT_ALLOW or KVM_PMU_EVENT_DENY). The 928be86a5eSMarc Zyngierfirst registered range defines the global policy (global ALLOW if the first 938be86a5eSMarc Zyngier@action is DENY, global DENY if the first @action is ALLOW). Multiple ranges 948be86a5eSMarc Zyngiercan be programmed, and must fit within the event space defined by the PMU 958be86a5eSMarc Zyngierarchitecture (10 bits on ARMv8.0, 16 bits from ARMv8.1 onwards). 968be86a5eSMarc Zyngier 978be86a5eSMarc ZyngierNote: "Cancelling" a filter by registering the opposite action for the same 988be86a5eSMarc Zyngierrange doesn't change the default action. For example, installing an ALLOW 998be86a5eSMarc Zyngierfilter for event range [0:10) as the first filter and then applying a DENY 1008be86a5eSMarc Zyngieraction for the same range will leave the whole range as disabled. 1018be86a5eSMarc Zyngier 1028be86a5eSMarc ZyngierRestrictions: Event 0 (SW_INCR) is never filtered, as it doesn't count a 1038be86a5eSMarc Zyngierhardware event. Filtering event 0x1E (CHAIN) has no effect either, as it 1048be86a5eSMarc Zyngierisn't strictly speaking an event. Filtering the cycle counter is possible 1058be86a5eSMarc Zyngierusing event 0x11 (CPU_CYCLES). 1068be86a5eSMarc Zyngier 107e777a5bdSMauro Carvalho Chehab 108e777a5bdSMauro Carvalho Chehab2. GROUP: KVM_ARM_VCPU_TIMER_CTRL 109e777a5bdSMauro Carvalho Chehab================================= 110e777a5bdSMauro Carvalho Chehab 111e777a5bdSMauro Carvalho Chehab:Architectures: ARM, ARM64 112e777a5bdSMauro Carvalho Chehab 113e777a5bdSMauro Carvalho Chehab2.1. ATTRIBUTES: KVM_ARM_VCPU_TIMER_IRQ_VTIMER, KVM_ARM_VCPU_TIMER_IRQ_PTIMER 114e777a5bdSMauro Carvalho Chehab----------------------------------------------------------------------------- 115e777a5bdSMauro Carvalho Chehab 116e777a5bdSMauro Carvalho Chehab:Parameters: in kvm_device_attr.addr the address for the timer interrupt is a 117e777a5bdSMauro Carvalho Chehab pointer to an int 118e777a5bdSMauro Carvalho Chehab 119e777a5bdSMauro Carvalho ChehabReturns: 120e777a5bdSMauro Carvalho Chehab 121e777a5bdSMauro Carvalho Chehab ======= ================================= 122e777a5bdSMauro Carvalho Chehab -EINVAL Invalid timer interrupt number 123e777a5bdSMauro Carvalho Chehab -EBUSY One or more VCPUs has already run 124e777a5bdSMauro Carvalho Chehab ======= ================================= 125e777a5bdSMauro Carvalho Chehab 126e777a5bdSMauro Carvalho ChehabA value describing the architected timer interrupt number when connected to an 127e777a5bdSMauro Carvalho Chehabin-kernel virtual GIC. These must be a PPI (16 <= intid < 32). Setting the 128e777a5bdSMauro Carvalho Chehabattribute overrides the default values (see below). 129e777a5bdSMauro Carvalho Chehab 130e777a5bdSMauro Carvalho Chehab============================= ========================================== 131e777a5bdSMauro Carvalho ChehabKVM_ARM_VCPU_TIMER_IRQ_VTIMER The EL1 virtual timer intid (default: 27) 132e777a5bdSMauro Carvalho ChehabKVM_ARM_VCPU_TIMER_IRQ_PTIMER The EL1 physical timer intid (default: 30) 133e777a5bdSMauro Carvalho Chehab============================= ========================================== 134e777a5bdSMauro Carvalho Chehab 135e777a5bdSMauro Carvalho ChehabSetting the same PPI for different timers will prevent the VCPUs from running. 136e777a5bdSMauro Carvalho ChehabSetting the interrupt number on a VCPU configures all VCPUs created at that 137e777a5bdSMauro Carvalho Chehabtime to use the number provided for a given timer, overwriting any previously 138e777a5bdSMauro Carvalho Chehabconfigured values on other VCPUs. Userspace should configure the interrupt 139e777a5bdSMauro Carvalho Chehabnumbers on at least one VCPU after creating all VCPUs and before running any 140e777a5bdSMauro Carvalho ChehabVCPUs. 141e777a5bdSMauro Carvalho Chehab 142e777a5bdSMauro Carvalho Chehab3. GROUP: KVM_ARM_VCPU_PVTIME_CTRL 143e777a5bdSMauro Carvalho Chehab================================== 144e777a5bdSMauro Carvalho Chehab 145e777a5bdSMauro Carvalho Chehab:Architectures: ARM64 146e777a5bdSMauro Carvalho Chehab 147e777a5bdSMauro Carvalho Chehab3.1 ATTRIBUTE: KVM_ARM_VCPU_PVTIME_IPA 148e777a5bdSMauro Carvalho Chehab-------------------------------------- 149e777a5bdSMauro Carvalho Chehab 150e777a5bdSMauro Carvalho Chehab:Parameters: 64-bit base address 151e777a5bdSMauro Carvalho Chehab 152e777a5bdSMauro Carvalho ChehabReturns: 153e777a5bdSMauro Carvalho Chehab 154e777a5bdSMauro Carvalho Chehab ======= ====================================== 155e777a5bdSMauro Carvalho Chehab -ENXIO Stolen time not implemented 156e777a5bdSMauro Carvalho Chehab -EEXIST Base address already set for this VCPU 157e777a5bdSMauro Carvalho Chehab -EINVAL Base address not 64 byte aligned 158e777a5bdSMauro Carvalho Chehab ======= ====================================== 159e777a5bdSMauro Carvalho Chehab 160e777a5bdSMauro Carvalho ChehabSpecifies the base address of the stolen time structure for this VCPU. The 161e777a5bdSMauro Carvalho Chehabbase address must be 64 byte aligned and exist within a valid guest memory 16272ef5e52SMauro Carvalho Chehabregion. See Documentation/virt/kvm/arm/pvtime.rst for more information 163e777a5bdSMauro Carvalho Chehabincluding the layout of the stolen time structure. 164