1*4d2e26a3SMauro Carvalho Chehab============ 2*4d2e26a3SMauro Carvalho ChehabCPU Features 3*4d2e26a3SMauro Carvalho Chehab============ 4*4d2e26a3SMauro Carvalho Chehab 5*4d2e26a3SMauro Carvalho ChehabHollis Blanchard <hollis@austin.ibm.com> 6*4d2e26a3SMauro Carvalho Chehab5 Jun 2002 7*4d2e26a3SMauro Carvalho Chehab 8*4d2e26a3SMauro Carvalho ChehabThis document describes the system (including self-modifying code) used in the 9*4d2e26a3SMauro Carvalho ChehabPPC Linux kernel to support a variety of PowerPC CPUs without requiring 10*4d2e26a3SMauro Carvalho Chehabcompile-time selection. 11*4d2e26a3SMauro Carvalho Chehab 12*4d2e26a3SMauro Carvalho ChehabEarly in the boot process the ppc32 kernel detects the current CPU type and 13*4d2e26a3SMauro Carvalho Chehabchooses a set of features accordingly. Some examples include Altivec support, 14*4d2e26a3SMauro Carvalho Chehabsplit instruction and data caches, and if the CPU supports the DOZE and NAP 15*4d2e26a3SMauro Carvalho Chehabsleep modes. 16*4d2e26a3SMauro Carvalho Chehab 17*4d2e26a3SMauro Carvalho ChehabDetection of the feature set is simple. A list of processors can be found in 18*4d2e26a3SMauro Carvalho Chehabarch/powerpc/kernel/cputable.c. The PVR register is masked and compared with 19*4d2e26a3SMauro Carvalho Chehabeach value in the list. If a match is found, the cpu_features of cur_cpu_spec 20*4d2e26a3SMauro Carvalho Chehabis assigned to the feature bitmask for this processor and a __setup_cpu 21*4d2e26a3SMauro Carvalho Chehabfunction is called. 22*4d2e26a3SMauro Carvalho Chehab 23*4d2e26a3SMauro Carvalho ChehabC code may test 'cur_cpu_spec[smp_processor_id()]->cpu_features' for a 24*4d2e26a3SMauro Carvalho Chehabparticular feature bit. This is done in quite a few places, for example 25*4d2e26a3SMauro Carvalho Chehabin ppc_setup_l2cr(). 26*4d2e26a3SMauro Carvalho Chehab 27*4d2e26a3SMauro Carvalho ChehabImplementing cpufeatures in assembly is a little more involved. There are 28*4d2e26a3SMauro Carvalho Chehabseveral paths that are performance-critical and would suffer if an array 29*4d2e26a3SMauro Carvalho Chehabindex, structure dereference, and conditional branch were added. To avoid the 30*4d2e26a3SMauro Carvalho Chehabperformance penalty but still allow for runtime (rather than compile-time) CPU 31*4d2e26a3SMauro Carvalho Chehabselection, unused code is replaced by 'nop' instructions. This nop'ing is 32*4d2e26a3SMauro Carvalho Chehabbased on CPU 0's capabilities, so a multi-processor system with non-identical 33*4d2e26a3SMauro Carvalho Chehabprocessors will not work (but such a system would likely have other problems 34*4d2e26a3SMauro Carvalho Chehabanyways). 35*4d2e26a3SMauro Carvalho Chehab 36*4d2e26a3SMauro Carvalho ChehabAfter detecting the processor type, the kernel patches out sections of code 37*4d2e26a3SMauro Carvalho Chehabthat shouldn't be used by writing nop's over it. Using cpufeatures requires 38*4d2e26a3SMauro Carvalho Chehabjust 2 macros (found in arch/powerpc/include/asm/cputable.h), as seen in head.S 39*4d2e26a3SMauro Carvalho Chehabtransfer_to_handler:: 40*4d2e26a3SMauro Carvalho Chehab 41*4d2e26a3SMauro Carvalho Chehab #ifdef CONFIG_ALTIVEC 42*4d2e26a3SMauro Carvalho Chehab BEGIN_FTR_SECTION 43*4d2e26a3SMauro Carvalho Chehab mfspr r22,SPRN_VRSAVE /* if G4, save vrsave register value */ 44*4d2e26a3SMauro Carvalho Chehab stw r22,THREAD_VRSAVE(r23) 45*4d2e26a3SMauro Carvalho Chehab END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) 46*4d2e26a3SMauro Carvalho Chehab #endif /* CONFIG_ALTIVEC */ 47*4d2e26a3SMauro Carvalho Chehab 48*4d2e26a3SMauro Carvalho ChehabIf CPU 0 supports Altivec, the code is left untouched. If it doesn't, both 49*4d2e26a3SMauro Carvalho Chehabinstructions are replaced with nop's. 50*4d2e26a3SMauro Carvalho Chehab 51*4d2e26a3SMauro Carvalho ChehabThe END_FTR_SECTION macro has two simpler variations: END_FTR_SECTION_IFSET 52*4d2e26a3SMauro Carvalho Chehaband END_FTR_SECTION_IFCLR. These simply test if a flag is set (in 53*4d2e26a3SMauro Carvalho Chehabcur_cpu_spec[0]->cpu_features) or is cleared, respectively. These two macros 54*4d2e26a3SMauro Carvalho Chehabshould be used in the majority of cases. 55*4d2e26a3SMauro Carvalho Chehab 56*4d2e26a3SMauro Carvalho ChehabThe END_FTR_SECTION macros are implemented by storing information about this 57*4d2e26a3SMauro Carvalho Chehabcode in the '__ftr_fixup' ELF section. When do_cpu_ftr_fixups 58*4d2e26a3SMauro Carvalho Chehab(arch/powerpc/kernel/misc.S) is invoked, it will iterate over the records in 59*4d2e26a3SMauro Carvalho Chehab__ftr_fixup, and if the required feature is not present it will loop writing 60*4d2e26a3SMauro Carvalho Chehabnop's from each BEGIN_FTR_SECTION to END_FTR_SECTION. 61